diff --git a/rtl/sys_gen/w11a/basys3/tb/tbrun.yml b/rtl/sys_gen/w11a/basys3/tb/tbrun.yml index f014401c..598f472b 100644 --- a/rtl/sys_gen/w11a/basys3/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/basys3/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 809 2016-09-18 19:49:14Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70 - now in tbcpu # 2016-09-18 809 1.0.1 use 60 sec tout for run_pdpcp tb_pdp11core_stim # 2016-08-13 798 1.0 Initial version # @@ -13,11 +14,6 @@ tbrun_tbwrri --hxon --lsuf stim1 tb_w11a_b3${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [default, viv, sys_w11a, b3, mem70] - test: | - tbrun_tbwrri --hxon --lsuf mem70 --pack rw11 tb_w11a_b3${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - - tag: [default, viv, sys_w11a, b3, stim2] test: | tbrun_tbwrri --hxon --lsuf stim2 --pack rw11 tb_w11a_b3${ms} \ diff --git a/rtl/sys_gen/w11a/nexys2/tb/tbrun.yml b/rtl/sys_gen/w11a/nexys2/tb/tbrun.yml index cd821a0e..5c36c76a 100644 --- a/rtl/sys_gen/w11a/nexys2/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/nexys2/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 809 2016-09-18 19:49:14Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70,mem70_n2 - now in tbcpu # 2016-09-18 809 1.1.1 use 60 sec tout for run_pdpcp tb_pdp11core_stim # 2016-08-28 803 1.1 use ${ise_modes_noisim} when ISim can't be used # 2016-08-21 799 1.0 Initial version @@ -14,16 +15,6 @@ tbrun_tbwrri --cuff --lsuf stim1 tb_w11a_n2${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [default, ise, sys_w11a, n2, mem70] - test: | - tbrun_tbwrri --cuff --lsuf mem70 --pack rw11 tb_w11a_n2${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - -- tag: [default, ise, sys_w11a, n2, mem70_n2] - test: | - tbrun_tbwrri --cuff --lsuf mem70_n2 --pack rw11 tb_w11a_n2${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70_n2.dat" - - tag: [default, ise, sys_w11a, n2, stim2] test: | tbrun_tbwrri --cuff --lsuf stim2 --pack rw11 tb_w11a_n2${ms} \ diff --git a/rtl/sys_gen/w11a/nexys3/tb/tbrun.yml b/rtl/sys_gen/w11a/nexys3/tb/tbrun.yml index e7a7d5a8..4c9ebb71 100644 --- a/rtl/sys_gen/w11a/nexys3/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/nexys3/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 809 2016-09-18 19:49:14Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70,mem70_n2 - now in tbcpu # 2016-09-18 809 1.1.1 use 60 sec tout for run_pdpcp tb_pdp11core_stim # 2016-08-28 803 1.1 use ${ise_modes_noisim} when ISim can't be used # 2016-08-21 799 1.0 Initial version @@ -14,16 +15,6 @@ tbrun_tbwrri --cuff --lsuf stim1 tb_w11a_n3${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [default, ise, sys_w11a, n3, mem70] - test: | - tbrun_tbwrri --cuff --lsuf mem70 --pack rw11 tb_w11a_n3${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - -- tag: [default, ise, sys_w11a, n3, mem70_n2] - test: | - tbrun_tbwrri --cuff --lsuf mem70_n2 --pack rw11 tb_w11a_n3${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70_n2.dat" - - tag: [default, ise, sys_w11a, n3, stim2] test: | tbrun_tbwrri --cuff --lsuf stim2 --pack rw11 tb_w11a_n3${ms} \ diff --git a/rtl/sys_gen/w11a/nexys4/tb/tbrun.yml b/rtl/sys_gen/w11a/nexys4/tb/tbrun.yml index 9b47e2bf..44ed1466 100644 --- a/rtl/sys_gen/w11a/nexys4/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/nexys4/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 809 2016-09-18 19:49:14Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70,mem70_n2 - now in tbcpu # 2016-09-18 809 1.0.1 use 60 sec tout for run_pdpcp tb_pdp11core_stim # 2016-08-21 799 1.0 Initial version # @@ -13,16 +14,6 @@ tbrun_tbwrri --lsuf stim1 tb_w11a_n4${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [default, viv, sys_w11a, n4, mem70] - test: | - tbrun_tbwrri --lsuf mem70 --pack rw11 tb_w11a_n4${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - -- tag: [default, viv, sys_w11a, n4, mem70_n2] - test: | - tbrun_tbwrri --lsuf mem70_n2 --pack rw11 tb_w11a_n4${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70_n2.dat" - - tag: [default, viv, sys_w11a, n4, stim2] test: | tbrun_tbwrri --lsuf stim2 --pack rw11 tb_w11a_n4${ms} \ diff --git a/rtl/sys_gen/w11a/nexys4d_bram/tb/tbrun.yml b/rtl/sys_gen/w11a/nexys4d_bram/tb/tbrun.yml index e2b30d42..604dbc4d 100644 --- a/rtl/sys_gen/w11a/nexys4d_bram/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/nexys4d_bram/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 838 2017-01-04 20:57:57Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70 - now in tbcpu # 2017-01-04 800 1.0 Initial version # - default: @@ -12,11 +13,6 @@ tbrun_tbwrri --lsuf stim1 tb_w11a_br_n4d${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [viv, sys_w11a, br_n4d, mem70] - test: | - tbrun_tbwrri --lsuf mem70 --pack rw11 tb_w11a_br_n4d${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - - tag: [viv, sys_w11a, br_n4d, stim2] test: | tbrun_tbwrri --lsuf stim2 --pack rw11 tb_w11a_br_n4d${ms} \ diff --git a/rtl/sys_gen/w11a/s3board/tb/tbrun.yml b/rtl/sys_gen/w11a/s3board/tb/tbrun.yml index d84aaa08..1831b715 100644 --- a/rtl/sys_gen/w11a/s3board/tb/tbrun.yml +++ b/rtl/sys_gen/w11a/s3board/tb/tbrun.yml @@ -1,7 +1,8 @@ -# $Id: tbrun.yml 809 2016-09-18 19:49:14Z mueller $ +# $Id: tbrun.yml 916 2017-06-25 13:30:07Z mueller $ # # Revision History: # Date Rev Version Comment +# 2017-06-25 916 1.2 retire mem70,mem70_s3 - now in tbcpu; add --fusp # 2016-09-18 809 1.1.1 use 60 sec tout for run_pdpcp tb_pdp11core_stim # 2016-08-28 803 1.1 use ${ise_modes_noisim} when ISim can't be used # 2016-08-13 798 1.0 Initial version @@ -11,31 +12,21 @@ # - tag: [default, ise, sys_w11a, s3, stim1] test: | - tbrun_tbwrri --lsuf stim1 tb_w11a_s3${ms} \ + tbrun_tbwrri --fusp --lsuf stim1 tb_w11a_s3${ms} \ "rlink::run_rri ../../../../w11a/tb/tb_rlink_tba_pdp11core_stim.dat" -- tag: [default, ise, sys_w11a, s3, mem70] - test: | - tbrun_tbwrri --lsuf mem70 --pack rw11 tb_w11a_s3${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70.dat" - -- tag: [default, ise, sys_w11a, s3, mem70_s3] - test: | - tbrun_tbwrri --lsuf mem70_s3 --pack rw11 tb_w11a_s3${ms} \ - "rw11::setup_cpu" "rw11::run_pdpcp ../../tb/tb_w11a_mem70_s3.dat" - - tag: [default, ise, sys_w11a, s3, stim2] test: | - tbrun_tbwrri --lsuf stim2 --pack rw11 tb_w11a_s3${ms} \ + tbrun_tbwrri --fusp --lsuf stim2 --pack rw11 tb_w11a_s3${ms} \ "rw11::setup_cpu" \ "rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat 60." - tag: [default, ise, sys_w11a, s3, tbcpu] test: | - tbrun_tbwrri --lsuf tbcpu --pack rw11 tb_w11a_s3${ms} \ + tbrun_tbwrri --fusp --lsuf tbcpu --pack rw11 tb_w11a_s3${ms} \ "rw11::setup_cpu" "rw11::tbench @cpu_all.dat" - tag: [default, ise, sys_w11a, s3, tbdev] test: | - tbrun_tbwrri --lsuf tbdev --pack rw11 tb_w11a_s3${ms} \ + tbrun_tbwrri --fusp --lsuf tbdev --pack rw11 tb_w11a_s3${ms} \ "rw11::setup_cpu" "rw11::tbench @dev_all.dat" diff --git a/rtl/sys_gen/w11a/tb/tb_w11a_mem70.dat b/rtl/sys_gen/w11a/tb/tb_w11a_mem70.dat deleted file mode 100644 index dca0af0c..00000000 --- a/rtl/sys_gen/w11a/tb/tb_w11a_mem70.dat +++ /dev/null @@ -1,186 +0,0 @@ -# $Id: tb_w11a_mem70.dat 802 2016-08-27 19:00:23Z mueller $ -# -# Tests generic parts of 11/70 memory system -# -# Revision History: -# Date Rev Version Comment -# 2016-08-27 802 1.4 changed to accommodate up to 128 kByte cache size -# 2010-06-13 305 1.3 rename lal,lah -> wal,wah; replace 'sta' -> 'stapc' -# 2010-06-05 301 1.2.1 move size register check to new _s3 and _n2.dat -# 2008-03-02 121 1.2 moved ubmap+rdma tests to tb/tb_pdp11_core_ubmap.dat -# 2008-02-24 119 1.1 add ubmap and rdma transfers -# 2008-02-23 118 1.0 initial version -# -.mode pdpcp -.tocmd 50 -.tostp 100 -.togo 5000 -.rlmon 0 -.rbmon 0 -# -.reset -.wait 10 -.anena 1 -# -#----------------------------------------------------------------------------- -C Test access to 11/70 memory system registers -wal 177740 -rmi d=000000 -- 177740: Low Error Address Register -rmi d=000000 -- 177742: High Error Address Register -rmi d=000000 -- 177744: Memory System Error Register -rmi d=000000 -- 177746: Control Register -rmi d=000000 -- 177750: Maintenance Register -rmi d=- -- 177752: Hit/Miss Register -wal 177760 -rmi d=- -- 177760: Lower size Register (check access but not value) -rmi d=000000 -- 177762: Upper size Register -# -#----------------------------------------------------------------------------- -# Note on cache: -# - original cache size was 8 kByte -# --> 000000,020000,040000,060000,.. share one cache line -# - the new configurable cache can be as big as 128 kByte -# - the hit/miss tests below will work for up maximal cache size and use -# 22bit mode access and two areas 120 kByte appart -# wah/wal 00/0000xx -# wah/wal 02/0000xx -# -C Test 1: cache basic rmiss test (do we get data from mem on rmiss ?) -# -wal 000000 -- write 00,000000 -wah 000100 -bwm 8 - 000000 - 000002 - 000004 - 000006 - 000010 - 000012 - 000014 - 000016 -wal 000000 -- write 02,000000 -wah 000102 -bwm 8 - 020000 - 020002 - 020004 - 020006 - 020010 - 020012 - 020014 - 020016 -wal 000000 -- read 00,000000 -wah 000100 -brm 8 - d=000000 - d=000002 - d=000004 - d=000006 - d=000010 - d=000012 - d=000014 - d=000016 -wal 000000 -- read 02,000000 (will miss) -wah 000102 -brm 8 - d=020000 - d=020002 - d=020004 - d=020006 - d=020010 - d=020012 - d=020014 - d=020016 -#----------------------------------------------------------------------------- -C Test 2: Hit/Miss register -# -wal 000004 -- 7 read on same location -> 6 hits -wah 000102 -rm d=020004 -rm d=020004 -rm d=020004 -rm d=020004 -rm d=020004 -rm d=020004 -rm d=020004 -wal 177752 -- hit/miss reg -rm d=000077 -- 111 111 -# -wal 000004 -- 1 read on conflicting address -> 1 miss -wah 000100 -rm d=000004 -wal 177752 -- hit/miss reg -rm d=000076 -- 111 110 -# -wal 000006 -- 1 read on next word in line -> 1 hit -wah 000100 -rm d=000006 -wal 177752 -- hit/miss reg -rm d=000075 -- 111 101 -# -wal 000010 -- read next 4 words -> alternating miss/hit -wah 000100 -brm 4 - d=000010 - d=000012 - d=000014 - d=000016 -wal 177752 -- hit/miss reg -rm d=000025 -- 010 101 -# -wal 000020 -- write next 4 words -> 4 miss -wah 000100 -bwm 4 - 000020 - 000022 - 000024 - 000026 -wal 177752 -- hit/miss reg -rm d=000020 -- 010 000 -# -wal 000020 -- re-read these 4 words -> 4 hit -wah 000100 -brm 4 - d=000020 - d=000022 - d=000024 - d=000026 -wal 177752 -- hit/miss reg -rm d=000017 -- 001 111 -# -wal 000010 -- 02,000010 in cache, owerwrite cache line, 1st word -wah 000102 -wm 120010 -- write -> miss -rmi d=120010 -- re-read -> hit -rmi d=020012 -- read 2nd -> miss -wal 177752 -- hit/miss reg -rm d=000072 -- 111 010 -#----------------------------------------------------------------------------- -C Test 3: Control Register: test force miss bits -# -wal 177746 -- control reg -wm 000014 -- set fmiss bits -rm d=000014 -# -wal 000020 -- re-read last 4 words -> 4 forced misses -brm 4 - d=000020 - d=000022 - d=000024 - d=000026 -wal 177752 -- hit/miss reg -rm d=000040 -- 100 000 -# -wal 177746 -- control reg -wm 000000 -- clear fmiss bits again -rm d=000000 -# -wal 000020 -- re-read last 4 words -> 4 hits -brm 4 - d=000020 - d=000022 - d=000024 - d=000026 -wal 177752 -- hit/miss reg -rm d=000017 -- 001 111 -# diff --git a/rtl/sys_gen/w11a/tb/tb_w11a_mem70_n2.dat b/rtl/sys_gen/w11a/tb/tb_w11a_mem70_n2.dat deleted file mode 100644 index 9c1cdf37..00000000 --- a/rtl/sys_gen/w11a/tb/tb_w11a_mem70_n2.dat +++ /dev/null @@ -1,157 +0,0 @@ -# $Id: tb_w11a_mem70_n2.dat 351 2010-12-30 21:50:54Z mueller $ -# -# Tests 11/70 memory system, Nexys 2 specific size test and probing -# -# Revision History: -# Date Rev Version Comment -# 2010-06-13 305 1.1 rename lal,lah -> wal,wah; replace 'sta' -> 'stapc' -# 2010-06-06 301 1.0 initial version -# -.mode pdpcp -.tocmd 50 -.tostp 100 -.togo 5000 -.rlmon 0 -.rbmon 0 -# -.reset -.wait 10 -.anena 1 -# -#----------------------------------------------------------------------------- -C Test 1: memory system size -wal 177760 -rmi d=167777 -- 177760: Lower size Register (for 4MB-256kB system) -rmi d=000000 -- 177762: Upper size Register -# -#----------------------------------------------------------------------------- -C Test 2: probe memory -# -# cache size is 8 kByte --> 000000,020000,040000,060000,.. share one cache line -# Probe 8 areas in memory, 512 kB apart. -# 00,000000 00,000100 -# 10,000000 10,000110 -# 20,000000 20,000120 -# 30,000000 30,000130 -# 40,000000 40,000140 -# 50,000000 50,000150 -# 60,000000 60,000160 -# 70,000000 70,000170 -# -# write data -# -wal 000000 -- write to 00,000000 -wah 000100 -- use 22 bit mode -wm 100000 -wal 000100 -- write to 00,000100 -wah 000100 -- use 22 bit mode -wm 100100 -# -wal 000000 -- write to 10,000000 -wah 000110 -- use 22 bit mode -wm 110000 -wal 000110 -- write to 10,000110 -wah 000110 -- use 22 bit mode -wm 110110 -# -wal 000000 -- write to 20,000000 -wah 000120 -- use 22 bit mode -wm 120000 -wal 000120 -- write to 20,000120 -wah 000120 -- use 22 bit mode -wm 120120 -# -wal 000000 -- write to 30,000000 -wah 000130 -- use 22 bit mode -wm 130000 -wal 000130 -- write to 30,000130 -wah 000130 -- use 22 bit mode -wm 130130 -# -wal 000000 -- write to 40,000000 -wah 000140 -- use 22 bit mode -wm 140000 -wal 000140 -- write to 40,000140 -wah 000140 -- use 22 bit mode -wm 140140 -# -wal 000000 -- write to 50,000000 -wah 000150 -- use 22 bit mode -wm 150000 -wal 000150 -- write to 50,000150 -wah 000150 -- use 22 bit mode -wm 150150 -# -wal 000000 -- write to 60,000000 -wah 000160 -- use 22 bit mode -wm 160000 -wal 000160 -- write to 60,000160 -wah 000160 -- use 22 bit mode -wm 160160 -# -wal 000000 -- write to 70,000000 -wah 000170 -- use 22 bit mode -wm 170000 -wal 000170 -- write to 70,000170 -wah 000170 -- use 22 bit mode -wm 170170 -# -# -# read data -# -wal 000000 -- read from 00,000000 -wah 000100 -- use 22 bit mode -rm d=100000 -wal 000100 -- read from 00,000100 -wah 000100 -- use 22 bit mode -rm d=100100 -# -wal 000000 -- read from 10,000000 -wah 000110 -- use 22 bit mode -rm d=110000 -wal 000110 -- read from 10,000110 -wah 000110 -- use 22 bit mode -rm d=110110 -# -wal 000000 -- read from 20,000000 -wah 000120 -- use 22 bit mode -rm d=120000 -wal 000120 -- read from 20,000120 -wah 000120 -- use 22 bit mode -rm d=120120 -# -wal 000000 -- read from 30,000000 -wah 000130 -- use 22 bit mode -rm d=130000 -wal 000130 -- read from 30,000130 -wah 000130 -- use 22 bit mode -rm d=130130 -# -wal 000000 -- read from 40,000000 -wah 000140 -- use 22 bit mode -rm d=140000 -wal 000140 -- read from 40,000140 -wah 000140 -- use 22 bit mode -rm d=140140 -# -wal 000000 -- read from 50,000000 -wah 000150 -- use 22 bit mode -rm d=150000 -wal 000150 -- read from 50,000150 -wah 000150 -- use 22 bit mode -rm d=150150 -# -wal 000000 -- read from 60,000000 -wah 000160 -- use 22 bit mode -rm d=160000 -wal 000160 -- read from 60,000160 -wah 000160 -- use 22 bit mode -rm d=160160 -# -wal 000000 -- read from 70,000000 -wah 000170 -- use 22 bit mode -rm d=170000 -wal 000170 -- read from 70,000170 -wah 000170 -- use 22 bit mode -rm d=170170 -# diff --git a/rtl/sys_gen/w11a/tb/tb_w11a_mem70_s3.dat b/rtl/sys_gen/w11a/tb/tb_w11a_mem70_s3.dat deleted file mode 100644 index 91f179fe..00000000 --- a/rtl/sys_gen/w11a/tb/tb_w11a_mem70_s3.dat +++ /dev/null @@ -1,157 +0,0 @@ -# $Id: tb_w11a_mem70_s3.dat 351 2010-12-30 21:50:54Z mueller $ -# -# Tests 11/70 memory system, S3board specific size test and probing -# -# Revision History: -# Date Rev Version Comment -# 2010-06-13 305 1.1 rename lal,lah -> wal,wah; replace 'sta' -> 'stapc' -# 2010-06-06 301 1.0 initial version -# -.mode pdpcp -.tocmd 50 -.tostp 100 -.togo 5000 -.rlmon 0 -.rbmon 0 -# -.reset -.wait 10 -.anena 1 -# -#----------------------------------------------------------------------------- -C Test 1: memory system size -wal 177760 -rmi d=037777 -- 177760: Lower size Register (for 1MB system) -rmi d=000000 -- 177762: Upper size Register -# -#----------------------------------------------------------------------------- -C Test 2: probe memory -# -# cache size is 8 kByte --> 000000,020000,040000,060000,.. share one cache line -# Probe 8 areas in memory, 128 kB apart. -# 00,000000 00,000100 -# 02,000000 02,000102 -# 04,000000 04,000104 -# 06,000000 06,000106 -# 00,000000 10,000110 -# 12,000000 12,000112 -# 14,000000 14,000114 -# 16,000000 16,000116 -# -# write data -# -wal 000000 -- write to 00,000000 -wah 000100 -- use 22 bit mode -wm 100000 -wal 000100 -- write to 00,000100 -wah 000100 -- use 22 bit mode -wm 100100 -# -wal 000000 -- write to 02,000000 -wah 000102 -- use 22 bit mode -wm 102000 -wal 000102 -- write to 02,000102 -wah 000102 -- use 22 bit mode -wm 102102 -# -wal 000000 -- write to 04,000000 -wah 000104 -- use 22 bit mode -wm 104000 -wal 000104 -- write to 04,000104 -wah 000104 -- use 22 bit mode -wm 104104 -# -wal 000000 -- write to 06,000000 -wah 000106 -- use 22 bit mode -wm 106000 -wal 000106 -- write to 06,000106 -wah 000106 -- use 22 bit mode -wm 106106 -# -wal 000000 -- write to 10,000000 -wah 000110 -- use 22 bit mode -wm 110000 -wal 000110 -- write to 10,000110 -wah 000110 -- use 22 bit mode -wm 110110 -# -wal 000000 -- write to 12,000000 -wah 000112 -- use 22 bit mode -wm 112000 -wal 000112 -- write to 12,000112 -wah 000112 -- use 22 bit mode -wm 112112 -# -wal 000000 -- write to 14,000000 -wah 000114 -- use 22 bit mode -wm 114000 -wal 000114 -- write to 14,000114 -wah 000114 -- use 22 bit mode -wm 114114 -# -wal 000000 -- write to 16,000000 -wah 000116 -- use 22 bit mode -wm 116000 -wal 000116 -- write to 16,000116 -wah 000116 -- use 22 bit mode -wm 116116 -# -# -# read data -# -wal 000000 -- read from 00,000000 -wah 000100 -- use 22 bit mode -rm d=100000 -wal 000100 -- read from 00,000100 -wah 000100 -- use 22 bit mode -rm d=100100 -# -wal 000000 -- read from 02,000000 -wah 000102 -- use 22 bit mode -rm d=102000 -wal 000102 -- read from 02,000102 -wah 000102 -- use 22 bit mode -rm d=102102 -# -wal 000000 -- read from 04,000000 -wah 000104 -- use 22 bit mode -rm d=104000 -wal 000104 -- read from 04,000104 -wah 000104 -- use 22 bit mode -rm d=104104 -# -wal 000000 -- read from 06,000000 -wah 000106 -- use 22 bit mode -rm d=106000 -wal 000106 -- read from 06,000106 -wah 000106 -- use 22 bit mode -rm d=106106 -# -wal 000000 -- read from 10,000000 -wah 000110 -- use 22 bit mode -rm d=110000 -wal 000110 -- read from 10,000110 -wah 000110 -- use 22 bit mode -rm d=110110 -# -wal 000000 -- read from 12,000000 -wah 000112 -- use 22 bit mode -rm d=112000 -wal 000112 -- read from 12,000112 -wah 000112 -- use 22 bit mode -rm d=112112 -# -wal 000000 -- read from 14,000000 -wah 000114 -- use 22 bit mode -rm d=114000 -wal 000114 -- read from 14,000114 -wah 000114 -- use 22 bit mode -rm d=114114 -# -wal 000000 -- read from 16,000000 -wah 000116 -- use 22 bit mode -rm d=116000 -wal 000116 -- read from 16,000116 -wah 000116 -- use 22 bit mode -rm d=116116 -# diff --git a/tools/tbench/w11a/test_w11a_mem70.tcl b/tools/tbench/w11a/test_w11a_mem70.tcl new file mode 100644 index 00000000..56a5fece --- /dev/null +++ b/tools/tbench/w11a/test_w11a_mem70.tcl @@ -0,0 +1,160 @@ +# $Id: test_w11a_mem70.tcl 916 2017-06-25 13:30:07Z mueller $ +# +# Copyright 2017- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2017-06-25 916 1.0 Initial version +# +# Test 11/70 memory system registers and cache +# adopt from old pdpcp style stim files +# tb/tb_w11a_mem70.dat --> tests 1-3 +# tb/tb_w11a_mem70_n2.dat --> test 4 (size adaptive now) +# tb/tb_w11a_mem70_s3.dat / + +# ---------------------------------------------------------------------------- +rlc log "test_w11a_mem70: Test 11/70 memory system and cache ------" + +# -------------------------------------------------------------------- +rlc log " access all 11/70 memory system registers" + +# loaddr,hiaddr,syserr,cntrl,maint,hm and losize,hisize are contiguous +$cpu cp -wal loaddr \ + -rmi -edata 000000 \ + -rmi -edata 000000 \ + -rmi -edata 000000 \ + -rmi -edata 000000 \ + -rmi -edata 000000 \ + -rmi \ + -wal losize \ + -rmi losize \ + -rmi -edata 000000 + +set msize [expr {($losize+1) * 64}] +rlc log [format " --> detected memory size: %4d kB" [expr {$msize/1024}]] + +# -------------------------------------------------------------------- +rlc log " Test 1: cache basic rmiss test - is data from mem on rmiss ?" +# - the new configurable cache can be as big as 128 kByte +# - the hit/miss tests below will work for up maximal cache size and use +# 22bit mode access and two areas 128 kByte appart +# wah/wal 00/0000xx or 000000xx +# wah/wal 02/0000xx or 004000xx +# write two areas +$cpu cp -wa 00000000 -p22 \ + -bwm {000000 000002 000004 000006 000010 000012 000014 000016} \ + -wa 00400000 -p22 \ + -bwm {020000 020002 020004 020006 020010 020012 020014 020016} +# read two areas, second read will definitively miss +$cpu cp -wa 00000000 -p22 \ + -brm 8 -edata {000000 000002 000004 000006 000010 000012 000014 000016} \ + -wa 00400000 -p22 \ + -brm 8 -edata {020000 020002 020004 020006 020010 020012 020014 020016} + +# -------------------------------------------------------------------- +rlc log " Test 2: Hit/Miss register" +# use data written in previous test +# 7 read on same location -> 6 hits --> hm 111 111 +$cpu cp -wa 00400004 -p22 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -rm -edata 020004 \ + -wal hm \ + -rm -edata 000077 +# 1 read on conflicting address -> 1 miss --> hm 111 110 +# 1 read on next word in line -> 1 hit --> hm 111 101 +# read next 4 words -> alternating miss/hit --> hm 010 101 +$cpu cp -wa 00000004 -p22 \ + -rm -edata 000004 \ + -wal hm \ + -rm -edata 000076 \ + -wa 00000006 -p22 \ + -rm -edata 000006 \ + -wal hm \ + -rm -edata 000075 \ + -wa 00000010 -p22 \ + -rmi -edata 000010 \ + -rmi -edata 000012 \ + -rmi -edata 000014 \ + -rmi -edata 000016 \ + -wal hm \ + -rm -edata 000025 +# write next 4 words -> 4 miss --> hm 010 000 +# re-read these 4 words -> 4 hit --> hm 001 111 +$cpu cp -wa 00000020 -p22 \ + -bwm {000020 000022 000024 000026} \ + -wal hm \ + -rm -edata 000020 \ + -wa 00000020 -p22 \ + -brm 4 -edata {000020 000022 000024 000026} \ + -wal hm \ + -rm -edata 000017 + +# -------------------------------------------------------------------- +rlc log " Test 3: Control Register: test force miss bits" +# use data written in previous tests +# set fmiss bits in cntrl +# re-read last 4 words -> 4 forced misses --> hm 110 000 +# clear fmiss bits again +$cpu cp -wal cntrl \ + -wm [regbld rw11::CNTRL {fmiss 3}] \ + -wa 00000020 -p22 \ + -brm 4 -edata {000020 000022 000024 000026} \ + -wal hm \ + -rm -edata 000060 \ + -wal cntrl \ + -wm 0 + +# -------------------------------------------------------------------- +rlc log " Test 4: test full memory (touch (4-7)*2 sections of 16 words" +# determine memory size in 2^n steps; chunck size is 1/4 +set msize2 [expr {2*1024*1024}] +while {$msize < $msize2} { + set msize2 [expr {$msize2 >> 1}] +} +set mstep [expr {$msize2 >> 2}] +set nstep [expr {int($msize / $mstep)}] +rlc log [format " --> %d chuncks with %4d kB" $nstep [expr {$mstep/1024}]] + +# write data +set maddrlow 0 +set maddrhigh [expr {$mstep - 32}] +set clist {} + +for {set i 0} {$i < $nstep} {incr i} { + set vlist {} + for {set j 0} {$j < 16} {incr j} { lappend vlist [expr {($i<<9) + ($j<<3)}] } + lappend clist -wa $maddrlow -p22 + lappend clist -bwm $vlist + set vlist {} + for {set j 0} {$j < 16} {incr j} { lappend vlist [expr {($i<<9) + ($j<<3)+1}]} + lappend clist -wa $maddrhigh -p22 + lappend clist -bwm $vlist + incr maddrlow $mstep + incr maddrhigh $mstep +} +$cpu cp {*}$clist + +# read data +set maddrlow 0 +set maddrhigh [expr {$mstep - 32}] +set clist {} + +for {set i 0} {$i < $nstep} {incr i} { + set vlist {} + for {set j 0} {$j < 16} {incr j} { lappend vlist [expr {($i<<9) + ($j<<3)}] } + lappend clist -wa $maddrlow -p22 + lappend clist -brm 16 -edata $vlist + set vlist {} + for {set j 0} {$j < 16} {incr j} { lappend vlist [expr {($i<<9) + ($j<<3)+1}]} + lappend clist -wa $maddrhigh -p22 + lappend clist -brm 16 -edata $vlist + incr maddrlow $mstep + incr maddrhigh $mstep +} +$cpu cp {*}$clist diff --git a/tools/tbench/w11a/w11a_all.dat b/tools/tbench/w11a/w11a_all.dat index 54181f76..2f98654a 100644 --- a/tools/tbench/w11a/w11a_all.dat +++ b/tools/tbench/w11a/w11a_all.dat @@ -1,7 +1,9 @@ -# $Id: w11a_all.dat 831 2016-12-27 16:51:12Z mueller $ +# $Id: w11a_all.dat 916 2017-06-25 13:30:07Z mueller $ # ## steering file for all w11a tests # +test_w11a_mem70.tcl +# test_w11a_srcr_word_flow.tcl test_w11a_dstw_word_flow.tcl test_w11a_dstm_word_flow.tcl