From a96f06983573d76f39a19551cf862346b21920b6 Mon Sep 17 00:00:00 2001 From: wfjm Date: Tue, 9 Jul 2019 08:48:23 +0200 Subject: [PATCH] tbench/dz11: add tests which use membe - test_dz11_regs.tcl: add tdr(brk) -> stat test - test_dz11_tx.tcl: add basic tbuf -> fdat test --- tools/tbench/dz11/test_dz11_regs.tcl | 65 +++++++++++++++++++++++++--- tools/tbench/dz11/test_dz11_rx.tcl | 4 +- tools/tbench/dz11/test_dz11_tx.tcl | 40 ++++++++++++++++- tools/tcl/ibd_dz11/util.tcl | 9 +++- 4 files changed, 109 insertions(+), 9 deletions(-) diff --git a/tools/tbench/dz11/test_dz11_regs.tcl b/tools/tbench/dz11/test_dz11_regs.tcl index b371d695..af4f77a8 100644 --- a/tools/tbench/dz11/test_dz11_regs.tcl +++ b/tools/tbench/dz11/test_dz11_regs.tcl @@ -1,9 +1,10 @@ -# $Id: test_dz11_regs.tcl 1178 2019-06-30 12:39:40Z mueller $ +# $Id: test_dz11_regs.tcl 1179 2019-06-30 14:11:11Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later # Copyright 2019- by Walter F.J. Mueller # # Revision History: # Date Rev Version Comment +# 2019-06-30 1179 1.0.1 add tdr(brk)->stat test # 2019-05-11 1148 1.0 Initial version # 2019-05-04 1146 0.1 First draft # @@ -93,7 +94,33 @@ $cpu cp \ -wma dza.csr [regbld ibd_dz11::CSR] \ -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR] $cntlmask -rlc log " A3: test tcr -> stat response ------------------------" +rlc log " A2.3: csr sae -> cntl sam---------------------------" + +set cntlmask [regbld ibd_dz11::RCNTLR sam mse maint] + +# rem wr clear sam +# rem rd check sam=0 +# loc wr sae=1 +# loc rd check sae=0 +# loc wr sae=0 +# rem rd check sam=1 +# rem wr clear sam +# rem rd check sam=0 + +$cpu cp \ + -breset \ + -wibr dza.csr [regbld ibd_dz11::RCNTLR sam] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR] $cntlmask \ + -wma dza.csr [regbld ibd_dz11::CSR sae] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR sae] \ + -wma dza.csr [regbld ibd_dz11::CSR] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR sam] $cntlmask \ + -wibr dza.csr [regbld ibd_dz11::RCNTLR sam] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR] $cntlmask + +rlc log " A3: test stat response -------------------------------" +rlc log " A3.1: test tcr -> stat response --------------------" $cpu cp \ -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0xaa} {lena 0x55}] \ @@ -106,7 +133,7 @@ $cpu cp \ -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \ -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x0} {lena 0x0}] -rlc log " A4: test cntl -> msr and stat response ---------------" +rlc log " A3.2: test cntl -> msr and stat response -----------" # rem wr SCO 0x45 # rem wr SRING 0x67 @@ -140,7 +167,7 @@ $cpu cp \ -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x00} {ring 0x00}] \ -rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0x00} {ring 0x00}] -rlc log " A5: test lpr(rxon) -> stat response ------------------" +rlc log " A3.3: test lpr(rxon) -> stat response --------------" # loc wr LPR line 1 txon=1 # rem rd rxon= 0000 0010 = 0x02 @@ -173,7 +200,35 @@ $cpu cp \ -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x00}] -rlc log " A5: test stat auto-inc read --------------------------" +rlc log " A3.4: test tdr(brk) -> stat response ---------------" + +# loc wr tdr.brk 0x01 (byte 1 write!) +# rem rd brk 0x01 +# loc wr tdr.brk 0x55 (byte 1 write!) +# rem rd brk 0x55 +# loc wr tdr.brk 0xaa (byte 1 write!) +# rem rd brk 0xaa +# loc wr tdr.brk 0x00 (byte 1 write!) +# rem rd brk 0x00 +$cpu cp \ + -wmembe 2 \ + -wma dza.tdr [regbld ibd_dz11::TDR {brk 0x01}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x01} {rxon 0x0}] \ + -wmembe 2 \ + -wma dza.tdr [regbld ibd_dz11::TDR {brk 0x55}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x55} {rxon 0x0}] \ + -wmembe 2 \ + -wma dza.tdr [regbld ibd_dz11::TDR {brk 0xaa}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0xaa} {rxon 0x0}] \ + -wmembe 2 \ + -wma dza.tdr [regbld ibd_dz11::TDR {brk 0x00}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x00} {rxon 0x0}] + +rlc log " A4: test stat auto-inc read --------------------------" # loc wr TCR (dtr=0xbe lena=0xaf) # loc wr LPR line 3 txon=1 diff --git a/tools/tbench/dz11/test_dz11_rx.tcl b/tools/tbench/dz11/test_dz11_rx.tcl index 38ea9760..019aea71 100644 --- a/tools/tbench/dz11/test_dz11_rx.tcl +++ b/tools/tbench/dz11/test_dz11_rx.tcl @@ -1,4 +1,4 @@ -# $Id: test_dz11_rx.tcl 1178 2019-06-30 12:39:40Z mueller $ +# $Id: test_dz11_rx.tcl 1179 2019-06-30 14:11:11Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later # Copyright 2019- by Walter F.J. Mueller # @@ -44,7 +44,7 @@ rlc log " A2.1: reset and setup with line 4 ------------------" set csrmask [regbld ibd_dz11::CSR trdy tie sa sae rdone rie mse maint] # - loc csr.mse=1 -# - loc rx enable line 4 +# - loc rx enable line 4 (via LPR) # - rem check rxon value # - rem check csr cal message # - rem check rxon cal message diff --git a/tools/tbench/dz11/test_dz11_tx.tcl b/tools/tbench/dz11/test_dz11_tx.tcl index d2db6283..f777c08f 100644 --- a/tools/tbench/dz11/test_dz11_tx.tcl +++ b/tools/tbench/dz11/test_dz11_tx.tcl @@ -1,9 +1,10 @@ -# $Id: test_dz11_tx.tcl 1178 2019-06-30 12:39:40Z mueller $ +# $Id: test_dz11_tx.tcl 1179 2019-06-30 14:11:11Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later # Copyright 2019- by Walter F.J. Mueller # # Revision History: # Date Rev Version Comment +# 2019-06-30 1179 1.0.1 add basic tbuf -> fdat test # 2019-05-18 1150 1.0 Initial version # 2019-05-04 1146 0.1 First draft # @@ -38,6 +39,43 @@ set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl] rlc exec -attn rlc wtlam 0. +rlc log " A2: basic data path ---------------------------------------" +rlc log " A2.1: reset and setup with line 4 ------------------" +set csrmask [regbld ibd_dz11::CSR trdy tie sa sae {tline -1} \ + rdone rie mse maint] + +# - loc csr.mse=1 +# - loc tx enable line 4 (via LENA byte write) +# - rem check csr cal message +# - loc check trdy=1 and tline=4 +$cpu cp \ + -breset \ + -wma dza.csr [regbld ibd_dz11::CSR mse] \ + -wmembe 1 \ + -wma dza.tcr [regbld ibd_dz11::TCR {lena 0x10}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 1}] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 1 \ + line $ibd_dz11::CAL_CSR \ + data [regbld ibd_dz11::CSR mse]] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR trdy {tline 4} mse] $csrmask + +# - loc wr tbuf (byte write!) +# - rem rd fifo +rlc log " A2.2: loc tbuf -> rem fdat - 1 char ----------------" +$cpu cp \ + -wmembe 1 \ + -wma dza.tdr [regbld ibd_dz11::TDR {tbuf 0101}] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 \ + line 4 data 0101] + +# clear LENA again +$cpu cp \ + -wmembe 1 \ + -wma dza.tcr [regbld ibd_dz11::TCR {lena 0x0}] +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. + # -- Section B --------------------------------------------------------------- rlc log " B1: test csr.tie and basic interrupt response -------------" # load test code diff --git a/tools/tcl/ibd_dz11/util.tcl b/tools/tcl/ibd_dz11/util.tcl index c70fc856..9404ae67 100644 --- a/tools/tcl/ibd_dz11/util.tcl +++ b/tools/tcl/ibd_dz11/util.tcl @@ -1,4 +1,4 @@ -# $Id: util.tcl 1177 2019-06-30 12:34:07Z mueller $ +# $Id: util.tcl 1179 2019-06-30 14:11:11Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later # Copyright 2019- by Walter F.J. Mueller # @@ -17,6 +17,13 @@ package require rw11 namespace eval ibd_dz11 { # # setup register descriptions for ibd_dz11 --------------------------------- + # register mapping is different for loc read/write and rem accesses + # off name -- loc -- rem + # rd wr + # 0 dza.csr CSR CSR CSR + # 2 dza.rbuf RBUF LPR STAT + # 4 dza.tcr TCR TCR FUSE + # 6 dza.tdr MSR TDR FDAT # regdsc CSR {trdy 15} {tie 14} {sa 13} {sae 12} {tline 10 3} \