diff --git a/README.md b/README.md index 58d488a7..0b19c2e2 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,7 @@ # w11: PDP 11/70 CPU and SoC [![Build Status](https://travis-ci.org/wfjm/w11.svg?branch=master)](https://travis-ci.org/wfjm/w11) +[![Coverity Status](https://scan.coverity.com/projects/16546/badge.svg?flat=1)](https://scan.coverity.com/projects/wfjm-w11) ### Overview The project contains the VHDL code for a **complete DEC PDP-11 system**: diff --git a/doc/CHANGELOG.md b/doc/CHANGELOG.md index ba5ca36c..06e2225e 100644 --- a/doc/CHANGELOG.md +++ b/doc/CHANGELOG.md @@ -21,6 +21,11 @@ The full set of tests is only run for tagged releases. ### Summary - add Travis CI integration (phase 1) +- add Coverity (manual scan upload, not via Travis) +- add KW11-P (programmable clock) to all w11 systems +- sys_w11_n4: reduce cache from 64 to 32 kB to keep timing closure +- stay with vivado 2017.2 as default tool, 2017.2 to 2018.2 exhibit much + longer build times for w11 designs (see Xilinx Forum post [884858](https://forums.xilinx.com/t5/Synthesis/vivado-2018-2-much-slower-than-2017-2-at-least-for-small-designs/m-p/884858)) --- diff --git a/tools/asm-11/lib/defs_kwp.mac b/tools/asm-11/lib/defs_kwp.mac new file mode 100644 index 00000000..51b47627 --- /dev/null +++ b/tools/asm-11/lib/defs_kwp.mac @@ -0,0 +1,25 @@ +; $Id: defs_kwp.mac 1045 2018-09-15 15:20:57Z mueller $ +; Copyright 2018- by Walter F.J. Mueller +; License disclaimer see License.txt in $RETROBASE directory +; +; definitions for KW11-P programmable clock +; +; register addresses +; + kw.csr=172540 + kw.csb=172542 + kw.ctr=172544 +; +; symbol definitions for rw.csr +; + kw.err=100000 + kw.don=000200 + kw.ie =000100 + kw.fix=000040 + kw.upd=000020 ; 0=down;1=up + kw.mod=000010 ; 0=single;1=repeat + kw.rex=000006 ; rate=ext + kw.rlf=000004 ; rate=line + kw.rtk=000002 ; rate=10 kHz + kw.rhk=000000 ; rate=100 kHz + kw.run=000001 diff --git a/tools/tbench/cpu_all.dat b/tools/tbench/cpu_all.dat index 1127472d..be2a7fb7 100644 --- a/tools/tbench/cpu_all.dat +++ b/tools/tbench/cpu_all.dat @@ -1,4 +1,4 @@ -# $Id: cpu_all.dat 704 2015-07-25 14:18:03Z mueller $ +# $Id: cpu_all.dat 1044 2018-09-15 11:12:07Z mueller $ # ## steering file for all cpu tests # @@ -7,4 +7,5 @@ # @w11a_cmon/w11a_cmon_all.dat @w11a_hbpt/w11a_hbpt_all.dat -# \ No newline at end of file +@w11a_kw11p/w11a_kw11p_all.dat +# diff --git a/tools/tbench/w11a_kw11p/test_kw11p_ctr.tcl b/tools/tbench/w11a_kw11p/test_kw11p_ctr.tcl new file mode 100644 index 00000000..8f5c4d8f --- /dev/null +++ b/tools/tbench/w11a_kw11p/test_kw11p_ctr.tcl @@ -0,0 +1,144 @@ +# $Id: test_kw11p_ctr.tcl 1044 2018-09-15 11:12:07Z mueller $ +# +# Copyright 2018- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2018-09-09 1044 1.0 Initial version +# +# Test ctr response with CSR(fix) + +# ---------------------------------------------------------------------------- +rlc log "test_kw11p_regs: test ctr response with CSR(fix) --------------------" + +if {[$cpu get haskw11p] == 0} { + rlc log " test_kw11p_regs-W: no kw11p unit found, test aborted" + return +} + +# -- Section A --------------------------------------------------------------- +rlc log " A test basic counting -------------------------------------" + +rlc log " A1: count down -------------------------------------" +# test with updn=0, avoid counter overflows +$cpu cp \ + -wreg kwp.csb 0103 \ + -rreg kwp.ctr -edata 0103 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 0102 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 0101 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 0100 + +rlc log " A1: count up ---------------------------------------" +# test with updn=1, avoid counter overflows +$cpu cp \ + -wreg kwp.csb 0100 \ + -rreg kwp.ctr -edata 0100 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0101 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0102 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0103 + +# -- Section B --------------------------------------------------------------- +rlc log " B done response -------------------------------------------" + +rlc log " B1: single count down to zero ----------------------" +# test with updn=0, count down to zero; check that read csr clears done + +$cpu cp \ + -wreg kwp.csb 3 \ + -rreg kwp.ctr -edata 3 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 2 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 1 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix] \ + -rreg kwp.ctr -edata 0 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR] + +rlc log " B2: single count up to zero ------------------------" +# test with updn=1, count up to zero; check that read csr clears done + +$cpu cp \ + -wreg kwp.csb 0177775 \ + -rreg kwp.ctr -edata 0177775 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0177776 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0177777 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn] \ + -rreg kwp.ctr -edata 0 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done updn] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn] + +rlc log " B3: repeat count down to zero ----------------------" +# test with updn=0 mode=1, repeat count down to zero + +$cpu cp \ + -wreg kwp.csb 2 \ + -rreg kwp.ctr -edata 2 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 1 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 2 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 1 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 2 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] + +rlc log " B4: repeat count up to zero ------------------------" +# test with updn=1 mode=1, repeat count up to zero + +$cpu cp \ + -wreg kwp.csb 0177776 \ + -rreg kwp.ctr -edata 0177776 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn mode] \ + -rreg kwp.ctr -edata 0177777 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn mode] \ + -rreg kwp.ctr -edata 0177776 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done updn mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn mode] \ + -rreg kwp.ctr -edata 0177777 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix updn mode] \ + -rreg kwp.ctr -edata 0177776 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR done updn mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn mode] + +# -- Section C --------------------------------------------------------------- +rlc log " C err response --------------------------------------------" + +rlc log " C1: repeat count down to zero ----------------" +# test with updn=0 mode=1, repeat count down to zero without csr read + +$cpu cp \ + -wreg kwp.csb 2 \ + -rreg kwp.ctr -edata 2 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 1 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 2 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 1 \ + -wreg kwp.csr [regbld rw11::KW11P_CSR fix mode] \ + -rreg kwp.ctr -edata 2 \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR err done mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] diff --git a/tools/tbench/w11a_kw11p/test_kw11p_int.tcl b/tools/tbench/w11a_kw11p/test_kw11p_int.tcl new file mode 100644 index 00000000..97faa41c --- /dev/null +++ b/tools/tbench/w11a_kw11p/test_kw11p_int.tcl @@ -0,0 +1,105 @@ +# $Id: test_kw11p_int.tcl 1045 2018-09-15 15:20:57Z mueller $ +# +# Copyright 2018- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2018-09-15 1045 1.0 Initial version +# +# Test interrupt response + +# ---------------------------------------------------------------------------- +rlc log "test_kw11p_regs: test ctr response with CSR(fix) --------------------" + +if {[$cpu get haskw11p] == 0} { + rlc log " test_kw11p_regs-W: no kw11p unit found, test aborted" + return +} + +# -- Section A --------------------------------------------------------------- +rlc log " A test interrupts via 100 Khz clock -----------------------" + +rlc log " A1: single interrupt (mode=0) ----------------------" +# setup single interrupt after 2 ticks of 100 kHz clock +# --> max 20 usec --> for 100 MHz CPU: 2000 cycles, at most 1000 instuctions +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_kwp.mac| +; + .include |lib/vec_cpucatch.mac| +; + . = 000104 ; setup KW11-P interrupt vector +v..kwp: .word vh.kwp + .word cp.pr7 + + . = 1000 ; data area +stack: + + . = 2000 ; code area +start: spl 7 ; lock out interrupts +; + mov #2,@#kw.csb ; load kw11-p counter + mov #,@#kw.csr ; setup: 100 kHz down single + spl 0 ; allow interrupts + mov #1000.,r0 +1$: sob r0,1$ ; wait some time + halt ; HALT if no interrupt seen +; +vh.kwp: halt ; HALT if done +stop: +} + +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +rw11::asmtreg $cpu sp [expr $sym(stack)-4] +$cpu cp -rr0 reg0 + +rlc log [format " 2 x 100 kHz ticks took %4d sob" [expr {1000-$reg0}]] + +rlc log " A2: repeat interrupt (mode=1) ----------------------" + +# setup three interrupts after 1 tick of 100 kHz clock +# --> max 30 usec --> for 100 MHz CPU: 3000 cycles, at most 1500 instuctions +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_kwp.mac| +; + .include |lib/vec_cpucatch.mac| +; + . = 000104 ; setup KW11-P interrupt vector +v..kwp: .word vh.kwp + .word cp.pr7 + + . = 1000 ; data area +stack: + + . = 2000 ; code area +start: spl 7 ; lock out interrupts + +; + mov #3,r1 ; setup interrupt counter + mov #1,@#kw.csb ; load kw11-p counter + mov #,@#kw.csr ; setup: 100 kHz dn rep + spl 0 ; allow interrupts + mov #1500.,r0 +1$: sob r0,1$ ; wait some time + halt ; HALT if no interrupt seen +; +vh.kwp: dec r1 ; count interrupts + beq 2$ ; if eq three interrupts seen + rti ; otherwise continue +2$: halt ; HALT if done +stop: +} + +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +rw11::asmtreg $cpu r1 0 \ + sp [expr $sym(stack)-4] +$cpu cp -rr0 reg0 + +rlc log [format " 3 x 100 kHz ticks took %4d sob" [expr {1500-$reg0}]] + diff --git a/tools/tbench/w11a_kw11p/test_kw11p_regs.tcl b/tools/tbench/w11a_kw11p/test_kw11p_regs.tcl new file mode 100644 index 00000000..f75ed4d5 --- /dev/null +++ b/tools/tbench/w11a_kw11p/test_kw11p_regs.tcl @@ -0,0 +1,46 @@ +# $Id: test_kw11p_regs.tcl 1045 2018-09-15 15:20:57Z mueller $ +# +# Copyright 2018- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2018-09-15 1045 1.0 Initial version +# 2018-09-09 1044 0.1 First draft +# +# Test register response + +# ---------------------------------------------------------------------------- +rlc log "test_kw11p_regs: test register response -----------------------------" + +if {[$cpu get haskw11p] == 0} { + rlc log " test_kw11p_regs-W: no kw11p unit found, test aborted" + return +} + +# -- Section A --------------------------------------------------------------- +rlc log " A basic register access tests -----------------------------" + +rlc log " A1: write/read csr ---------------------------------" +# test that ie,updn,mode and rate are write/readable; done,err not writable +$cpu cp \ + -wreg kwp.csr [regbld rw11::KW11P_CSR ie] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR ie] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR updn] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR updn] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR {rate "rext"}] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR {rate "rext"}] \ + -wreg kwp.csr [regbld rw11::KW11P_CSR err done mode] \ + -rreg kwp.csr -edata [regbld rw11::KW11P_CSR mode] + +rlc log " A3: write csb, read ctr ----------------------------" +# write csb, check csb reads 0, ctr returns csb value, and ctr write is noop +$cpu cp \ + -wreg kwp.csr 0x0000 \ + -wreg kwp.csb 0xbeaf \ + -rreg kwp.csb -edata 0x0000 \ + -rreg kwp.ctr -edata 0xbeaf \ + -wreg kwp.ctr 0xdead \ + -rreg kwp.ctr -edata 0xbeaf diff --git a/tools/tbench/w11a_kw11p/w11a_kw11p_all.dat b/tools/tbench/w11a_kw11p/w11a_kw11p_all.dat new file mode 100644 index 00000000..b7923739 --- /dev/null +++ b/tools/tbench/w11a_kw11p/w11a_kw11p_all.dat @@ -0,0 +1,8 @@ +# $Id: w11a_kw11p_all.dat 1045 2018-09-15 15:20:57Z mueller $ +# +## steering file for all w11a_kw11p tests +# +test_kw11p_regs.tcl +test_kw11p_ctr.tcl +test_kw11p_int.tcl +# diff --git a/tools/tcl/rw11/defs.tcl b/tools/tcl/rw11/defs.tcl index e624c1c9..ffc55052 100644 --- a/tools/tcl/rw11/defs.tcl +++ b/tools/tcl/rw11/defs.tcl @@ -1,6 +1,6 @@ -# $Id: defs.tcl 985 2018-01-03 08:59:40Z mueller $ +# $Id: defs.tcl 1044 2018-09-15 11:12:07Z mueller $ # -# Copyright 2014-2017 by Walter F.J. Mueller +# Copyright 2014-2018 by Walter F.J. Mueller # # This program is free software; you may redistribute and/or modify it under # the terms of the GNU General Public License as published by the Free @@ -13,6 +13,7 @@ # # Revision History: # Date Rev Version Comment +# 2018-09-09 1044 1.0.6 update defs kw11p, literals for KW11P_CSR(rate) # 2017-02-17 851 1.0.5 defs for auxilliary devices (kw11l,kw11p,iist) # 2016-12-30 834 1.0.4 fix typo in regmap_add for SDR's # 2016-01-02 724 1.0.3 add s: defs for CP_STAT(rust) @@ -120,8 +121,8 @@ namespace eval rw11 { set A_KW11P_CSR 0172540 set A_KW11P_CSB 0172542 set A_KW11P_CTR 0172544 - regdsc KW11P_CSR {err 15} {done 7} {ie 6} {fix 5} {updn 4} \ - {mode 3} {rate 2 2} {run 0} + regdsc KW11P_CSR {err 15} {done 7} {ie 6} {fix 5} {updn 4} {mode 3} \ + {rate 2 2 "s:r100k:r10k:rline:rext"} {run 0} rw11util::regmap_add rw11 kwp.csr {?? KW11P_CSR} # # IIST - interprocessor communication