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- interim release w11a_V0.57 (untagged)

Browse Source 
- new C++ and Tcl based backend server supports now RK11 handling
- w11a systems operate with rlink over USB on nexsy2 and nexsy3 boards.
  See w11a_os_guide.txt for details
This commit is contained in:
Walter F.J. Mueller
2013-04-27 14:21:46 +00:00
parent 99de9893cb
commit b06cbef00a
105 changed files with 5202 additions and 593 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
rtl/sys_gen/tst_fx2loop/tst_fx2loop.vhd
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@@ -1,6 +1,6 @@
-- $Id: tst_fx2loop.vhd 453 2012-01-15 17:51:18Z mueller $
-- $Id: tst_fx2loop.vhd 510 2013-04-26 16:14:57Z mueller $
--
-- Copyright 2011-2012 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -24,6 +24,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-24 510 1.0.1 fix sensitivity list of proc_next
-- 2012-01-15 453 1.0 Initial version
-- 2011-12-26 445 0.5 First draft
------------------------------------------------------------------------------
@@ -162,7 +163,8 @@ begin
end process proc_regs;
proc_next: process (R_REGS, CE_MSEC, HIO_CNTL, FX2_MONI,
RXWDATA, RXWVAL, TXWBUSY, TX2WBUSY)
RXWDATA, RXWVAL, TXWBUSY, TX2WBUSY,
RXHOLD_L, TXBUSY, TX2BUSY)
variable r : regs_type := regs_init;
variable n : regs_type := regs_init;

1
rtl/sys_gen/w11a/nexys2/.cvsignore
View File

@@ -2,3 +2,4 @@ sys_w11a_n2.ucf
*.dep_ucf_cpp
log_*
_impact*
*.svf

4
rtl/sys_gen/w11a/nexys2/Makefile
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@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 509 2013-04-21 20:46:20Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-04-20 509 1.2 add fx2 support
# 2011-08-13 405 1.1 use includes from rtl/make
# 2010-05-28 295 1.0 Initial version (derived from _s3 version)
#
@@ -9,6 +10,7 @@ VBOM_all = $(wildcard *.vbom)
BIT_all = $(VBOM_all:.vbom=.bit)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
FX2_FILE = nexys2_jtag_2fifo_ic.ihx
#
.PHONY : all clean
#

9
rtl/sys_gen/w11a/nexys2/sys_conf.vhd
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@@ -1,6 +1,6 @@
-- $Id: sys_conf.vhd 428 2011-11-20 12:19:31Z mueller $
-- $Id: sys_conf.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,6 +19,7 @@
-- Tool versions: xst 11.4, 13.1; ghdl 0.26-0.29
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-19 428 1.1.1 use clksys=56 (58 no closure after numeric_std...)
-- 2010-11-27 341 1.1 add dcm and memctl related constants (clksys=58)
-- 2010-05-05 295 1.0 Initial version (derived from _s3 version)
@@ -46,6 +47,10 @@ package sys_conf is
constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;
constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers
constant sys_conf_bram : integer := 0; -- no bram, use cache

8
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.ucf_cpp
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@@ -1,7 +1,8 @@
## $Id: sys_w11a_n2.ucf_cpp 336 2010-11-06 18:28:27Z mueller $
## $Id: sys_w11a_n2.ucf_cpp 509 2013-04-21 20:46:20Z mueller $
##
## Revision History:
## Date Rev Version Comment
## 2013-04-20 509 1.1 add fx2 support
## 2010-11-06 336 1.0.1 rename input pin CLK -> I_CLK50
## 2010-05-26 295 1.0 Initial version
##
@@ -18,3 +19,8 @@ OFFSET = OUT 20 ns AFTER "I_CLK50";
## Pmod B0 - RS232
##
#include "bplib/nexys2/nexys2_pins_pmb0_rs232.ucf"
##
## Cypress FX2
##
#include "bplib/nexys2/nexys2_pins_fx2.ucf"
#include "bplib/nexys2/nexys2_time_fx2_ic.ucf"

5
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vbom
View File

@@ -5,6 +5,8 @@
../../../vlib/serport/serportlib.vbom
../../../vlib/rbus/rblib.vhd
../../../vlib/rlink/rlinklib.vbom
../../../bplib/fx2lib/fx2lib.vhd
../../../bplib/fx2rlink/fx2rlinklib.vbom
../../../bplib/bpgen/bpgenlib.vbom
../../../bplib/bpgen/bpgenrbuslib.vbom
../../../bplib/nxcramlib/nxcramlib.vhd
@@ -18,7 +20,8 @@ sys_conf = sys_conf.vhd
../../../vlib/genlib/clkdivce.vbom
../../../bplib/bpgen/bp_rs232_2l4l_iob.vbom
../../../bplib/bpgen/sn_humanio_rbus.vbom
../../../vlib/rlink/rlink_sp1c.vbom
../../../bplib/fx2rlink/rlink_sp1c_fx2.vbom
../../../bplib/fx2rlink/ioleds_sp1c_fx2.vbom
../../../vlib/rbus/rb_sres_or_3.vbom
../../../w11a/pdp11_core_rbus.vbom
../../../w11a/pdp11_core.vbom

86
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_w11a_n2.vhd 476 2013-01-26 22:23:53Z mueller $
-- $Id: sys_w11a_n2.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,7 +19,8 @@
-- vlib/genlib/clkdivce
-- bplib/bpgen/bp_rs232_2l4l_iob
-- bplib/bpgen/sn_humanio_rbus
-- vlib/rlink/rlink_sp1c
-- bplib/fx2rlink/rlink_sp1c_fx2
-- bplib/fx2rlink/ioleds_sp1c_fx2
-- vlib/rri/rb_sres_or_3
-- w11a/pdp11_core_rbus
-- w11a/pdp11_core
@@ -40,6 +41,7 @@
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2013-04-20 509 13.3 O76d xc3s1200e-4 1541 4598 334 2889 ok: now + FX2 !
-- 2011-12-18 440 13.1 O40d xc3s1200e-4 1450 4439 270 2740 ok: LP+PC+DL+II
-- 2011-11-18 427 13.1 O40d xc3s1200e-4 1433 4374 242 2680 ok: LP+PC+DL+II
-- 2010-12-30 351 12.1 M53d xc3s1200e-4 1389 4368 242 2674 ok: LP+PC+DL+II
@@ -64,6 +66,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-20 509 1.4 added fx2 (cuff) support; ATOWIDTH=7
-- 2011-12-23 444 1.3 remove clksys output hack
-- 2011-12-18 440 1.2.7 use rlink_sp1c
-- 2011-11-26 433 1.2.6 use nx_cram_(dummy|memctl_as) now
@@ -92,13 +95,15 @@
------------------------------------------------------------------------------
--
-- w11a test design for nexys2
-- w11a + rlink + serport
-- w11a + rlink + serport + cuff
--
-- Usage of Nexys 2 Switches, Buttons, LEDs:
--
-- SWI(7:2): no function (only connected to sn_humanio_rbus)
-- SWI(1): 1 enable XON
-- SWI(0): 0 -> main board RS232 port
-- SWI(7:3): no function (only connected to sn_humanio_rbus)
-- (2) 0 -> int/ext RS242 port for rlink
-- 1 -> use USB interface for rlink
-- (1): 1 enable XON
-- (0): 0 -> main board RS232 port
-- 1 -> Pmod B/top RS232 port
--
-- LED(7) MEM_ACT_W
@@ -114,10 +119,17 @@
-- (3:0) cpurust code
-- (4) '1'
--
-- DP(3): not SER_MONI.txok (shows tx back preasure)
-- DP(2): SER_MONI.txact (shows tx activity)
-- DP(1): not SER_MONI.rxok (shows rx back preasure)
-- DP(0): SER_MONI.rxact (shows rx activity)
-- DP(3:0) shows IO activity
-- if SWI(2)=0 (serport)
-- (3): not SER_MONI.txok (shows tx back preasure)
-- (2): SER_MONI.txact (shows tx activity)
-- (1): not SER_MONI.rxok (shows rx back preasure)
-- (0): SER_MONI.rxact (shows rx activity)
-- if SWI(2)=1 (fx2-usb)
-- (3): RB_SRES.busy (shows rbus back preasure)
-- (2): RLB_TXBUSY (shows tx back preasure)
-- (1): RLB_TXENA (shows tx activity)
-- (0): RLB_RXVAL (shows rx activity)
--
library ieee;
@@ -130,6 +142,8 @@ use work.genlib.all;
use work.serportlib.all;
use work.rblib.all;
use work.rlinklib.all;
use work.fx2lib.all;
use work.fx2rlinklib.all;
use work.bpgenlib.all;
use work.bpgenrbuslib.all;
use work.nxcramlib.all;
@@ -141,7 +155,7 @@ use work.sys_conf.all;
-- ----------------------------------------------------------------------------
entity sys_w11a_n2 is -- top level
-- implements nexys2_fusp_aif
-- implements nexys2_fusp_cuff_aif
port (
I_CLK50 : in slbit; -- 50 MHz clock
I_RXD : in slbit; -- receive data (board view)
@@ -165,7 +179,15 @@ entity sys_w11a_n2 is -- top level
O_FUSP_RTS_N : out slbit; -- fusp: rs232 rts_n
I_FUSP_CTS_N : in slbit; -- fusp: rs232 cts_n
I_FUSP_RXD : in slbit; -- fusp: rs232 rx
O_FUSP_TXD : out slbit -- fusp: rs232 tx
O_FUSP_TXD : out slbit; -- fusp: rs232 tx
I_FX2_IFCLK : in slbit; -- fx2: interface clock
O_FX2_FIFO : out slv2; -- fx2: fifo address
I_FX2_FLAG : in slv4; -- fx2: fifo flags
O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low)
O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low)
O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low)
O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low)
IO_FX2_DATA : inout slv8 -- fx2: data lines
);
end sys_w11a_n2;
@@ -187,7 +209,9 @@ architecture syn of sys_w11a_n2 is
signal RB_LAM : slv16 := (others=>'0');
signal RB_STAT : slv3 := (others=>'0');
signal RLB_MONI : rlb_moni_type := rlb_moni_init;
signal SER_MONI : serport_moni_type := serport_moni_init;
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
@@ -316,13 +340,15 @@ begin
O_SEG_N => O_SEG_N
);
RLINK : rlink_sp1c
RLINK : rlink_sp1c_fx2
generic map (
ATOWIDTH => 6, -- 64 cycles access timeout
ATOWIDTH => 7, -- 128 cycles access timeout
ITOWIDTH => 6, -- 64 periods max idle timeout
CPREF => c_rlink_cpref,
IFAWIDTH => 5, -- 32 word input fifo
OFAWIDTH => 5, -- 32 word output fifo
PETOWIDTH => sys_conf_fx2_petowidth,
CCWIDTH => sys_conf_fx2_ccwidth,
ENAPIN_RLMON => sbcntl_sbf_rlmon,
ENAPIN_RBMON => sbcntl_sbf_rbmon,
CDWIDTH => 13,
@@ -335,6 +361,7 @@ begin
RESET => RESET,
ENAXON => SWI(1),
ENAESC => SWI(1),
ENAFX2 => SWI(2),
RXSD => RXD,
TXSD => TXD,
CTS_N => CTS_N,
@@ -344,7 +371,17 @@ begin
RB_LAM => RB_LAM,
RB_STAT => RB_STAT,
RL_MONI => open,
SER_MONI => SER_MONI
RLB_MONI => RLB_MONI,
SER_MONI => SER_MONI,
FX2_MONI => FX2_MONI,
I_FX2_IFCLK => I_FX2_IFCLK,
O_FX2_FIFO => O_FX2_FIFO,
I_FX2_FLAG => I_FX2_FLAG,
O_FX2_SLRD_N => O_FX2_SLRD_N,
O_FX2_SLWR_N => O_FX2_SLWR_N,
O_FX2_SLOE_N => O_FX2_SLOE_N,
O_FX2_PKTEND_N => O_FX2_PKTEND_N,
IO_FX2_DATA => IO_FX2_DATA
);
RB_SRES_OR : rb_sres_or_3
@@ -557,12 +594,19 @@ begin
);
end generate IBD_MAXI;
DSP_DAT(15 downto 0) <= DISPREG;
IOLEDS : ioleds_sp1c_fx2
port map (
CLK => CLK,
CE_USEC => CE_USEC,
RESET => CPU_RESET,
ENAFX2 => SWI(2),
RB_SRES => RB_SRES,
RLB_MONI => RLB_MONI,
SER_MONI => SER_MONI,
IOLEDS => DSP_DP
);
DSP_DP(3) <= not SER_MONI.txok;
DSP_DP(2) <= SER_MONI.txact;
DSP_DP(1) <= not SER_MONI.rxok;
DSP_DP(0) <= SER_MONI.rxact;
DSP_DAT(15 downto 0) <= DISPREG;
proc_led: process (MEM_ACT_W, MEM_ACT_R, CP_STAT, DM_STAT_DP.psw)
variable iled : slv8 := (others=>'0');

9
rtl/sys_gen/w11a/nexys2/tb/sys_conf_sim.vhd
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@@ -1,6 +1,6 @@
-- $Id: sys_conf_sim.vhd 433 2011-11-27 22:04:39Z mueller $
-- $Id: sys_conf_sim.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2010- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,6 +19,7 @@
-- Tool versions: xst 11.4, 13.1; ghdl 0.26-0.29
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-27 433 1.1.1 use /1*1 to skip dcm in sim, _ssim fails with dcm
-- 2010-11-27 341 1.1 add dcm and memctl related constants (clksys=58)
-- 2010-05-28 295 1.0 Initial version (cloned from _s3)
@@ -41,6 +42,10 @@ package sys_conf is
constant sys_conf_memctl_writedelay : positive := 4;
constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;
constant sys_conf_hio_debounce : boolean := false; -- no debouncers

6
rtl/sys_gen/w11a/nexys2/tb/tb_w11a_n2.vbom
View File

@@ -1,7 +1,7 @@
# configure tb_nexys2_fusp with sys_w11a_n2 target;
# configure tb_nexys2_fusp_cuff with sys_w11a_n2 target;
# use vhdl configure file (tb_w11a_n2.vhd) to allow
# that all configurations will co-exist in work library
nexys2_fusp_aif = ../sys_w11a_n2.vbom
nexys2_fusp_cuff_aif = ../sys_w11a_n2.vbom
sys_conf = sys_conf_sim.vhd
../../../../bplib/nexys2/tb/tb_nexys2_fusp.vbom
../../../../bplib/nexys2/tb/tb_nexys2_fusp_cuff.vbom
tb_w11a_n2.vhd

11
rtl/sys_gen/w11a/nexys2/tb/tb_w11a_n2.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: tb_w11a_n2.vhd 314 2010-07-09 17:38:41Z mueller $
-- $Id: tb_w11a_n2.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2010- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -13,7 +13,7 @@
--
------------------------------------------------------------------------------
-- Module Name: tb_w11a_n2
-- Description: Configuration for tb_w11a_n2 for tb_nexys2_fusp
-- Description: Configuration for tb_w11a_n2 for tb_nexys2_fusp_cuff
--
-- Dependencies: sys_w11a_n2
--
@@ -26,13 +26,14 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.1 now based on tb_nexys2_fusp_cuff
-- 2010-05-26 295 1.0 Initial version (cloned from _s3)
------------------------------------------------------------------------------
configuration tb_w11a_n2 of tb_nexys2_fusp is
configuration tb_w11a_n2 of tb_nexys2_fusp_cuff is
for sim
for all : nexys2_fusp_aif
for all : nexys2_fusp_cuff_aif
use entity work.sys_w11a_n2;
end for;
end for;

1
rtl/sys_gen/w11a/nexys3/.cvsignore
View File

@@ -2,3 +2,4 @@ sys_w11a_n3.ucf
*.dep_ucf_cpp
log_*
_impact*
*.svf

4
rtl/sys_gen/w11a/nexys3/Makefile
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@@ -1,13 +1,15 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 509 2013-04-21 20:46:20Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-04-20 509 1.2 add fx2 support
# 2011-11-20 430 1.0 Initial version (derived from _n2 version)
#
VBOM_all = $(wildcard *.vbom)
BIT_all = $(VBOM_all:.vbom=.bit)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
FX2_FILE = nexys3_jtag_2fifo_ic.ihx
#
.PHONY : all clean
#

9
rtl/sys_gen/w11a/nexys3/sys_conf.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf.vhd 433 2011-11-27 22:04:39Z mueller $
-- $Id: sys_conf.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,6 +19,7 @@
-- Tool versions: xst 13.1; ghdl 0.29
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.1 add fx2 settings
-- 2011-11-26 433 1.0.1 use 80 MHz clksys (no closure for 85 after rev 432)
-- 2011-11-20 430 1.0 Initial version (derived from _n2 version)
------------------------------------------------------------------------------
@@ -48,6 +49,10 @@ package sys_conf is
constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;
constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers
constant sys_conf_bram : integer := 0; -- no bram, use cache

8
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.ucf_cpp
View File

@@ -1,7 +1,8 @@
## $Id: sys_w11a_n3.ucf_cpp 430 2011-11-20 20:48:39Z mueller $
## $Id: sys_w11a_n3.ucf_cpp 509 2013-04-21 20:46:20Z mueller $
##
## Revision History:
## Date Rev Version Comment
## 2013-04-21 509 1.1 add fx2 support
## 2011-11-20 430 1.0 Initial version
##
@@ -17,3 +18,8 @@ OFFSET = OUT 20 ns AFTER "I_CLK100";
## Pmod B0 - RS232
##
#include "bplib/nexys3/nexys3_pins_pmb0_rs232.ucf"
##
## Cypress FX2
##
#include "bplib/nexys3/nexys3_pins_fx2.ucf"
#include "bplib/nexys3/nexys3_time_fx2_ic.ucf"

5
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vbom
View File

@@ -5,6 +5,8 @@
../../../vlib/serport/serportlib.vbom
../../../vlib/rbus/rblib.vhd
../../../vlib/rlink/rlinklib.vbom
../../../bplib/fx2lib/fx2lib.vhd
../../../bplib/fx2rlink/fx2rlinklib.vbom
../../../bplib/bpgen/bpgenlib.vbom
../../../bplib/bpgen/bpgenrbuslib.vbom
../../../bplib/nxcramlib/nxcramlib.vhd
@@ -18,7 +20,8 @@ sys_conf = sys_conf.vhd
../../../vlib/genlib/clkdivce.vbom
../../../bplib/bpgen/bp_rs232_2l4l_iob.vbom
../../../bplib/bpgen/sn_humanio_rbus.vbom
../../../vlib/rlink/rlink_sp1c.vbom
../../../bplib/fx2rlink/rlink_sp1c_fx2.vbom
../../../bplib/fx2rlink/ioleds_sp1c_fx2.vbom
../../../vlib/rbus/rb_sres_or_3.vbom
../../../w11a/pdp11_core_rbus.vbom
../../../w11a/pdp11_core.vbom

78
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_w11a_n3.vhd 476 2013-01-26 22:23:53Z mueller $
-- $Id: sys_w11a_n3.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,7 +19,8 @@
-- vlib/genlib/clkdivce
-- bplib/bpgen/bp_rs232_2l4l_iob
-- bplib/bpgen/sn_humanio_rbus
-- vlib/rlink/rlink_sp1c
-- bplib/fx2rlink/rlink_sp1c_fx2
-- bplib/fx2rlink/ioleds_sp1c_fx2
-- vlib/rri/rb_sres_or_3
-- w11a/pdp11_core_rbus
-- w11a/pdp11_core
@@ -40,11 +41,13 @@
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2013-04-21 509 13.3 O76d xc6slx16-2 1516 3274 140 1184 ok: now + FX2 !
-- 2011-12-18 440 13.1 O40d xc6slx16-2 1441 3161 96 1084 ok: LP+PC+DL+II
-- 2011-11-20 430 13.1 O40d xc6slx16-2 1412 3206 84 1063 ok: LP+PC+DL+II
--
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.4 added fx2 (cuff) support
-- 2011-12-18 440 1.0.4 use rlink_sp1c
-- 2011-12-04 435 1.0.3 increase ATOWIDTH 6->7 (saw i/o timeouts on wblks)
-- 2011-11-26 433 1.0.2 use nx_cram_(dummy|memctl_as) now
@@ -57,7 +60,9 @@
--
-- Usage of Nexys 3 Switches, Buttons, LEDs:
--
-- SWI(7:2): no function (only connected to sn_humanio_rbus)
-- SWI(7:3): no function (only connected to sn_humanio_rbus)
-- (2) 0 -> int/ext RS242 port for rlink
-- 1 -> use USB interface for rlink
-- SWI(1): 1 enable XON
-- SWI(0): 0 -> main board RS232 port
-- 1 -> Pmod B/top RS232 port
@@ -75,10 +80,17 @@
-- (3:0) cpurust code
-- (4) '1'
--
-- DP(3): not SER_MONI.txok (shows tx back preasure)
-- DP(2): SER_MONI.txact (shows tx activity)
-- DP(1): not SER_MONI.rxok (shows rx back preasure)
-- DP(0): SER_MONI.rxact (shows rx activity)
-- DP(3:0) shows IO activity
-- if SWI(2)=0 (serport)
-- (3): not SER_MONI.txok (shows tx back preasure)
-- (2): SER_MONI.txact (shows tx activity)
-- (1): not SER_MONI.rxok (shows rx back preasure)
-- (0): SER_MONI.rxact (shows rx activity)
-- if SWI(2)=1 (fx2-usb)
-- (3): RB_SRES.busy (shows rbus back preasure)
-- (2): RLB_TXBUSY (shows tx back preasure)
-- (1): RLB_TXENA (shows tx activity)
-- (0): RLB_RXVAL (shows rx activity)
--
library ieee;
@@ -91,6 +103,8 @@ use work.genlib.all;
use work.serportlib.all;
use work.rblib.all;
use work.rlinklib.all;
use work.fx2lib.all;
use work.fx2rlinklib.all;
use work.bpgenlib.all;
use work.bpgenrbuslib.all;
use work.nxcramlib.all;
@@ -102,7 +116,7 @@ use work.sys_conf.all;
-- ----------------------------------------------------------------------------
entity sys_w11a_n3 is -- top level
-- implements nexys3_fusp_aif
-- implements nexys3_fusp_cuff_aif
port (
I_CLK100 : in slbit; -- 100 MHz clock
I_RXD : in slbit; -- receive data (board view)
@@ -127,7 +141,15 @@ entity sys_w11a_n3 is -- top level
O_FUSP_RTS_N : out slbit; -- fusp: rs232 rts_n
I_FUSP_CTS_N : in slbit; -- fusp: rs232 cts_n
I_FUSP_RXD : in slbit; -- fusp: rs232 rx
O_FUSP_TXD : out slbit -- fusp: rs232 tx
O_FUSP_TXD : out slbit; -- fusp: rs232 tx
I_FX2_IFCLK : in slbit; -- fx2: interface clock
O_FX2_FIFO : out slv2; -- fx2: fifo address
I_FX2_FLAG : in slv4; -- fx2: fifo flags
O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low)
O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low)
O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low)
O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low)
IO_FX2_DATA : inout slv8 -- fx2: data lines
);
end sys_w11a_n3;
@@ -149,7 +171,9 @@ architecture syn of sys_w11a_n3 is
signal RB_LAM : slv16 := (others=>'0');
signal RB_STAT : slv3 := (others=>'0');
signal RLB_MONI : rlb_moni_type := rlb_moni_init;
signal SER_MONI : serport_moni_type := serport_moni_init;
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
@@ -279,13 +303,15 @@ begin
O_SEG_N => O_SEG_N
);
RLINK : rlink_sp1c
RLINK : rlink_sp1c_fx2
generic map (
ATOWIDTH => 7, -- 128 cycles access timeout
ITOWIDTH => 6, -- 64 periods max idle timeout
CPREF => c_rlink_cpref,
IFAWIDTH => 5, -- 32 word input fifo
OFAWIDTH => 5, -- 32 word output fifo
PETOWIDTH => sys_conf_fx2_petowidth,
CCWIDTH => sys_conf_fx2_ccwidth,
ENAPIN_RLMON => sbcntl_sbf_rlmon,
ENAPIN_RBMON => sbcntl_sbf_rbmon,
CDWIDTH => 13,
@@ -298,6 +324,7 @@ begin
RESET => RESET,
ENAXON => SWI(1),
ENAESC => SWI(1),
ENAFX2 => SWI(2),
RXSD => RXD,
TXSD => TXD,
CTS_N => CTS_N,
@@ -307,7 +334,17 @@ begin
RB_LAM => RB_LAM,
RB_STAT => RB_STAT,
RL_MONI => open,
SER_MONI => SER_MONI
RLB_MONI => RLB_MONI,
SER_MONI => SER_MONI,
FX2_MONI => FX2_MONI,
I_FX2_IFCLK => I_FX2_IFCLK,
O_FX2_FIFO => O_FX2_FIFO,
I_FX2_FLAG => I_FX2_FLAG,
O_FX2_SLRD_N => O_FX2_SLRD_N,
O_FX2_SLWR_N => O_FX2_SLWR_N,
O_FX2_SLOE_N => O_FX2_SLOE_N,
O_FX2_PKTEND_N => O_FX2_PKTEND_N,
IO_FX2_DATA => IO_FX2_DATA
);
RB_SRES_OR : rb_sres_or_3
@@ -522,12 +559,19 @@ begin
);
end generate IBD_MAXI;
DSP_DAT(15 downto 0) <= DISPREG;
IOLEDS : ioleds_sp1c_fx2
port map (
CLK => CLK,
CE_USEC => CE_USEC,
RESET => CPU_RESET,
ENAFX2 => SWI(2),
RB_SRES => RB_SRES,
RLB_MONI => RLB_MONI,
SER_MONI => SER_MONI,
IOLEDS => DSP_DP
);
DSP_DP(3) <= not SER_MONI.txok;
DSP_DP(2) <= SER_MONI.txact;
DSP_DP(1) <= not SER_MONI.rxok;
DSP_DP(0) <= SER_MONI.rxact;
DSP_DAT(15 downto 0) <= DISPREG;
proc_led: process (MEM_ACT_W, MEM_ACT_R, CP_STAT, DM_STAT_DP.psw)
variable iled : slv8 := (others=>'0');

9
rtl/sys_gen/w11a/nexys3/tb/sys_conf_sim.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf_sim.vhd 433 2011-11-27 22:04:39Z mueller $
-- $Id: sys_conf_sim.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -19,6 +19,7 @@
-- Tool versions: xst 13.1; ghdl 0.29
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-25 432 1.0 Initial version (cloned from _n3)
------------------------------------------------------------------------------
@@ -40,6 +41,10 @@ package sys_conf is
constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;
constant sys_conf_hio_debounce : boolean := false; -- no debouncers
constant sys_conf_bram : integer := 0; -- no bram, use cache

4
rtl/sys_gen/w11a/nexys3/tb/tb_w11a_n3.vbom
View File

@@ -1,7 +1,7 @@
# configure tb_nexys3_fusp with sys_w11a_n3 target;
# use vhdl configure file (tb_w11a_n3.vhd) to allow
# that all configurations will co-exist in work library
nexys3_fusp_aif = ../sys_w11a_n3.vbom
nexys3_fusp_cuff_aif = ../sys_w11a_n3.vbom
sys_conf = sys_conf_sim.vhd
../../../../bplib/nexys3/tb/tb_nexys3_fusp.vbom
../../../../bplib/nexys3/tb/tb_nexys3_fusp_cuff.vbom
tb_w11a_n3.vhd

11
rtl/sys_gen/w11a/nexys3/tb/tb_w11a_n3.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: tb_w11a_n3.vhd 432 2011-11-25 20:16:28Z mueller $
-- $Id: tb_w11a_n3.vhd 509 2013-04-21 20:46:20Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -13,7 +13,7 @@
--
------------------------------------------------------------------------------
-- Module Name: tb_w11a_n3
-- Description: Configuration for tb_w11a_n3 for tb_nexys3_fusp
-- Description: Configuration for tb_w11a_n3 for tb_nexys3_fusp_cuff
--
-- Dependencies: sys_w11a_n3
--
@@ -26,13 +26,14 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2013-04-21 509 1.1 now based on tb_nexys3_fusp_cuff
-- 2011-11-25 432 1.0 Initial version (cloned from _n2)
------------------------------------------------------------------------------
configuration tb_w11a_n3 of tb_nexys3_fusp is
configuration tb_w11a_n3 of tb_nexys3_fusp_cuff is
for sim
for all : nexys3_fusp_aif
for all : nexys3_fusp_cuff_aif
use entity work.sys_w11a_n3;
end for;
end for;

1
rtl/sys_gen/w11a/s3board/.cvsignore
View File

@@ -2,3 +2,4 @@ sys_w11a_s3.ucf
*.dep_ucf_cpp
log_*
_impact*
*.svf

38
rtl/sys_gen/w11a/tb/211bsd_rk_boot.tcl Normal file
View File

@@ -0,0 +1,38 @@
# $Id: 211bsd_rk_boot.tcl 511 2013-04-27 13:51:46Z mueller $
#
# Setup file for 211bsd RK based system (w11a, in sys/tb area...)
#
# Usage:
#
# telnet_starter -d DL0 &
# telnet_starter -d DL1 &
# torri -xxx @211bsd_rk_boot.tcl ( -xxx depends on sim or fpga connect)
#
# setup w11 cpu
puts [rlw]
# 2.11 bsd uses parity, so strip it
cpu0tta0 set to7bit 1
cpu0ttb0 set to7bit 1
# setup tcp links for terminals
cpu0tta0 att "tcp:?port=8000"
cpu0ttb0 att "tcp:?port=8001"
# setup log files
cpu0tta0 set log "tt_dl0.log?crlf"
cpu0ttb0 set log "tt_dl1.log?crlf"
# mount disks
cpu0rka0 att 211bsd_rk_root.dsk
cpu0rka1 att 211bsd_rk_swap.dsk
cpu0rka2 att 211bsd_rk_tmp.dsk
cpu0rka3 att 211bsd_rk_bin.dsk
cpu0rka4 att 211bsd_rk_usr.dsk
# and boot
#cpu0rka set trace 1
rw11::cpumon
rw11::cpucons
cpu0 boot rka0

4
rtl/sys_gen/w11a/tb/dorri
View File

@@ -1,5 +1,5 @@
#!/usr/bin/perl -w
# $Id: dorri 503 2013-04-06 19:44:13Z mueller $
# $Id: dorri 510 2013-04-26 16:14:57Z mueller $
#
# Revision History:
# Date Rev Version Comment
@@ -139,7 +139,7 @@ if ($opt_io eq "f") {
} elsif ($opt_io eq "t") {
push @arglist, "--term=$val_term";
} else {
print STDERR "dorri-E: neither -s3/-n2/-n3 nor -t specified\n";
print STDERR "dorri-E: neither -s3/-n2/-n3 nor -t or -u specified\n";
print_usage();
exit 1;
}

229
rtl/sys_gen/w11a/tb/torri Executable file
View File

@@ -0,0 +1,229 @@
#!/usr/bin/perl -w
# $Id: torri 511 2013-04-27 13:51:46Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-04-26 510 1.0 Initial version (derived from dorri)
#
use 5.005; # require Perl 5.005 or higher
use strict; # require strict checking
use FileHandle;
sub print_usage;
autoflush STDOUT 1; # autoflush, so noting lost on exec later
my $opt_b;
my $opt_io = '';
my $opt_f = '';
my $opt_tmu;
my $tirri;
my $val_term;
my $val_tb_s3='tbw ../s3board/tb/tb_w11a_s3';
my $val_tb_n2='tbw ../nexys2/tb/tb_w11a_n2';
my $val_tb_n3='tbw ../nexys3/tb/tb_w11a_n3';
my $val_tb;
my $val_e;
my @arglist;
#
# process torri options
#
while (scalar(@ARGV)) {
my $curarg = $ARGV[0];
if ($curarg =~ m{^-b$} ) { # -b
$opt_b = 1;
shift @ARGV;
} elsif ($curarg =~ m{^-tmu$} ) { # -tmu
$opt_tmu = 1;
shift @ARGV;
} elsif ($curarg =~ m{^-s3$} ) { # -s3
$opt_io = 'f';
$val_tb = $val_tb_s3;
shift @ARGV;
} elsif ($curarg =~ m{^-n2$} ) { # -n2
$opt_io = 'f';
$val_tb = $val_tb_n2;
shift @ARGV;
} elsif ($curarg =~ m{^-n3$} ) { # -n3
$opt_io = 'f';
$val_tb = $val_tb_n3;
shift @ARGV;
} elsif ($curarg =~ m{^-f(s\d?|u)$} ) { # -f[su]
$opt_f = $1;
shift @ARGV;
} elsif ($curarg =~ m{^-t([su])(\d?),?} ) { # -t[su]...
my $devnam = ($1 eq 's') ? '/dev/ttyS' : '/dev/ttyUSB';
my $devnum = $2;
my ($dev,$baud,$opt1,$opt2) = split /,/,$curarg;
$baud = '115k' unless defined $baud;
if ($baud !~ m{^\d*k?$}) {
print STDERR "torri-E: invalid format of -ts or -tu option\n";
exit 1;
}
$opt_io = 't';
$val_term = sprintf '%s%d,%s', $devnam, $devnum, $baud;
$val_term .= ",$opt1" if defined $opt1;
$val_term .= ",$opt2" if defined $opt2;
shift @ARGV;
} elsif ($curarg =~ m{^-u$} ) { # -u
$opt_io = 'u';
shift @ARGV;
} elsif ($curarg =~ m{^-e$} ) { # -e <file>
print STDERR "torri-W: multiple -e options, only last taken\n"
if defined $val_e;
shift @ARGV;
if (scalar(@ARGV) == 0 || $ARGV[0] =~ m{^-}) {
print STDERR "torri-E: no file name after -e option\n";
exit 1;
} else {
$val_e = shift @ARGV;
if (not -r $val_e) {
print STDERR "torri-E: file '$val_e' not found\n";
exit 1;
}
}
} else {
last;
}
}
#
# check that either -s3/n2/n3 or -t or -u given
# setup pi_rri options for either case
#
if ($opt_io eq 'f') {
push @arglist, '--fifo';
push @arglist, "--run=$val_tb";
} elsif ($opt_io eq 't') {
push @arglist, "--term=$val_term";
} elsif ($opt_io eq 'u') {
push @arglist, '--cuff';
} else {
print STDERR "torri-E: neither -s3/-n2/-n3 nor -t or -u specified\n";
print_usage();
exit 1;
}
#
# setup all other ti_rri options
#
push @arglist, '--logl=2';
push @arglist, '--int' unless $opt_b;
push @arglist, '--pack=rw11';
push @arglist, '--';
#
# actions prior to first exec
# setup tmu ect
# setup access path --> handle -f options
#
if ($opt_io eq 'f') {
if ($opt_tmu) {
push @arglist, 'rlc oob -sbcntl 13 1';
}
if ($opt_f eq 'u') {
push @arglist, 'rlc oob -sbdata 8 0x2';
push @arglist, 'rlc oob -sbdata 16 0x4';
}
}
#
# initialize w11 cpu system
#
push @arglist, 'rw11::setup_sys';
#
# handle -e option
#
if (defined $val_e) {
if ($val_e =~ m/\.mac$/) {
push @arglist, "cpu0 ldasm -file $val_e -sym ldasm_sym -lst ldasm_lst";
} else {
push @arglist, "cpu0 ldabs $val_e";
}
push @arglist, 'rw11::cpumon';
push @arglist, 'rw11::cpucons';
push @arglist, 'cpu0 cp -stapc 0200';
}
#
# all remaining commands
#
while (scalar(@ARGV)) {
my $curarg = shift @ARGV;
if ($curarg =~ m{^@(.*)$} && ! -r $1) {
print STDERR "torri-E: file '$1' not found\n";
exit 1;
}
push @arglist,$curarg;
}
#
# find ti_rri executable
#
$tirri=`which ti_rri`;
chomp $tirri;
if ($tirri eq '' || ! -e $tirri) {
print STDERR "torri-E: failed to locate ti_rri\n";
exit 1;
}
#
# print command file
#
if (1) {
print 'ti_rri ', join (' ', map {(m{\s}) ? "\"$_\"" : $_} @arglist) , "\n";
}
#
# and do it
#
exec $tirri, @arglist
or die "failed to exec: $!";
exit 1;
# ----------------------------------------------------------------------------
sub print_usage {
print "usage: torri <setup options> <ti_rri opts and cmds>...\n";
print " setup options for ghdl simulation runs:\n";
print " -s3 start tb_w11a_s3 simulation\n";
print " -n2 start tb_w11a_n2 simulation\n";
print " -n3 start tb_w11a_n3 simulation\n";
print " -f.. simulation communication options\n";
print " -fu use cuff data path\n";
print " -tmu activate trace and monitoring unit\n";
print " setup options for FPGA connects:\n";
print " -u use --cuff connect\n";
print " -t.. use --term connect\n";
print " -ts*[,opts] use /dev/ttyS* (* is device number)\n";
print " -tu*[,opts] use /dev/ttyUSB* (* is device number)\n";
print " opts can be ',break', ',xon'\n";
print " common options:\n";
print " -e <file> load and execute file\n";
print " file type '.mac': on the fly compile with asm-11\n";
print " any other file type: assume lda format\n";
print "\n";
print " either one of -s3,-n2, or -n3 must be given -> sim run\n";
print " or one of -t or -u must be given -> fpga run\n";
}

29
rtl/sys_gen/w11a/tb/uv5_boot.tcl Normal file
View File

@@ -0,0 +1,29 @@
# $Id: uv5_boot.tcl 511 2013-04-27 13:51:46Z mueller $
#
# Setup file for Unix V5 System
#
# Usage:
#
# telnet_starter -d DL0 &
# torri -xxx @uv5_boot.tcl ( -xxx depends on sim or fpga connect)
# setup w11 cpu
puts [rlw]
# 2.11 bsd uses parity, so strip it
cpu0tta0 set to7bit 1
# setup tcp links for terminals
cpu0tta0 att "tcp:?port=8000"
# setup log files
cpu0tta0 set log "tt_dl0.log?crlf"
# mount disks
cpu0rka0 att unix_v5_rk.dsk
# and boot
#cpu0rka set trace 1
rw11::cpumon
rw11::cpucons
cpu0 boot rka0