From bb8669630b0e37f72470dbeb84e08e7d5b386328 Mon Sep 17 00:00:00 2001 From: wfjm Date: Fri, 1 Feb 2019 18:43:16 +0100 Subject: [PATCH] minor docu updates --- doc/README_buildsystem_Vivado.md | 9 ++++++--- doc/w11a_known_issues.md | 15 ++++++++------- tools/man/man1/vbomconv.1 | 4 ++-- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/doc/README_buildsystem_Vivado.md b/doc/README_buildsystem_Vivado.md index de58d4f5..dbdb44c7 100644 --- a/doc/README_buildsystem_Vivado.md +++ b/doc/README_buildsystem_Vivado.md @@ -141,7 +141,8 @@ work areas, but in general this is not needed (since V0.73). Notes: - Many post-synthesis functional currently fail due to startup and - initialization problems (see issue V0.73-2). + initialization problems + (see [issue #10](https://github.com/wfjm/w11/issues/10)). #### With Vivado xsim @@ -169,10 +170,12 @@ functional and timing models. Notes: - as of vivado 2016.2 `xelab` shows sometimes extremely long build times, - especially for generated post-synthesis vhdl models (see issue V0.73-1). + especially for generated post-synthesis vhdl models + (see [issue #9](https://github.com/wfjm/w11/issues/9)). - Many post-synthesis functional and especially post-routing timing simulations currently fail due to startup and initialization problems - (see issue V0.73-2). + (see [issue #10](https://github.com/wfjm/w11/issues/10)). + ### Building FPGA bit files diff --git a/doc/w11a_known_issues.md b/doc/w11a_known_issues.md index 91535eba..5627b00f 100644 --- a/doc/w11a_known_issues.md +++ b/doc/w11a_known_issues.md @@ -5,7 +5,7 @@ General issues are listed on a separate document This file descibes issues of the w11 CPU. -###Table of content +### Table of content - [Known differences between w11a and KB11-C (11/70)](#user-content-diff) - [Known limitations](#user-content-lim) @@ -16,12 +16,13 @@ This file descibes issues of the w11 CPU. - the `SPL` instruction in the 11/70 always fetched the next instruction regardless of pending device or even console interrupts. This is known as the infamous _spl bug_, see - - http://minnie.tuhs.org/pipermail/tuhs/2006-September/001086.html - - http://minnie.tuhs.org/pipermail/tuhs/2006-October/001087.html - - http://minnie.tuhs.org/pipermail/tuhs/2006-October/001088.html - - http://minnie.tuhs.org/pipermail/tuhs/2006-October/001089.html - - http://minnie.tuhs.org/pipermail/tuhs/2006-October/001095.html - - http://minnie.tuhs.org/pipermail/tuhs/2006-October/001096.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-September/002692.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002693.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002694.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002695.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002701.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002695.html + - https://minnie.tuhs.org/pipermail/tuhs/2006-October/002702.html In the w11a the `SPL` has 11/70 semantics in kernel mode, thus next no traps or interrupts, but in supervisor and user mode `SPL` really acts as diff --git a/tools/man/man1/vbomconv.1 b/tools/man/man1/vbomconv.1 index 95a32f51..f7da0f49 100644 --- a/tools/man/man1/vbomconv.1 +++ b/tools/man/man1/vbomconv.1 @@ -1,5 +1,5 @@ .\" -*- nroff -*- -.\" $Id: vbomconv.1 1076 2018-12-02 12:45:49Z mueller $ +.\" $Id: vbomconv.1 1107 2019-01-27 12:54:48Z mueller $ .\" .\" Copyright 2010-2018 by Walter F.J. Mueller .\" @@ -406,7 +406,7 @@ proper compilation order. .\" ---------------------------------------------- .TP .B \-\-vsim_prj -This action writes to \fIstdout\fP a shell script which will generated the +This action writes to \fIstdout\fP a shell script which will generate the Vivado simulation snapshot and a short forwarder script for starting the simulation. .