1
0
mirror of https://github.com/wfjm/w11.git synced 2026-01-13 15:37:43 +00:00

use call+return+push+pop

- tools/tcode/*.mac: use call+return+push+pop
- tools/asm-11
  - lib/push_pop.mac: added, contains push/pop macros
  - lib/tcode_std_start.mac: include push_pop.mac; ensure PRI=0 at start
  - tests/test_0170_misc.mac: added, verifies call,return response
This commit is contained in:
wfjm 2022-07-30 11:14:57 +02:00
parent 1f7cf00c35
commit c3f36925c2
6 changed files with 156 additions and 116 deletions

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@ -0,0 +1,19 @@
; $Id: push_pop.mac 1264 2022-07-30 07:42:17Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Macros for stack handling: push/pop and pushb/popb
;
.macro push,src
mov src,-(sp)
.endm
.macro pushb,src
movb src,-(sp)
.endm
;
.macro pop,dst
mov (sp)+,dst
.endm
.macro popb,dst
movb (sp)+,dst
.endm

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@ -1,6 +1,6 @@
; $Id: tcode_std_start.mac 1262 2022-07-25 09:44:55Z mueller $
; $Id: tcode_std_start.mac 1263 2022-07-28 09:00:42Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Default tcode startup code
;
@ -12,6 +12,7 @@
.include |lib/vec_devcatch.mac|
;
.include |lib/halt_checks.mac|
.include |lib/push_pop.mac|
;
. = 000200
jmp @#start
@ -33,6 +34,7 @@ runno: .word 0 ; run number
;
start: reset ; general reset
mov #stack,sp ; setup stack
spl 0 ; ensure PR0, ignore startup state
;
mov #v..lp+2,v..lp ; setup LP11 vector catcher
clr v..lp

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@ -0,0 +1,19 @@
; $Id: test_0170_misc.mac 1262 2022-07-25 09:44:55Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; test special pst entries call and return
;
.asect
.blkw 400
; call/return
call sub1 ;!! 001000: 004767 000006
call @psub1 ;!! 001004: 004777 000004
call (r1) ;!! 001010: 004711
sub1: return ;!! 001012: 000207
psub1: .word sub1 ;!! 001014: 001012
.end

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@ -1,10 +1,10 @@
; $Id: cpu_basics.mac 1262 2022-07-25 09:44:55Z mueller $
; $Id: cpu_basics.mac 1263 2022-07-28 09:00:42Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date Rev Version Comment
; 2022-07-24 1262 1.0 Initial version
; 2022-07-25 1263 1.0 Initial version
; 2015-08-30 710 0.1 First draft
;
; Test CPU basics: most instructions except traps, EIS and FPP
@ -1003,7 +1003,7 @@ top1wr: mov (r5),101$ ; setup cc setter
hcmpeq r1,(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
top1wm: mov (r5),101$ ; setup cc setter
mov 2(r5),102$ ; setup instruction
@ -1020,7 +1020,7 @@ top1wm: mov (r5),101$ ; setup cc setter
hcmpeq (r1),(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
200$: .word 0
;
@ -1033,9 +1033,9 @@ top1wm: mov (r5),101$ ; setup cc setter
;
tb0101: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1081,9 +1081,9 @@ tb0101: clr cp.psw
;
tb0201: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1129,9 +1129,9 @@ tb0201: clr cp.psw
;
tb0301: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1163,9 +1163,9 @@ tb0301: clr cp.psw
;
tb0401: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1197,9 +1197,9 @@ tb0401: clr cp.psw
;
tb0501: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc; C=1)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1239,9 +1239,9 @@ tb0501: clr cp.psw
;
tb0601: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc; C=1)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1281,9 +1281,9 @@ tb0601: clr cp.psw
;
tb0701: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1315,9 +1315,9 @@ tb0701: clr cp.psw
;
tb0801: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc; C=1)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1363,9 +1363,9 @@ tb0801: clr cp.psw
;
tb0901: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc; C=1)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; c=0
@ -1411,9 +1411,9 @@ tb0901: clr cp.psw
;
tb1001: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1449,9 +1449,9 @@ tb1001: clr cp.psw
;
tb1101: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1487,9 +1487,9 @@ tb1101: clr cp.psw
;
tb1201: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1520,9 +1520,9 @@ tb1201: clr cp.psw
;
tb1301: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; N=0)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc; N=1)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc ; n=0
@ -1558,9 +1558,9 @@ tb1301: clr cp.psw
;
tb1401: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top1wr
call top1wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top1wm
call top1wm
jmp 9999$
;
1000$: ccc
@ -1610,7 +1610,7 @@ top2wr: mov (r5),101$ ; setup cc setter
hcmpeq r1,(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
top2wm: mov (r5),101$ ; setup cc setter
mov 2(r5),102$ ; setup instruction
@ -1629,7 +1629,7 @@ top2wm: mov (r5),101$ ; setup cc setter
hcmpeq (r1),(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
200$: .word 0
300$: .word 0
@ -1643,9 +1643,9 @@ top2wm: mov (r5),101$ ; setup cc setter
;
tc0101: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -1741,9 +1741,9 @@ tc0101: clr cp.psw
;
tc0201: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -1840,9 +1840,9 @@ tc0201: clr cp.psw
;
tc0301: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -1895,9 +1895,9 @@ tc0301: clr cp.psw
;
tc0401: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -1948,9 +1948,9 @@ tc0401: clr cp.psw
;
tc0501: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -1996,9 +1996,9 @@ tc0501: clr cp.psw
;
tc0601: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc
@ -2040,9 +2040,9 @@ tc0601: clr cp.psw
;
tc0701: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc; c=0)
jsr pc,top2wr
call top2wr
mov #2000$,r5 ; mem mode tests (with scc; c=1)
jsr pc,top2wm
call top2wm
jmp 9999$
;
1000$: ccc ; c=0
@ -2089,7 +2089,7 @@ top1br: mov (r5),101$ ; setup cc setter
hcmbeq r1,(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
top1bm: mov (r5),101$ ; setup cc setter
mov 2(r5),102$ ; setup instruction
@ -2106,7 +2106,7 @@ top1bm: mov (r5),101$ ; setup cc setter
hcmbeq (r1),(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
200$: .word 0
;
@ -2119,9 +2119,9 @@ top1bm: mov (r5),101$ ; setup cc setter
;
td0101: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2169,9 +2169,9 @@ td0101: clr cp.psw
;
td0201: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2219,9 +2219,9 @@ td0201: clr cp.psw
;
td0301: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2254,9 +2254,9 @@ td0301: clr cp.psw
;
td0401: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2289,9 +2289,9 @@ td0401: clr cp.psw
;
td0501: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2333,9 +2333,9 @@ td0501: clr cp.psw
;
td0601: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2377,9 +2377,9 @@ td0601: clr cp.psw
;
td0701: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2412,9 +2412,9 @@ td0701: clr cp.psw
;
td0801: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2460,9 +2460,9 @@ td0801: clr cp.psw
;
td0901: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc ; c=0
@ -2508,9 +2508,9 @@ td0901: clr cp.psw
;
td1001: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2545,9 +2545,9 @@ td1001: clr cp.psw
;
td1101: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2582,9 +2582,9 @@ td1101: clr cp.psw
;
td1201: clr cp.psw
mov #1000$,r5 ; reg mode tests
jsr pc,top1br
call top1br
mov #2000$,r5 ; mem mode tests
jsr pc,top1bm
call top1bm
jmp 9999$
;
1000$: ccc
@ -2627,7 +2627,7 @@ top2br: mov (r5),101$ ; setup cc setter
hcmbeq r1,(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
top2bm: mov (r5),101$ ; setup cc setter
mov 2(r5),102$ ; setup instruction
@ -2646,7 +2646,7 @@ top2bm: mov (r5),101$ ; setup cc setter
hcmbeq (r1),(r4)+ ; check new dst
cmp r4,r3 ; more to do ?
blo 100$
rts pc
return
;
200$: .word 0
300$: .word 0
@ -2660,9 +2660,9 @@ top2bm: mov (r5),101$ ; setup cc setter
;
te0101: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2br
call top2br
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2bm
call top2bm
jmp 9999$
;
1000$: ccc
@ -2704,9 +2704,9 @@ te0101: clr cp.psw
;
te0201: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2br
call top2br
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2bm
call top2bm
jmp 9999$
;
1000$: ccc
@ -2748,9 +2748,9 @@ te0201: clr cp.psw
;
te0301: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2br
call top2br
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2bm
call top2bm
jmp 9999$
;
1000$: ccc
@ -2796,9 +2796,9 @@ te0301: clr cp.psw
;
te0401: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2br
call top2br
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2bm
call top2bm
jmp 9999$
;
1000$: ccc
@ -2840,9 +2840,9 @@ te0401: clr cp.psw
;
te0501: clr cp.psw
mov #1000$,r5 ; reg mode tests (with ccc)
jsr pc,top2br
call top2br
mov #2000$,r5 ; mem mode tests (with scc)
jsr pc,top2bm
call top2bm
jmp 9999$
;
1000$: ccc

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@ -1,10 +1,10 @@
; $Id: cpu_details.mac 1262 2022-07-25 09:44:55Z mueller $
; $Id: cpu_details.mac 1264 2022-07-30 07:42:17Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date Rev Version Comment
; 2022-07-24 1262 1.0 Initial version
; 2022-07-28 1264 1.0 Initial version
; 2022-07-18 1259 0.1 First draft
;
; Test CPU details
@ -124,10 +124,10 @@ ta0101: mov #1000$,v..pir ; setup handler
tb0101: mov #2,r5
100$: mov #1000$,r0
mov #1110$,r1
mov 1000$+2,-(sp) ; save data that will change
mov 1000$+6,-(sp)
mov 1100$+0,-(sp)
mov 1100$+4,-(sp)
push 1000$+2 ; save data that will change
push 1000$+6
push 1100$+0
push 1100$+4
;
mov (r0)+,(r0)+ ; mov 111 over 222
add (r0)+,(r0)+ ; add 333 to 444
@ -139,10 +139,10 @@ tb0101: mov #2,r5
hcmpeq 1100$+4,#000444
hcmpeq 1100$+0,#000333
;
mov (sp)+,1100$+4 ; restore data
mov (sp)+,1100$+0
mov (sp)+,1000$+6
mov (sp)+,1000$+2
pop 1100$+4 ; restore data
pop 1100$+0
pop 1000$+6
pop 1000$+2
sob r5,100$
jmp 9999$
;
@ -162,9 +162,9 @@ tb0101: mov #2,r5
; Test B1.2 -- (pc)+ as destination ++++++++++++++++++++++++++++++++++
;
tb0102: mov #2,r5
100$: mov 1000$+4,-(sp) ; save data that will change
mov 1100$+4,-(sp)
mov 1200$+2,-(sp)
100$: push 1000$+4 ; save data that will change
push 1100$+4
push 1200$+2
;
clr r0
1000$: mov #1,#0 ; (pc)+,(pc)+: write #1 over #0
@ -176,9 +176,9 @@ tb0102: mov #2,r5
hcmpeq 1100$+4,#3
hcmpeq r0,#1
;
mov (sp)+,1200$+2 ; restore data
mov (sp)+,1100$+4
mov (sp)+,1000$+4
pop 1200$+2 ; restore data
pop 1100$+4
pop 1000$+4
sob r5,100$
;
9999$: iot ; end of test B1.2

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@ -1,10 +1,10 @@
; $Id: cpu_eis.mac 1262 2022-07-25 09:44:55Z mueller $
; $Id: cpu_eis.mac 1263 2022-07-28 09:00:42Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date Rev Version Comment
; 2022-07-24 1262 1.0 Initial version
; 2022-07-25 1263 1.0 Initial version
; 2022-07-11 1251 0.1 First draft
;
; Test CPU EIS instructions
@ -40,13 +40,13 @@ topdiv: mov (r5),r4 ; setup data pointer
;
300$: cmp r4,r5 ; more to do ?
blo 100$
rts pc
return
;
; Test A1.1 -- div test basics ++++++++++++++++++++++++++++++++++++++++++++++++
; from test_w11a_div.tcl, div_testd2 cases, translated 1-to-1
;
ta0101: mov #1000$,r5
jsr pc,topdiv
call topdiv
jmp 9999$
;
1000$: .word 1010$
@ -111,7 +111,7 @@ ta0101: mov #1000$,r5
; from test_w11a_div.tcl, div_testdqr cases, exported via div_show_exp
;
ta0102: mov #1000$,r5
jsr pc,topdiv
call topdiv
jmp 9999$
;
1000$: .word 1010$
@ -284,7 +284,7 @@ ta0102: mov #1000$,r5
; Test A1.3 -- div odd register +++++++++++++++++++++++++++++++++++++++
; check div odd register behavior
; Note: The div instruction has, in contrast to ashc, no useful semantics when
; called with an odd register. DEC documentation doesn't specify the
; called with an odd register. DEC documentation doesnt specify the
; behavior. SimH assumes, that register handling is done like for ashc,
; so effective dd is 'R<<16 | R' and reminder is stored. w11 implements
; div like this. This test briefly verifies this behavior.
@ -331,7 +331,7 @@ tbmule: mov #cp.psw,r3 ; setup psw pointer
hcmpeq (r4)+,r1 ; check p_low
cmp r4,r5
blo 100$
rts pc
return
;
; driver for mul odd tests
;
@ -343,15 +343,15 @@ tbmulo: mov #cp.psw,r3 ; setup psw pointer
hcmpeq (r4)+,r1 ; check p_low
cmp r4,r5
blo 100$
rts pc
return
;
tb0101: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
jsr pc,tbmule ; test even
call tbmule ; test even
;
mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
jsr pc,tbmulo ; test odd
call tbmulo ; test odd
;
jmp 9999$
;
@ -647,7 +647,7 @@ td0102: mov #1000$,r4 ; setup data pointer
; 0 111 100 rrr ddd ddd NZ0- XOR
;
; Test E1.1 -- xor znvc=0 ++++++++++++++++++++++++++++++++++++++++++++
; check xor with all cc's cleared; memory destination
; check xor with all ccs cleared; memory destination
;
te0101: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
@ -677,7 +677,7 @@ te0101: mov #1000$,r4 ; setup data pointer
9999$: iot ; end of test E1.1
;
; Test X1.2 -- xor znvc=1 ++++++++++++++++++++++++++++++++++++++++++++
; check xor with all cc's set; register destination
; check xor with all ccs set; register destination
;
te0102: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer