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- the w11a rbus interface used so far a narrow dynamically adjusted

Browse Source 
rbus->ibus window. Replaces with a 4k word window for whole IO page.
- utilize rlink protocol version 4 features in w11a backend
  - use attn notifies to dispatch attn handlers
  - use larger blocks (7*512 rather 1*512 bytes) for rdma transfers
  - use labo and merge csr updates with last block transfer
  - this combined reduces the number of round trips by a factor 2 to 3, 
    and in some cases the throughput accordingly.
This commit is contained in:
Walter F.J. Mueller
2015-01-04 19:18:35 +00:00
parent d87ac86f53
commit dde49d52e4
114 changed files with 3305 additions and 1244 deletions
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24
rtl/sys_gen/tst_rlink/rbd_tst_rlink.vhd
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@@ -1,4 +1,4 @@
-- $Id: rbd_tst_rlink.vhd 603 2014-11-09 22:50:26Z mueller $
-- $Id: rbd_tst_rlink.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -59,8 +59,8 @@ entity rbd_tst_rlink is -- rbus device for tst_rlink
RB_LAM : out slv16; -- rbus: look at me
RB_STAT : out slv4; -- rbus: status flags
RB_SRES_TOP : in rb_sres_type; -- top-level rb_sres, for rbd_mon
RXSD : in slbit; -- serport rxsd, for rbd_emon
RXACT : in slbit; -- serport rxact, for rbd_emon
RXSD : in slbit; -- serport rxsd, for rbd_eyemon
RXACT : in slbit; -- serport rxact, for rbd_eyemon
STAT : out slv8 -- status flags
);
@@ -83,18 +83,18 @@ architecture syn of rbd_tst_rlink is
signal TIM1_DONE : slbit := '0';
signal TIM1_BUSY : slbit := '0';
constant rbaddr_mon : slv16 := x"ffe8"; -- ffe8/8: 1111 1111 1110 1xxx
constant rbaddr_test : slv16 := x"ffe0"; -- ffe0/8: 1111 1111 1110 0xxx
constant rbaddr_emon : slv16 := x"ffd0"; -- ffd0/4: 1111 1111 1101 00xx
constant rbaddr_tim1 : slv16 := x"fe11"; -- fe11/1: 1111 1110 0001 0001
constant rbaddr_tim0 : slv16 := x"fe10"; -- fe10/1: 1111 1110 0001 0000
constant rbaddr_bram : slv16 := x"fe00"; -- fe00/2: 1111 1110 0000 00xx
constant rbaddr_rbmon : slv16 := x"ffe8"; -- ffe8/8: 1111 1111 1110 1xxx
constant rbaddr_tester : slv16 := x"ffe0"; -- ffe0/8: 1111 1111 1110 0xxx
constant rbaddr_eyemon : slv16 := x"ffd0"; -- ffd0/4: 1111 1111 1101 00xx
constant rbaddr_tim1 : slv16 := x"fe11"; -- fe11/1: 1111 1110 0001 0001
constant rbaddr_tim0 : slv16 := x"fe10"; -- fe10/1: 1111 1110 0001 0000
constant rbaddr_bram : slv16 := x"fe00"; -- fe00/2: 1111 1110 0000 00xx
begin
TEST : rbd_tester
generic map (
RB_ADDR => rbaddr_test)
RB_ADDR => rbaddr_tester)
port map (
CLK => CLK,
RESET => RESET,
@@ -116,7 +116,7 @@ begin
MON : rbd_rbmon
generic map (
RB_ADDR => rbaddr_mon,
RB_ADDR => rbaddr_rbmon,
AWIDTH => 9)
port map (
CLK => CLK,
@@ -128,7 +128,7 @@ begin
EMON : rbd_eyemon
generic map (
RB_ADDR => rbaddr_emon,
RB_ADDR => rbaddr_eyemon,
RDIV => slv(to_unsigned(0,8)))
port map (
CLK => CLK,

5
rtl/sys_gen/tst_rlink_cuff/atlys/sys_tst_rlink_cuff_atlys.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_tst_rlink_cuff_atlys.vhd 583 2014-08-16 07:40:12Z mueller $
-- $Id: sys_tst_rlink_cuff_atlys.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -35,6 +35,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.1.1 relocate hio rbus address
-- 2014-08-15 583 1.1 rb_mreq addr now 16 bit
-- 2013-01-06 472 1.0 Initial version; derived from sys_tst_rlink_cuff_n3
-- and sys_tst_fx2loop_atlys
@@ -141,7 +142,7 @@ architecture syn of sys_tst_rlink_cuff_atlys is
signal FX2_TX2AFULL : slbit := '0';
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
constant rbaddr_hio : slv16 := "0000000011000000"; -- 110000xx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/4: 1111 1110 1111 00xx
begin

5
rtl/sys_gen/tst_rlink_cuff/nexys2/sys_tst_rlink_cuff_n2.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_tst_rlink_cuff_n2.vhd 614 2014-12-20 15:00:45Z mueller $
-- $Id: sys_tst_rlink_cuff_n2.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2012-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -40,6 +40,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.1.1 relocate hio rbus address
-- 2014-08-15 583 1.1 rb_mreq addr now 16 bit
-- 2012-12-29 466 1.0 Initial version; derived from sys_tst_fx2loop_n2
-- the now obsoleted sys_tst_rlink_n2_cuff design
@@ -160,7 +161,7 @@ architecture syn of sys_tst_rlink_cuff_n2 is
signal FX2_TX2AFULL : slbit := '0';
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
constant rbaddr_hio : slv16 := "0000000011000000"; -- 110000xx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/4: 1111 1110 1111 00xx
begin

5
rtl/sys_gen/tst_rlink_cuff/nexys3/sys_tst_rlink_cuff_n3.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_tst_rlink_cuff_n3.vhd 614 2014-12-20 15:00:45Z mueller $
-- $Id: sys_tst_rlink_cuff_n3.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -36,6 +36,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.2.1 relocate hio rbus address
-- 2014-08-15 583 1.2 rb_mreq addr now 16 bit
-- 2013-10-06 538 1.1 pll support, use clksys_vcodivide ect
-- 2012-12-29 466 1.0 Initial version; derived from sys_tst_rlink_cuff_n2
@@ -158,7 +159,7 @@ architecture syn of sys_tst_rlink_cuff_n3 is
signal FX2_TX2AFULL : slbit := '0';
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
constant rbaddr_hio : slv16 := "0000000011000000"; -- 110000xx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/4: 1111 1110 1111 00xx
begin

9
rtl/sys_gen/w11a/nexys2/sys_conf.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf.vhd 509 2013-04-21 20:46:20Z mueller $
-- $Id: sys_conf.vhd 619 2014-12-23 13:17:41Z mueller $
--
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for sys_w11a_n2 (for synthesis)
--
-- Dependencies: -
-- Tool versions: xst 11.4, 13.1; ghdl 0.26-0.29
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-22 619 1.2.1 add _rbmon_awidth
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-19 428 1.1.1 use clksys=56 (58 no closure after numeric_std...)
-- 2010-11-27 341 1.1 add dcm and memctl related constants (clksys=58)
@@ -47,6 +48,8 @@ package sys_conf is
constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;

4
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vbom
View File

@@ -4,6 +4,7 @@
../../../vlib/genlib/genlib.vhd
../../../vlib/serport/serportlib.vbom
../../../vlib/rbus/rblib.vhd
../../../vlib/rbus/rbdlib.vhd
../../../vlib/rlink/rlinklib.vbom
../../../bplib/fx2lib/fx2lib.vhd
../../../bplib/fx2rlink/fx2rlinklib.vbom
@@ -22,7 +23,8 @@ sys_conf = sys_conf.vhd
../../../bplib/bpgen/sn_humanio_rbus.vbom
../../../bplib/fx2rlink/rlink_sp1c_fx2.vbom
../../../bplib/fx2rlink/ioleds_sp1c_fx2.vbom
../../../vlib/rbus/rb_sres_or_3.vbom
../../../vlib/rbus/rb_sres_or_4.vbom
../../../vlib/rbus/rbd_rbmon.vbom
../../../w11a/pdp11_core_rbus.vbom
../../../w11a/pdp11_core.vbom
../../../w11a/pdp11_bram.vbom

47
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_n2.vhd 614 2014-12-20 15:00:45Z mueller $
-- $Id: sys_w11a_n2.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2010-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -21,7 +21,8 @@
-- bplib/bpgen/sn_humanio_rbus
-- bplib/fx2rlink/rlink_sp1c_fx2
-- bplib/fx2rlink/ioleds_sp1c_fx2
-- vlib/rri/rb_sres_or_3
-- vlib/rbus/rb_sres_or_4
-- vlib/rbus/rbd_rbmon
-- w11a/pdp11_core_rbus
-- w11a/pdp11_core
-- w11a/pdp11_bram
@@ -41,6 +42,7 @@
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-12-22 619 14.7 131013 xc3s1200e-4 1828 5131 366 3263 ok: +rbmon
-- 2014-12-20 614 14.7 131013 xc3s1200e-4 1714 4896 366 3125 ok: -RL11,rlv4
-- 2014-06-08 561 14.7 131013 xc3s1200e-4 1626 4821 360 3052 ok: +RL11
-- 2014-06-01 558 14.7 131013 xc3s1200e-4 1561 4597 334 2901 ok:
@@ -69,6 +71,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.6.2 relocate ibus window and hio rbus address
-- 2014-12-22 619 1.6.1 add rbus monitor rbd_rbmon
-- 2014-08-28 588 1.6 use new rlink v4 iface generics and 4 bit STAT
-- 2014-08-15 583 1.5 rb_mreq addr now 16 bit
-- 2013-04-20 509 1.4 added fx2 (cuff) support; ATOWIDTH=7
@@ -146,6 +150,7 @@ use work.xlib.all;
use work.genlib.all;
use work.serportlib.all;
use work.rblib.all;
use work.rbdlib.all;
use work.rlinklib.all;
use work.fx2lib.all;
use work.fx2rlinklib.all;
@@ -218,11 +223,12 @@ architecture syn of sys_w11a_n2 is
signal SER_MONI : serport_moni_type := serport_moni_init;
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_IBD : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_IBD : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_RBMON : rb_sres_type := rb_sres_init;
signal RESET : slbit := '0';
signal CE_USEC : slbit := '0';
@@ -274,9 +280,10 @@ architecture syn of sys_w11a_n2 is
signal DISPREG : slv16 := (others=>'0');
constant rbaddr_core0 : slv16 := "0000000000000000";
constant rbaddr_ibus : slv16 := "0000000010000000";
constant rbaddr_hio : slv16 := "0000000011000000";
constant rbaddr_rbmon : slv16 := x"ffe8"; -- ffe8/0008: 1111 1111 1110 1xxx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/0004: 1111 1110 1111 00xx
constant rbaddr_ibus0 : slv16 := x"4000"; -- 4000/1000: 0100 xxxx xxxx xxxx
constant rbaddr_core0 : slv16 := x"0000"; -- 0000/0020: 0000 0000 000x xxxx
begin
@@ -389,18 +396,34 @@ begin
IO_FX2_DATA => IO_FX2_DATA
);
RB_SRES_OR : rb_sres_or_3
RB_SRES_OR : rb_sres_or_4
port map (
RB_SRES_1 => RB_SRES_CPU,
RB_SRES_2 => RB_SRES_IBD,
RB_SRES_3 => RB_SRES_HIO,
RB_SRES_4 => RB_SRES_RBMON,
RB_SRES_OR => RB_SRES
);
RBMON : if sys_conf_rbmon_awidth > 0 generate
begin
RBMON : rbd_rbmon
generic map (
RB_ADDR => rbaddr_rbmon,
AWIDTH => sys_conf_rbmon_awidth)
port map (
CLK => CLK,
RESET => RESET,
RB_MREQ => RB_MREQ,
RB_SRES => RB_SRES_RBMON,
RB_SRES_SUM => RB_SRES
);
end generate RBMON;
RB2CP : pdp11_core_rbus
generic map (
RB_ADDR_CORE => rbaddr_core0,
RB_ADDR_IBUS => rbaddr_ibus)
RB_ADDR_IBUS => rbaddr_ibus0)
port map (
CLK => CLK,
RESET => RESET,

9
rtl/sys_gen/w11a/nexys2/tb/sys_conf_sim.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf_sim.vhd 509 2013-04-21 20:46:20Z mueller $
-- $Id: sys_conf_sim.vhd 619 2014-12-23 13:17:41Z mueller $
--
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2010-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for sys_w11a_n2 (for simulation)
--
-- Dependencies: -
-- Tool versions: xst 11.4, 13.1; ghdl 0.26-0.29
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-22 619 1.2.1 add _rbmon_awidth
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-27 433 1.1.1 use /1*1 to skip dcm in sim, _ssim fails with dcm
-- 2010-11-27 341 1.1 add dcm and memctl related constants (clksys=58)
@@ -43,6 +44,8 @@ package sys_conf is
constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;

14
rtl/sys_gen/w11a/nexys3/sys_conf.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf.vhd 538 2013-10-06 17:21:25Z mueller $
-- $Id: sys_conf.vhd 621 2014-12-26 21:20:05Z mueller $
--
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,11 @@
-- Description: Definitions for sys_w11a_n3 (for synthesis)
--
-- Dependencies: -
-- Tool versions: xst 13.1, 14.6; ghdl 0.29
-- Tool versions: xst 13.1-14.7; ghdl 0.29-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-26 621 1.2.2 use 68 MHz, get occasional problems with 72 MHz
-- 2014-12-22 619 1.2.1 add _rbmon_awidth
-- 2013-10-06 538 1.2 pll support, use clksys_vcodivide ect
-- 2013-10-05 537 1.1.1 use 72 MHz, no closure w/ ISE 14.x for 80 anymore
-- 2013-04-21 509 1.1 add fx2 settings
@@ -43,8 +45,8 @@ use work.slvtypes.all;
package sys_conf is
constant sys_conf_clksys_vcodivide : positive := 25;
constant sys_conf_clksys_vcomultiply : positive := 18; -- dcm 72 MHz
constant sys_conf_clksys_outdivide : positive := 1; -- sys 72 MHz
constant sys_conf_clksys_vcomultiply : positive := 17; -- dcm 68 MHz
constant sys_conf_clksys_outdivide : positive := 1; -- sys 68 MHz
constant sys_conf_clksys_gentype : string := "DCM";
constant sys_conf_memctl_read0delay : positive := 4;
@@ -53,6 +55,8 @@ package sys_conf is
constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;

4
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vbom
View File

@@ -4,6 +4,7 @@
../../../vlib/genlib/genlib.vhd
../../../vlib/serport/serportlib.vbom
../../../vlib/rbus/rblib.vhd
../../../vlib/rbus/rbdlib.vhd
../../../vlib/rlink/rlinklib.vbom
../../../bplib/fx2lib/fx2lib.vhd
../../../bplib/fx2rlink/fx2rlinklib.vbom
@@ -22,7 +23,8 @@ sys_conf = sys_conf.vhd
../../../bplib/bpgen/sn_humanio_rbus.vbom
../../../bplib/fx2rlink/rlink_sp1c_fx2.vbom
../../../bplib/fx2rlink/ioleds_sp1c_fx2.vbom
../../../vlib/rbus/rb_sres_or_3.vbom
../../../vlib/rbus/rb_sres_or_4.vbom
../../../vlib/rbus/rbd_rbmon.vbom
../../../w11a/pdp11_core_rbus.vbom
../../../w11a/pdp11_core.vbom
../../../w11a/pdp11_bram.vbom

47
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_n3.vhd 614 2014-12-20 15:00:45Z mueller $
-- $Id: sys_w11a_n3.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -21,7 +21,8 @@
-- bplib/bpgen/sn_humanio_rbus
-- bplib/fx2rlink/rlink_sp1c_fx2
-- bplib/fx2rlink/ioleds_sp1c_fx2
-- vlib/rri/rb_sres_or_3
-- vlib/rbus/rb_sres_or_4
-- vlib/rbus/rbd_rbmon
-- w11a/pdp11_core_rbus
-- w11a/pdp11_core
-- w11a/pdp11_bram
@@ -41,6 +42,7 @@
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-12-22 619 14.7 131013 xc6slx16-2 1742 3767 150 1350 ok: +rbmon
-- 2014-12-20 614 14.7 131013 xc6slx16-2 1640 3692 150 1297 ok: -RL11,rlv4
-- 2014-06-08 561 14.7 131013 xc6slx16-2 1531 3500 142 1165 ok: +RL11
-- 2014-05-29 556 14.7 131013 xc6slx16-2 1459 3342 128 1154 ok:
@@ -50,6 +52,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.7.2 relocate ibus window and hio rbus address
-- 2014-12-22 619 1.7.1 add rbus monitor rbd_rbmon
-- 2014-08-28 588 1.7 use new rlink v4 iface generics and 4 bit STAT
-- 2014-08-15 583 1.6 rb_mreq addr now 16 bit
-- 2013-10-06 538 1.5 pll support, use clksys_vcodivide ect
@@ -108,6 +112,7 @@ use work.xlib.all;
use work.genlib.all;
use work.serportlib.all;
use work.rblib.all;
use work.rbdlib.all;
use work.rlinklib.all;
use work.fx2lib.all;
use work.fx2rlinklib.all;
@@ -181,11 +186,12 @@ architecture syn of sys_w11a_n3 is
signal SER_MONI : serport_moni_type := serport_moni_init;
signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_IBD : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_IBD : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_RBMON : rb_sres_type := rb_sres_init;
signal RESET : slbit := '0';
signal CE_USEC : slbit := '0';
@@ -237,9 +243,10 @@ architecture syn of sys_w11a_n3 is
signal DISPREG : slv16 := (others=>'0');
constant rbaddr_core0 : slv16 := "0000000000000000";
constant rbaddr_ibus : slv16 := "0000000010000000";
constant rbaddr_hio : slv16 := "0000000011000000";
constant rbaddr_rbmon : slv16 := x"ffe8"; -- ffe8/0008: 1111 1111 1110 1xxx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/0004: 1111 1110 1111 00xx
constant rbaddr_ibus0 : slv16 := x"4000"; -- 4000/1000: 0100 xxxx xxxx xxxx
constant rbaddr_core0 : slv16 := x"0000"; -- 0000/0020: 0000 0000 000x xxxx
begin
@@ -357,18 +364,34 @@ begin
IO_FX2_DATA => IO_FX2_DATA
);
RB_SRES_OR : rb_sres_or_3
RB_SRES_OR : rb_sres_or_4
port map (
RB_SRES_1 => RB_SRES_CPU,
RB_SRES_2 => RB_SRES_IBD,
RB_SRES_3 => RB_SRES_HIO,
RB_SRES_4 => RB_SRES_RBMON,
RB_SRES_OR => RB_SRES
);
RBMON : if sys_conf_rbmon_awidth > 0 generate
begin
RBMON : rbd_rbmon
generic map (
RB_ADDR => rbaddr_rbmon,
AWIDTH => sys_conf_rbmon_awidth)
port map (
CLK => CLK,
RESET => RESET,
RB_MREQ => RB_MREQ,
RB_SRES => RB_SRES_RBMON,
RB_SRES_SUM => RB_SRES
);
end generate RBMON;
RB2CP : pdp11_core_rbus
generic map (
RB_ADDR_CORE => rbaddr_core0,
RB_ADDR_IBUS => rbaddr_ibus)
RB_ADDR_IBUS => rbaddr_ibus0)
port map (
CLK => CLK,
RESET => RESET,

11
rtl/sys_gen/w11a/nexys3/tb/sys_conf_sim.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf_sim.vhd 538 2013-10-06 17:21:25Z mueller $
-- $Id: sys_conf_sim.vhd 619 2014-12-23 13:17:41Z mueller $
--
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for sys_w11a_n3 (for simulation)
--
-- Dependencies: -
-- Tool versions: xst 13.1, 14.6; ghdl 0.29
-- Tool versions: xst 13.1-14.7; ghdl 0.29-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-22 619 1.3.1 add _rbmon_awidth
-- 2013-10-06 538 1.3 pll support, use clksys_vcodivide ect
-- 2013-04-21 509 1.2 add fx2 settings
-- 2011-11-25 432 1.0 Initial version (cloned from _n3)
@@ -41,7 +42,9 @@ package sys_conf is
constant sys_conf_memctl_writedelay : positive := 5;
constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
-- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
constant sys_conf_fx2_petowidth : positive := 10;
constant sys_conf_fx2_ccwidth : positive := 5;

8
rtl/sys_gen/w11a/s3board/sys_conf.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf.vhd 314 2010-07-09 17:38:41Z mueller $
-- $Id: sys_conf.vhd 619 2014-12-23 13:17:41Z mueller $
--
-- Copyright 2007-2008 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for sys_w11a_s3 (for synthesis)
--
-- Dependencies: -
-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
-- Tool versions: xst 8.1-14.7; ghdl 0.18-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-22 619 1.1.2 add _rbmon_awidth
-- 2010-05-05 288 1.1.1 add sys_conf_hio_debounce
-- 2008-02-23 118 1.1 add memory config
-- 2007-09-23 84 1.0 Initial version
@@ -33,6 +34,7 @@ package sys_conf is
constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers
constant sys_conf_ser2rri_cdinit : integer := 434-1; -- 50000000/115200
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
constant sys_conf_bram : integer := 0; -- no bram, use cache
constant sys_conf_bram_awidth : integer := 14; -- bram size (16 kB)

4
rtl/sys_gen/w11a/s3board/sys_w11a_s3.vbom
View File

@@ -3,6 +3,7 @@
../../../vlib/genlib/genlib.vhd
../../../vlib/serport/serportlib.vbom
../../../vlib/rbus/rblib.vhd
../../../vlib/rbus/rbdlib.vhd
../../../vlib/rlink/rlinklib.vbom
../../../bplib/bpgen/bpgenlib.vbom
../../../bplib/s3board/s3boardlib.vbom
@@ -15,7 +16,8 @@ sys_conf = sys_conf.vhd
../../../bplib/bpgen/bp_rs232_2l4l_iob.vbom
../../../bplib/bpgen/sn_humanio.vbom
../../../vlib/rlink/rlink_sp1c.vbom
../../../vlib/rbus/rb_sres_or_2.vbom
../../../vlib/rbus/rb_sres_or_3.vbom
../../../vlib/rbus/rbd_rbmon.vbom
../../../w11a/pdp11_core_rbus.vbom
../../../w11a/pdp11_core.vbom
../../../w11a/pdp11_bram.vbom

37
rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_s3.vhd 614 2014-12-20 15:00:45Z mueller $
-- $Id: sys_w11a_s3.vhd 620 2014-12-25 10:48:35Z mueller $
--
-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -19,7 +19,8 @@
-- bplib/bpgen/bp_rs232_2l4l_iob
-- bplib/bpgen/sn_humanio
-- vlib/rlink/rlink_sp1c
-- vlib/rbus/rb_sres_or_2
-- vlib/rbus/rb_sres_or_3
-- vlib/rbus/rbd_rbmon
-- w11a/pdp11_core_rbus
-- w11a/pdp11_core
-- w11a/pdp11_bram
@@ -39,6 +40,7 @@
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-12-22 619 14.7 131013 xc3s1000-4 1569 4768 302 2994 OK: +rbmon
-- 2014-12-20 614 14.7 131013 xc3s1000-4 1455 4523 302 2807 OK: -RL11,rlv4
-- 2014-06-08 561 14.7 131013 xc3s1000-4 1374 4580 286 2776 OK: +RL11
-- 2014-06-01 558 14.7 131013 xc3s1000-4 1301 4306 270 2614 OK:
@@ -76,6 +78,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-24 620 1.6.2 relocate ibus window and hio rbus address
-- 2014-12-22 619 1.6.1 add rbus monitor rbd_rbmon
-- 2014-08-28 588 1.6 use new rlink v4 iface and 4 bit STAT
-- 2014-08-15 583 1.5 rb_mreq addr now 16 bit
-- 2011-12-21 442 1.4.4 use rlink_sp1c; hio led usage now a for n2/n3
@@ -162,6 +166,7 @@ use work.slvtypes.all;
use work.genlib.all;
use work.serportlib.all;
use work.rblib.all;
use work.rbdlib.all;
use work.rlinklib.all;
use work.bpgenlib.all;
use work.s3boardlib.all;
@@ -220,6 +225,7 @@ architecture syn of sys_w11a_s3 is
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_IBD : rb_sres_type := rb_sres_init;
signal RB_SRES_RBMON : rb_sres_type := rb_sres_init;
signal RESET : slbit := '0';
signal CE_USEC : slbit := '0';
@@ -269,9 +275,10 @@ architecture syn of sys_w11a_s3 is
signal DISPREG : slv16 := (others=>'0');
constant rbaddr_core0 : slv16 := "0000000000000000";
constant rbaddr_ibus : slv16 := "0000000010000000";
constant rbaddr_hio : slv16 := "0000000011000000";
constant rbaddr_rbmon : slv16 := x"ffe8"; -- ffe8/0008: 1111 1111 1110 1xxx
constant rbaddr_hio : slv16 := x"fef0"; -- fef0/0004: 1111 1110 1111 00xx
constant rbaddr_ibus0 : slv16 := x"4000"; -- 4000/1000: 0100 xxxx xxxx xxxx
constant rbaddr_core0 : slv16 := x"0000"; -- 0000/0020: 0000 0000 000x xxxx
begin
@@ -355,17 +362,33 @@ begin
SER_MONI => SER_MONI
);
RB_SRES_OR : rb_sres_or_2
RB_SRES_OR : rb_sres_or_3
port map (
RB_SRES_1 => RB_SRES_CPU,
RB_SRES_2 => RB_SRES_IBD,
RB_SRES_3 => RB_SRES_RBMON,
RB_SRES_OR => RB_SRES
);
RBMON : if sys_conf_rbmon_awidth > 0 generate
begin
RBMON : rbd_rbmon
generic map (
RB_ADDR => rbaddr_rbmon,
AWIDTH => sys_conf_rbmon_awidth)
port map (
CLK => CLK,
RESET => RESET,
RB_MREQ => RB_MREQ,
RB_SRES => RB_SRES_RBMON,
RB_SRES_SUM => RB_SRES
);
end generate RBMON;
RP2CP : pdp11_core_rbus
generic map (
RB_ADDR_CORE => rbaddr_core0,
RB_ADDR_IBUS => rbaddr_ibus)
RB_ADDR_IBUS => rbaddr_ibus0)
port map (
CLK => CLK,
RESET => RESET,

10
rtl/sys_gen/w11a/s3board/tb/sys_conf_sim.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: sys_conf_sim.vhd 314 2010-07-09 17:38:41Z mueller $
-- $Id: sys_conf_sim.vhd 619 2014-12-23 13:17:41Z mueller $
--
-- Copyright 2007-2008 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for sys_w11a_s3 (for simulation)
--
-- Dependencies: -
-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
-- Tool versions: xst 8.1-14.7; ghdl 0.18-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-12-22 619 1.1.2 add _rbmon_awidth
-- 2010-05-05 288 1.1.1 add sys_conf_hio_debounce
-- 2008-02-23 118 1.1 add memory config
-- 2007-09-23 84 1.0 Initial version
@@ -33,7 +34,8 @@ package sys_conf is
constant sys_conf_hio_debounce : boolean := false; -- no debouncers
constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon
constant sys_conf_bram : integer := 0; -- no bram, use cache
constant sys_conf_bram_awidth : integer := 14; -- bram size (16 kB)
constant sys_conf_mem_losize : integer := 8#037777#; -- 1 MByte