diff --git a/doc/CHANGELOG.md b/doc/CHANGELOG.md index d4614bd4..8128346a 100644 --- a/doc/CHANGELOG.md +++ b/doc/CHANGELOG.md @@ -35,10 +35,10 @@ The full set of tests is only run for tagged releases. - Rw11UnitDZ11: unit - new verification codes - test_m9312_all.tcl: tbench for m9312 + - test_dz11_*.tcl: tbench for dz11 - new test and demonstration codes under tools/mcode - m9312/bootw11.mac: w11 boot for m9312 - sys/noboot.mac: boot blocker code for block 0 of disks -- ### Changes - tools changes @@ -456,7 +456,7 @@ The full set of tests is only run for tagged releases. proper operation of vivado under Ubuntu 16.04 - use -std=c++11 (gcc 4.7 or later) - for all FTDI USB-UART it is essential to set them to `low latency` mode. - That was default for linux kernels 2.6.32 to 4.4.52. Since about March + That was default for Linux kernels 2.6.32 to 4.4.52. Since about March 2017 one gets kernels with 16 ms default latency again, thanks to [kernel patch 9589541](https://patchwork.kernel.org/patch/9589541/). **For newer systems it is essential to install a udev rule** which diff --git a/tools/asm-11/lib/defs_dz.mac b/tools/asm-11/lib/defs_dz.mac new file mode 100644 index 00000000..cb0acb1b --- /dev/null +++ b/tools/asm-11/lib/defs_dz.mac @@ -0,0 +1,49 @@ +; $Id: defs_dz.mac 1148 2019-05-12 10:10:44Z mueller $ +; Copyright 2019- by Walter F.J. Mueller +; License disclaimer see License.txt in $RETROBASE directory +; +; definitions for primary DZ11 controler (as in defs_dz.das) +; +; vector address/priority definition +; + va.dzr=000310 + vp.dzr=4 + va.dzt=000314 + vp.dzt=4 +; +; register addresses +; + dz.csr=160100 + dz.rbu=160102 ; read + dz.lpr=160102 ; write + dz.tcr=160104 ; word + dz.len=160104 ; byte + dz.dtr=160105 ; byte + dz.tbu=160106 ; write-byte + dz.brk=160107 ; write-byte + dz.msr=160106 ; read-word + dz.rin=160106 ; read-byte + dz.co =160107 ; read-byte +; +; symbol definitions for dz.csr +; + dz.trd=100000 + dz.tie=040000 + dz.sa=020000 + dz.sae=010000 + dz.rdo=000200 + dz.rie=000100 + dz.mse=000040 + dz.clr=000020 + dz.mai=000010 +; +; symbol definitions for dz.rbu (read used as rbuf) +; + dz.val=100000 + dz.fer=020000 +; +; symbol definitions for dz.lpr (write used as lpr) +; + dz.rxo=010000 + dz.f96=007000 ; freq=1110 -> 9600 Baud + dz.cl8=000030 ; clgth=11 -> 8 bits diff --git a/tools/tbench/README.md b/tools/tbench/README.md index 482d656d..aa5c8719 100644 --- a/tools/tbench/README.md +++ b/tools/tbench/README.md @@ -4,10 +4,11 @@ This directory tree contains the **w11 test bench** and is organized in | --------- | ------- | | [cp](cp) | test of CPU control port | | [deuna](deuna) | test of `deuna` ibus device | -| [pc11](dl11) | test of `dl11` ibus device | +| [dl11](dl11) | test of `dl11` ibus device | +| [dz11](dz11) | test of `dz11` ibus device | | [kw11p](kw11p) | test of `kw11p` ibus device | -| [pc11](lp11) | test of `lp11` ibus device | -| [pc11](m9312) | test of `m9312` ibus device | +| [lp11](lp11) | test of `lp11` ibus device | +| [m9312](m9312) | test of `m9312` ibus device | | [pc11](pc11) | test of `pc11` ibus device | | [rhrp](rhrp) | test of `rhrp` ibus device | | [tm11](tm11) | test of `tm11` ibus device | diff --git a/tools/tbench/dev_all.dat b/tools/tbench/dev_all.dat index a0c4ca23..96bb708f 100644 --- a/tools/tbench/dev_all.dat +++ b/tools/tbench/dev_all.dat @@ -1,4 +1,4 @@ -# $Id: dev_all.dat 1143 2019-05-01 13:25:51Z mueller $ +# $Id: dev_all.dat 1148 2019-05-12 10:10:44Z mueller $ # ## steering file for all devices tests # @@ -6,6 +6,7 @@ @m9312/m9312_all.dat # @dl11/dl11_all.dat +@dz11/dz11_all.dat @lp11/lp11_all.dat @pc11/pc11_all.dat @rhrp/rhrp_all.dat diff --git a/tools/tbench/dz11/dz11_all.dat b/tools/tbench/dz11/dz11_all.dat new file mode 100644 index 00000000..35be87c5 --- /dev/null +++ b/tools/tbench/dz11/dz11_all.dat @@ -0,0 +1,8 @@ +# $Id: dz11_all.dat 1148 2019-05-12 10:10:44Z mueller $ +# +## steering file for all dz11 tests +# +test_dz11_regs.tcl +test_dz11_tx.tcl +test_dz11_rx.tcl +test_dz11_loop.tcl diff --git a/tools/tbench/dz11/test_dz11_loop.tcl b/tools/tbench/dz11/test_dz11_loop.tcl new file mode 100644 index 00000000..53d40b7a --- /dev/null +++ b/tools/tbench/dz11/test_dz11_loop.tcl @@ -0,0 +1,308 @@ +# $Id: test_dz11_loop.tcl 1150 2019-05-19 17:52:54Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-05-18 1150 1.0 Initial version +# 2019-05-11 1148 0.1 First draft +# +# Test DZ11 combined receiver + transmitter response + +# ---------------------------------------------------------------------------- +rlc log "test_dz11_loop: test dz11 receiver+transmit response ----------------" +package require ibd_dz11 +if {![ibd_dz11::setup]} { + rlc log " test_dz11_tx-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dz11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: init dz11 ---------------------------------------------" +# - issue csr.clr +# - remember 'awdth' retrieved from rcsr for later tests +# - set rlim's to 0, clear fifos +# - harvest any dangling attn +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -ribr dza.csr dzcntl \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \ + rcl tcl {func "SRLIM"}] +set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl] +rlc exec -attn +rlc wtlam 0. + +rlc log " A2: backend -> cpu -> backend loop ------------------------" + +# load test code +# rx enable lines 1,3,5 +# store chars in line buffers +# transmit all received buffers + +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dz.mac| + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = va.dzr ; setup DZ11 receiver interrupt vector + .word vh.dzr + .word cp.pr7 +; + . = va.dzt ; setup DZ11 transmitter interrupt vector + .word vh.dzt + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +start: spl 7 + mov #,@#dz.csr ; start dz11 + mov #,@#dz.lpr ; rxon line 5 + mov #,@#dz.lpr ; rxon line 3 + mov #,@#dz.lpr ; rxon line 1 + spl 0 +1$: wait + br 1$ +; +vh.dzr: mov @#dz.rbu,r0 ; read rbuf + bmi 1$ ; valid ? + rti +1$: inc rxcnt ; count chars + mov r0,r1 + swab r1 + bic #177770,r1 ; line number + asl r1 ; word offset + mov wrptr(r1),r2 ; wr ptr to line buffer + movb r0,(r2)+ ; store + mov r2,wrptr(r1) + asr r1 ; byte offset again + bisb lpat(r1),@#dz.len ; tx enable line + br vh.dzr ; go for next +; +vh.dzt: movb @#dz.csr+1,r1 ; get tline + bic #177770,r1 + asl r1 ; word offset + mov rdptr(r1),r2 ; rd ptr to line buffer + cmp r2,wrptr(r1) ; chars to go ? + bne 1$ + asr r1 ; if not back to byte offset + bicb lpat(r1),@#dz.len ; tx disable line + rti +1$: inc txcnt ; count chars + movb (r2)+,@#dz.tbu ; send char + mov r2,rdptr(r1) + cmp txcnt,#18. + beq 2$ + rti +2$: halt +stop: +; +rxcnt: .word 0 +txcnt: .word 0 +lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000 + .byte ^b00010000,^b00100000,^b01000000,^b10000000 +rdptr: .word line0,line1,line2,line3,line4,line5,line6,line7 +wrptr: .word line0,line1,line2,line3,line4,line5,line6,line7 +line0: .blkb 32. +line1: .blkb 32. +line2: .blkb 32. +line3: .blkb 32. +line4: .blkb 32. +line5: .blkb 32. +line6: .blkb 32. +line7: .blkb 32. + +} +#puts $lst + +rw11::asmrun $cpu sym +$cpu cp \ + -wbibr dza.tdr [list \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x11} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x31} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x51} ] \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x12} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x32} ]] +$cpu cp \ + -wbibr dza.tdr [list \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x52} ] \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x13} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x33} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x53} ] \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x14} ]] +$cpu cp \ + -wbibr dza.tdr [list \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x34} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x54} ] \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x15} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x35} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x55} ] \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x16} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x36} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x56} ]] +rw11::asmwait $cpu sym +#puts [rw11::cml $cpu] + +# expect as data +# 4 cal message (csr changed, mse set; 3 times rxon update) +# 18 char message (in random order) +$cpu cp \ + -ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 22] \ + -rbibr dza.tdr 4 -edata [list \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_RXON data 040] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_RXON data 050] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_RXON data 052] \ + ] \ + -rbibr dza.tdr 18 tdata + +# setup line - char list +set texpect { + {} + {0x11 0x12 0x13 0x14 0x15 0x16} + {} + {0x31 0x32 0x33 0x34 0x35 0x36} + {} + {0x51 0x52 0x53 0x54 0x55 0x56} + {} + {} +} +set tcount {0 0 0 0 0 0 0 0} + +foreach tword $tdata { + #puts [regtxt ibd_dz11::RFDAT $tword] + set line [regget ibd_dz11::RFDAT(line) $tword] + set data [regget ibd_dz11::RFDAT(data) $tword] + set cind [lindex $tcount $line] + set cexp [lindex $texpect $line $cind] + if {$data != $cexp } { + rlc log "FAIL: mismatch for line=$line cind=$cind: got $data expect $cexp" + rlc errcnt -inc + } + lset tcount $line [expr {$cind + 1}] +} + +# -- Section B --------------------------------------------------------------- +rlc log " B1: cpu -> cpu loop using maintenance mode ----------------" + +# re-init dz11 +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl] +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. + +# load test code +# enable maintenance mode +# rx enable lines 6,5,3,1 +# tx enable lines 6,5,3,1 +# send a,b --> to line 6 +# send A,B,C,D,E,F --> to line 5 +# send 1,2,3 --> to line 3 +# send 7,8 --> to line 1 +# check received agains send chars + +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dz.mac| + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = va.dzr ; setup DZ11 receiver interrupt vector + .word vh.dzr + .word cp.pr7 +; + . = va.dzt ; setup DZ11 transmitter interrupt vector + .word vh.dzt + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +start: spl 7 + mov #,@#dz.csr ; start dz11 + movb #^b01101010,@#dz.len ; tx ena lines 6,5,3,1 + mov #,@#dz.lpr ; rxon line 6 + mov #,@#dz.lpr ; rxon line 5 + mov #,@#dz.lpr ; rxon line 3 + mov #,@#dz.lpr ; rxon line 1 + spl 0 +1$: wait + br 1$ +; +vh.dzt: movb @#dz.csr+1,r1 ; get tline + bic #177770,r1 + asl r1 ; word offset + mov tlptr(r1),r2 ; tx ptr to char for line + tstb (r2) ; end of transmission ? + bne 1$ + asr r1 ; byte offset again + bicb lpat(r1),@#dz.len ; and disable line + rti + +1$: movb (r2)+,@#dz.tbu ; send next char + mov r2,tlptr(r1) + rti + +vh.dzr: mov @#dz.rbu,r0 ; read rbuf + bmi 1$ ; valid ? + cmp #nchar,rcnt ; all received ? + beq 3$ ; then quit + rti +1$: inc rcnt ; count chars + mov r0,r1 + swab r1 + bic #177770,r1 ; line number + asl r1 ; word offset + mov rlptr(r1),r2 ; rx ptr to char for line + cmpb r0,(r2)+ ; match ? + beq 2$ + halt ; if not error halt +2$: mov r2,rlptr(r1) + br vh.dzr ; go for next +; +3$: halt +stop: +; +lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000 + .byte ^b00010000,^b00100000,^b01000000,^b10000000 +tlptr: .word line0,line1,line2,line3,line4,line5,line6,line7 +line0: .asciz // +line1: .asciz /78/ +line2: .asciz // +line3: .asciz /123/ +line4: .asciz // +line5: .asciz /ABCDEF/ +line6: .asciz /ab/ +line7: .asciz // +linee: + nchar = linee - line0 - 8. +; + .even +rcnt: .word 0 +rlptr: .word line0,line1,line2,line3,line4,line5,line6,line7 + +} +#puts $lst + +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +#puts [ibd_dz11::rdump] +#puts [rw11::cml $cpu] + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. diff --git a/tools/tbench/dz11/test_dz11_regs.tcl b/tools/tbench/dz11/test_dz11_regs.tcl new file mode 100644 index 00000000..6b32b7d1 --- /dev/null +++ b/tools/tbench/dz11/test_dz11_regs.tcl @@ -0,0 +1,214 @@ +# $Id: test_dz11_regs.tcl 1148 2019-05-12 10:10:44Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-05-11 1148 1.0 Initial version +# 2019-05-04 1146 0.1 First draft +# +# Test DZ11 register response + +# ---------------------------------------------------------------------------- +rlc log "test_dz11_regs: test dz11 register response -------------------------" +package require ibd_dz11 +if {![ibd_dz11::setup]} { + rlc log " test_dz11_regs-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dz11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# remember 'awdth' retrieved from cntl for later tests +$cpu cp -ribr dza.csr dzcntl +set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: test rem cntl,stat response ---------------------------" +rlc log " A1.1: rem cntl ssel --------------------------------" + +set cntlmask [regbld ibd_dz11::RCNTLR {ssel -1}] + +# rem write and readback cntl.ssel +$cpu cp \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 1}] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 1}] $cntlmask \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 3}] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 3}] $cntlmask \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 0}] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 0}] $cntlmask + +rlc log " A1.2: rem cntl stat --------------------------------" + +# check that stat is rem readable but not writable +$cpu cp \ + -ribr dza.rbuf \ + -wibr dza.rbuf 0x0 -estaterr + +rlc log " A1.3: rem cntl(func=rlim) -> stat ------------------" + +set rlcnmask [regbld ibd_dz11::RSRLCN {rrlim -1} {trlim -1}] + +$cpu cp \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 1} {trlim 2} \ + {ssel "RLCN"} {func "SRLIM"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 1} {trlim 2}] \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 6} {trlim 5} \ + {ssel "RLCN"} {func "SRLIM"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 6} {trlim 5}] \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \ + {ssel "RLCN"} {func "SRLIM"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 0} {trlim 0}] + +rlc log " A2: test csr response -------------------------------------" +rlc log " A2.1: csr tie,sae,rie,mse,maint --------------------" + +$cpu cp \ + -breset \ + -rma dza.csr -edata [regbld ibd_dz11::CSR ] \ + -wma dza.csr [regbld ibd_dz11::CSR tie] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR tie] \ + -wma dza.csr [regbld ibd_dz11::CSR sae] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR sae] \ + -wma dza.csr [regbld ibd_dz11::CSR rie] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR rie] \ + -wma dza.csr [regbld ibd_dz11::CSR mse] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse] \ + -wma dza.csr [regbld ibd_dz11::CSR maint] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR maint] + +rlc log " A2.2: csr mse,maint -> cntl ------------------------" + +set cntlmask [regbld ibd_dz11::RCNTLR mse maint] + +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR mse] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR mse] $cntlmask \ + -wma dza.csr [regbld ibd_dz11::CSR mse maint] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR mse maint] $cntlmask \ + -wma dza.csr [regbld ibd_dz11::CSR] \ + -ribr dza.csr -edata [regbld ibd_dz11::RCNTLR] $cntlmask + +rlc log " A3: test tcr -> stat response ------------------------" + +$cpu cp \ + -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0xaa} {lena 0x55}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0xaa} {lena 0x55}] \ + -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x12} {lena 0x34}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x12} {lena 0x34}] \ + -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x0} {lena 0x0}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x0} {lena 0x0}] + +rlc log " A4: test cntl -> msr and stat response ---------------" + +# rem wr SCO 0x45 +# rem wr SRING 0x67 +# rd (0x45 0x67) +# rem wr SCO 0xde +# rd (0xde 0x67) +# rem wr SRING 0xad +# rd (0xde 0xad) +# rem wr SCO 0x00 +# rem wr SRING 0x00 +# rd (0x00 0x00) +$cpu cp \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x45} \ + {ssel "CORI"} {func "SCO"}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x67} \ + {ssel "CORI"} {func "SRING"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x45} {ring 0x67}] \ + -rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0x45} {ring 0x67}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0xde} \ + {ssel "CORI"} {func "SCO"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0xde} {ring 0x67}] \ + -rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0xde} {ring 0x67}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0xad} \ + {ssel "CORI"} {func "SRING"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0xde} {ring 0xad}] \ + -rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0xde} {ring 0xad}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} \ + {ssel "CORI"} {func "SCO"}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} \ + {ssel "CORI"} {func "SRING"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x00} {ring 0x00}] \ + -rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0x00} {ring 0x00}] + +rlc log " A5: test lpr(rxon) -> stat response ------------------" + +# loc wr LPR line 1 txon=1 +# rem rd rxon= 0000 0010 = 0x02 +# loc wr LPR line 2 txon=1 +# rem rd rxon= 0000 0110 = 0x06 +# loc wr LPR line 6 txon=1 +# rem rd rxon= 0100 0110 = 0x46 +# loc wr LPR line 1 txon=0 +# rem rd rxon= 1000 0000 = 0x44 +# loc wr LPR line 2 txon=0 +# loc wr LPR line 6 txon=0 +# rem rd rxon= 0000 0000 = 0x00 +$cpu cp \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x00}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 1}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x02}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 2}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x06}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 6}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x46}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 1}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x44}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 2}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 6}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x00}] + +rlc log " A5: test stat auto-inc read --------------------------" + +# loc wr TCR (dtr=0xbe lena=0xaf) +# loc wr LPR line 3 txon=1 +# rem wr SCO 0x18 +# rem wr SRING 0x26 +# rem wr SRLIM (rrlim=3 trlim=4) SSEL=DTLE +# rem rd STAT DTLE +# rem rd STAT BRRX +# rem rd STAT CORI +# rem rd STAT RLCN +$cpu cp \ + -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0xbe} {lena 0xaf}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 3}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x18} {func "SCO"}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x26} {func "SRING"}] \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 1} {trlim 2} \ + {ssel "DTLE"} {func "SRLIM"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0xbe} {lena 0xaf}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x00} {rxon 0x08}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x18} {ring 0x26}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 1} {trlim 2}] +# and clear everything +$cpu cp \ + -wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x00} {lena 0x00}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 3}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} {func "SCO"}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} {func "SRING"}] \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \ + {ssel "DTLE"} {func "SRLIM"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x00} {lena 0x00}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x00} {rxon 0x00}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x00} {ring 0x00}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 0} {trlim 0}] + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. diff --git a/tools/tbench/dz11/test_dz11_rx.tcl b/tools/tbench/dz11/test_dz11_rx.tcl new file mode 100644 index 00000000..234d4272 --- /dev/null +++ b/tools/tbench/dz11/test_dz11_rx.tcl @@ -0,0 +1,126 @@ +# $Id: test_dz11_rx.tcl 1150 2019-05-19 17:52:54Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-05-18 1150 1.0 Initial version +# 2019-05-04 1146 0.1 First draft +# +# Test DZ11 receiver response + +# ---------------------------------------------------------------------------- +rlc log "test_dz11_rx: test dz11 receiver data path --------------------------" +package require ibd_dz11 +if {![ibd_dz11::setup]} { + rlc log " test_dz11_rx-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dz11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: init dz11 ---------------------------------------------" +# - issue csr.clr +# - remember 'awdth' retrieved from rcsr for later tests +# - set rlim's to 0, clear fifos +# - harvest any dangling attn +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -ribr dza.csr dzcntl \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \ + rcl tcl {func "SRLIM"}] +set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl] +rlc exec -attn +rlc wtlam 0. + +rlc log " A2: basic data path ---------------------------------------" +rlc log " A2.1: reset and setup with line 4 ------------------" + +set csrmask [regbld ibd_dz11::CSR trdy tie sa sae rdone rie mse maint] + +# - loc csr.mse=1 +# - loc rx enable line 4 +# - rem check rxon value +# - rem check csr cal message +# - rem check rxon cal message +$cpu cp \ + -breset \ + -wma dza.csr [regbld ibd_dz11::CSR mse] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 4}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x10}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 2}] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_CSR \ + data [regbld ibd_dz11::CSR mse]] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 1 \ + line $ibd_dz11::CAL_RXON data 0x10] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse] $csrmask + +# - rem wr fifo +# - loc rd rbuf +rlc log " A2.2: rem fifo -> loc rbuf - 1 char ----------------" +$cpu cp \ + -wibr dza.tdr [regbld ibd_dz11::RFDAT {line 4} {data 0x41} ] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 1} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x41}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse ] $csrmask \ + -rma dza.rbuf -edata 0x0 [regbld ibd_dz11::RBUF val] + +# - loc rx enable line 5,6 +# - rem check rxon value +# - rem check rxon cal messages (one per update) +# - rem wr fifo with data for line 4,5,6 but also 1,2,3 +# - loc rd rbuf (only line 4,5,6 line data appears) +rlc log " A3.3: rem fifo -> loc rbuf - 5 char for line 4,5,6 -" +$cpu cp \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 5}] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \ + -wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 6}] \ + -ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x70}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 2}] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT \ + val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_RXON data 0x30] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT \ + val 1 last 1 cal 1 \ + line $ibd_dz11::CAL_RXON data 0x70] \ + -wbibr dza.tdr [list \ + [regbld ibd_dz11::RFDAT {line 1} {data 0x11} ] \ + [regbld ibd_dz11::RFDAT {line 4} {data 0x42} ] \ + [regbld ibd_dz11::RFDAT {line 2} {data 0x21} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x51} ] \ + [regbld ibd_dz11::RFDAT {line 6} {data 0x61} ] \ + [regbld ibd_dz11::RFDAT {line 3} {data 0x31} ] \ + [regbld ibd_dz11::RFDAT {line 5} {data 0x52} ] \ + [regbld ibd_dz11::RFDAT {line 4} {data 0x43} ]] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 5} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x42}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 4} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 5} {data 0x51}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 3} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 6} {data 0x61}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 2} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 5} {data 0x52}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 1} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \ + -rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x43}] \ + -ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 0}] \ + -rma dza.csr -edata [regbld ibd_dz11::CSR mse] $csrmask \ + -rma dza.rbuf -edata 0x0 [regbld ibd_dz11::RBUF val] + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. diff --git a/tools/tbench/dz11/test_dz11_tx.tcl b/tools/tbench/dz11/test_dz11_tx.tcl new file mode 100644 index 00000000..4d3f8ebe --- /dev/null +++ b/tools/tbench/dz11/test_dz11_tx.tcl @@ -0,0 +1,283 @@ +# $Id: test_dz11_tx.tcl 1150 2019-05-19 17:52:54Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-05-18 1150 1.0 Initial version +# 2019-05-04 1146 0.1 First draft +# +# Test DZ11 transmitter response + +# ---------------------------------------------------------------------------- +rlc log "test_dz11_tx: test dz11 transmitter data path -----------------------" +package require ibd_dz11 +if {![ibd_dz11::setup]} { + rlc log " test_dz11_tx-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dz11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: init dz11 ---------------------------------------------" +# - issue csr.clr +# - remember 'awdth' retrieved from rcsr for later tests +# - set rlim's to 0, clear fifos +# - harvest any dangling attn +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -ribr dza.csr dzcntl \ + -wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \ + rcl tcl {func "SRLIM"}] +set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl] +rlc exec -attn +rlc wtlam 0. + +# -- Section B --------------------------------------------------------------- +rlc log " B1: test csr.tie and basic interrupt response -------------" +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dz.mac| + . = va.dzt ; setup DZ11 transmitter interrupt vector + .word vh.dzt + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +; use in following mov to psw instead of spl to allow immediate interrupt +; +start: spl 7 ;;; lock-out interrupts + movb #^b00000001,@#dz.len ;;; enable line 0 + mov #,@#dz.csr ;;; start dz11 + mov #cp.pr6,@#cp.psw ;;; allow pri=7 + mov #cp.pr5,@#cp.psw ;;; allow pri=6 + mov #cp.pr4,@#cp.psw ;;; allow pri=5 + mov #cp.pr3,@#cp.psw ;;; allow pri=4 + mov #cp.pr2,@#cp.psw ;;; allow pri=3 + mov #cp.pr1,@#cp.psw ;;; allow pri=2 + mov #cp.pr0,@#cp.psw ;;; allow pri=1 + halt ;;; +; +vh.dzt: halt ;;; dzt handler +stop: +} + +# check that interrupt done, and pushed psw has pri=4 (device is pri=5) +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +rw11::asmtreg $cpu sp [expr {$sym(stack)-4}] +rw11::asmtmem $cpu [expr {$sym(stack)-2}] [list [regbld rw11::PSW {pri 4}]] + +# check that cal message for csr.mse 0->1 change seen +$cpu cp \ + -ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 1] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 1 \ + line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] + +rlc log " B2: one line at a time ------------------------------------" + +# re-init dz11 +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl] +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. + +# load test code +# send a,b,c --> to line 0 +# send A,B,C --> to line 1 +# send 0,1,2 --> to line 2 +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dz.mac| + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = va.dzt ; setup DZ11 transmitter interrupt vector + .word vh.dzt + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +start: spl 7 + movb #^b00000001,@#dz.len ; enable line 0 + mov #tbl,r5 ; setup table pointer + mov #,@#dz.csr ; start dz11 + spl 0 +1$: wait + br 1$ +; +vh.dzt: tstb (r5)+ ;;; action type ? + bne 1$ + movb (r5)+,@#dz.tbu ;;; write char + rti +1$: movb (r5)+,@#dz.len ;;; select new line + beq 2$ ;;; end token ? + rti +2$: halt +stop: +; +tbl: .byte 0,'a ; send a -> line 0 + .byte 0,'b ; send b -> line 0 + .byte 1,^b00000010 ; switch to line 1 + .byte 0,'A ; send A -> line 1 + .byte 0,'B ; send B -> line 1 + .byte 1,^b00000100 ; switch to line 2 + .byte 0,'0 ; send 0 -> line 2 + .byte 0,'1 ; send 1 -> line 2 + .byte 0,'2 ; send 2 -> line 2 + .byte 1,^b00000001 ; switch to line 0 + .byte 0,'c ; send c -> line 0 + .byte 1,^b00000010 ; switch to line 1 + .byte 0,'C ; send C -> line 1 + .byte 1,0 ; end +} +#puts $lst + +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +#puts [rw11::cml $cpu] + +# expect as data +# 1 cal message (csr changed, mse set) +# 9 char message (in order, since one line at a time) +set tdata [list \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x61] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x62] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 1 data 0x41] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 1 data 0x42] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x30] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x31] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x32] \ + [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x63] \ + [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 0 line 1 data 0x43] \ + ] + +$cpu cp \ + -ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 \ + tfuse [llength $tdata]] \ + -rbibr dza.tdr [llength $tdata] -edata $tdata + +rlc log " B3: up to 4 lines enabled ---------------------------------" +# re-init dz11 +$cpu cp \ + -wma dza.csr [regbld ibd_dz11::CSR clr] \ + -wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl] +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. + +# load test code +# tx enable lines 6,5,3,1 +# send a,b --> to line 6 +# send A,B,C,D,E,F --> to line 5 +# send 1,2,3 --> to line 3 +# send 7,8 --> to line 1 + +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dz.mac| + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = va.dzt ; setup DZ11 transmitter interrupt vector + .word vh.dzt + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +start: spl 7 + movb #^b01101010,@#dz.len ; enable lines 6,5,3,1 + mov #,@#dz.csr ; start dz11 + spl 0 +1$: wait + br 1$ +; +vh.dzt: movb @#dz.csr+1,r0 ; get tline + bic #177770,r0 + asl r0 ; word offset + mov lptr(r0),r1 ; ptr to char for line + tstb (r1) ; end of transmission ? + bne 1$ + asr r0 ; byte offset again + bicb lpat(r0),@#dz.len ; and tx disable line + tstb @#dz.len ; all disabled ? + beq 2$ + rti + +1$: movb (r1)+,@#dz.tbu ; send next char + mov r1,lptr(r0) + rti + +2$: halt +stop: +; +lptr: .word line0,line1,line2,line3,line4,line5,line6,line7 +lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000 + .byte ^b00010000,^b00100000,^b01000000,^b10000000 +line0: .asciz // +line1: .asciz /78/ +line2: .asciz // +line3: .asciz /123/ +line4: .asciz // +line5: .asciz /ABCDEF/ +line6: .asciz /ab/ +line7: .asciz // +} +#puts $lst + +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +#puts [rw11::cml $cpu] + +# expect as data +# 1 cal message (csr changed, mse set) +# 13 char message (in random order) +$cpu cp \ + -ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 14] \ + -ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \ + line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \ + -rbibr dza.tdr 13 tdata + +# check char message, look only at line and data +set texpect { + {} + {0x37 0x38} + {} + {0x31 0x32 0x33} + {} + {0x41 0x42 0x43 0x44 0x45 0x46} + {0x61 0x62} + {} +} +set tcount {0 0 0 0 0 0 0 0} + +foreach tword $tdata { + #puts [regtxt ibd_dz11::RFDAT $tword] + set line [regget ibd_dz11::RFDAT(line) $tword] + set data [regget ibd_dz11::RFDAT(data) $tword] + set cind [lindex $tcount $line] + set cexp [lindex $texpect $line $cind] + if {$data != $cexp } { + rlc log "FAIL: mismatch for line=$line cind=$cind: got $data expect $cexp" + rlc errcnt -inc + } + lset tcount $line [expr {$cind + 1}] +} + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0.