; $Id: cpu_badinst_nofpp.mac 1358 2023-01-27 10:37:36Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date         Rev Version  Comment
; 2023-01-27  1358   1.1    use .mcall and mlib
; 2022-07-24  1262   1.0    Initial version
; 2022-07-16  1257   0.1    First draft
;
; Test that invalid instructions trap (including fpp)
;
        .include        |lib/tcode_std_base.mac|
;
        .mcall  hcmpeq
        .mcall  vecset,vecclr
;
; Section A: verify that invalid instructions trap ===========================
        jmp     ta0101
;
vh.exp: inc     trpcnt
        add     #2,(sp)
        rti
trpcnt: .word   0
;
; Test A1.1 -- jsr,jmp +++++++++++++++++++++++++++++++++++++++++++++++
;   check that the following instructions trap to 10 (rit)
;     jsr  to register
;     jmp  to register
;   Note: 44,45,70 and J11 trap to 10, all other trap to 4
;
ta0101: vecset  v..rit,vh.exp           ; setup rit handler
        clr     trpcnt
;
        jsr     pc,r0
        halt
        jsr     pc,r5
        halt
        jmp     r0
        halt
        jmp     r5
        halt
;
        vecclr  v..rit                  ; restore rit catcher
        hcmpeq  trpcnt,#4.
;
9999$:  iot                     ; end of test A1.1
;
; Test A1.2 -- halt ++++++++++++++++++++++++++++++++++++++++++++++++++
;   check that the following instructions trap to 4 (iit)
;     halt in supervisor and user mode
;
ta0102: vecset  v..iit,vh.exp           ; setup iit handler
        clr     trpcnt
;
        mov     #cp.cms,cp.psw          ; supervisor mode
        halt                            ; instruction under test
        nop                             ; skipped by vh.exp
        mov     #cp.cmu,cp.psw          ; user mode
        halt                            ; instruction under test
        nop                             ; skipped by vh.exp
        clr     cp.psw                  ; back to kernel mode
;
        vecclr  v..iit                  ; restore iit catcher
        hcmpeq  trpcnt,#2.
;
9999$:  iot                     ; end of test A1.2
;
; Test A1.3 -- reserved (except fpp) +++++++++++++++++++++++++++++++++
;   check that reserved instruction code trap to 10 (rit)
;
ta0103: vecset  v..rit,vh.exp           ; setup iit handler
        clr     trpcnt
;
        .word   000007                  ; 000007        {MFPT in 11/44, J11}
        halt
        .word   000010                  ; 000010-000077
        halt
        .word   000077
        halt
        .word   000210                  ; 000210-000227
        halt
        .word   000227
        halt
        .word   007000                  ; 007000-007077  {CSM in 11/44, J11}
        halt
        .word   007077
        halt
        .word   007100                  ; 007100-007177
        halt
        .word   007177
        halt
        .word   007200                  ; 007200-007277  {TSTSET in J11}
        halt
        .word   007277
        halt
        .word   007300                  ; 007300-007377  {WRTLCK in J11}
        halt
        .word   007377
        halt
        .word   007400                  ; 007400-007777
        halt
        .word   007777
        halt
        .word   075000                  ; 075000-075037  {FIS in 11/40}
        halt
        .word   075037
        halt
        .word   075040                  ; 075040-075777
        halt
        .word   075777
        halt
        .word   076000                  ; 076000-076177  {CIS}
        halt
        .word   076177
        halt
        .word   076200                  ; 076200-076777
        halt
        .word   076777
        halt
        .word   106400                  ; 106400-106477  {MTPS, on 11/34A, J11}
        halt
        .word   106477
        halt
        .word   106700                  ; 106700-106777  {MFPS, on 11/34A, J11}
        halt
        .word   106777
        halt
        .word   107000                  ; 107000-107777
        halt
        .word   107777
        halt
;
        vecclr  v..rit                  ; restore iit catcher
        hcmpeq  trpcnt,#29.
;
9999$:  iot                     ; end of test A1.3
;
; Test A1.4 -- reserved (nofpp) ++++++++++++++++++++++++++++++++++++++
;   check that fpp instructions code trap to 10 (rit)
;
ta0104: vecset  v..rit,vh.exp           ; setup iit handler
        clr     trpcnt
;
        .word   170000                  ; 170000-177777
        halt
        .word   177777
        halt
;
        vecclr  v..rit                  ; restore iit catcher
        hcmpeq  trpcnt,#2.
;
9999$:  iot                     ; end of test A1.4
;
; END OF ALL TESTS - loop closure --------------------------------------------
;
        mov     tstno,r0        ; hack, for easy monitoring ...
        hcmpeq  tstno,#4.       ; all tests done ?
;
        jmp     loop
;
        .end    start