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- tools - asm-11/lib/defs_xu.mac: add xt.* and xr.* definitions - oskit/211bsd_rk/211bsd_rk_boot.ecmd: add tt1: mode: definition - tcl/rw11/shell.tcl: update '.h' and '.ha' text output - tcode/cpu_basics.mac: A4.4: change exemptions, e11 now like 11/70 and w11
137 lines
6.0 KiB
Plaintext
137 lines
6.0 KiB
Plaintext
; $Id: defs_xu.mac 1387 2023-03-27 07:29:02Z mueller $
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; SPDX-License-Identifier: GPL-3.0-or-later
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; Copyright 2017-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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;
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; definitions for DEUNA controler
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; uses also xf,xm,xr,xs,xt,r2,r3,t2,t3 name prefixes for clarity
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;
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; vector address/priority definition
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;
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va.xu=000120
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vp.xu=5
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;
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; register addresses
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;
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xu.pr0=174510
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xu.pr1=174512
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xu.pr2=174514
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xu.pr3=174516
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;
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; symbol definitions for xu.pr0
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;
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xu.ser=100000 ; SERI: status error interrupt
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xu.pce=040000 ; PCEI: port command error interrupt
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xu.rxi=020000 ; RXI: receive ring interrupt
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xu.txi=010000 ; TXI: transmit ring interrupt
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xu.dni=004000 ; DNI: done interrupt (port command done)
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xu.rcb=002000 ; RCBI: receive buffer unavailable interrupt
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xu.usc=000400 ; USCI: unsolicited state change interrupt
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xu.ir =000200 ; INTR: interrupt summary
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xu.ie =000100 ; INTE: interrupt enable
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xu.rst=000040 ; RSET: DEUNA reset
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xu.fso=000017 ; command: STOP
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xu.fha=000016 ; command: HALT (for DELUA)
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xu.fpd=000010 ; command: PDMD (polling demand)
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xu.fsa=000004 ; command: START
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xu.fgc=000002 ; command: GET CMD
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xu.fgp=000001 ; command: GET PCBB
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;
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; symbol definitions for xu.pr1
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;
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xu.xpw=100000 ; XPWR: transceiver power OK
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xu.ica=040000 ; ICAB: port/link cabling OK
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xu.pct=000200 ; PCTO: port command timeout
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xu.deu=000020 ; 0=DEUNA; 1=DELUA
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xu.sma=000017 ; STATE field mask
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xu.sha=000010 ; state: PRIMARY HALT (for DELUA)
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xu.sru=000003 ; state: RUNNING
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xu.srd=000002 ; state: READY
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xu.sre=000000 ; state: RESET
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;
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; port control functions, use in LSB of PCB[0]
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;
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xf.wi =000023 ; WSID: write system id
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xf.ri =000022 ; RSID: read system id
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xf.rcc=000017 ; RCSTAT: read&clear status
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xf.rs =000016 ; RSTAT: read status
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xf.wm =000015 ; WMODE: write mode
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xf.rm =000014 ; RMODE: read mode
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xf.rcc=000013 ; RCCTR: read and clear counters
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xf.rc =000012 ; RCTR: read counters
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xf.wrf=000011 ; WRF : write ring format
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xf.rrf=000010 ; RRF : read ring format
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xf.wma=000007 ; WMAL: write mcast MAC list
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xf.rma=000006 ; RMAL: read mcast MAC list
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xf.wpa=000005 ; WPA: write physical MAC
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xf.rpa=000004 ; RPA: read physical MAC
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xf.rda=000002 ; RPDA: read default MAC
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xf.no =000000 ; NOOP: no operation
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;
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; mode register, write/read via PCB[1]
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;
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xm.pro=100000 ; PROM: promiscuous mode
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xm.eam=040000 ; ENAL: enable all multicast
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xm.dcr=020000 ; DRDC: disable chaining on receive
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xm.tpa=010000 ; TPAD: transmit message paddinf enable
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xm.etc=004000 ; ETC: enable collision check
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xm.pro=001000 ; DMNT: disable maintenance message
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xm.dtc=000010 ; DTCR: disable transmit CRC
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xm.lop=000004 ; LOOP: internal loopback mode
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xm.pro=000001 ; HDPX: half-suplex mode
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;
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; status register, write/read via PCB[1]
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;
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xs.ers=100000 ; ERRS: error summary
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xs.mer=040000 ; MERR: multiple errors
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xs.cer=010000 ; CERR: collision test error
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xs.tmo=004000 ; TMOT: timeout error
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xs.rre=001000 ; RRNG: receive ring error
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xs.tre=000400 ; TRNG: transmit ring error
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xs.rpa=000200 ; PTCH: ROM patch
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xs.rco=000100 ; RRAM: RAM code operational
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xs.rev=000077 ; RREV: ROM revisions (field mask)
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;
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; transmit descriptor offsets
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;
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xt.len=0 ; SLEN[15:00] segment length
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xt.buf=2 ; SEGB[15:00] segment base MDB
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xt.fl2=4 ; flags and SEGB[17:16]
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xt.fl3=6 ; flags
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;
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; transmit descriptor word 2 (xt.fl2) and word 3 (xt.fl3)
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;
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t2.own=100000 ; OWN: if 1 owned by DEUNA
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t2.ers=040000 ; ERRS: error summary
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t2.mtc=020000 ; MTCH: station match
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t2.mor=010000 ; MORE: multiple retries needed
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t2.one=004000 ; ONE: one collision
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t2.def=002000 ; DEF: deferred
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t2.stp=001000 ; STP: start of packet
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t2.enp=000400 ; ENP: end of packet
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t3.ble=100000 ; BUFL: buffer length error
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t3.uto=040000 ; UBTO: UNIBUS timeout
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t3.lco=010000 ; LCOL: late collision
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t3.lca=004000 ; LCAR: loss of carrier
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t3.rle=002000 ; RTRY: retry limit exceeded
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;
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; receive descriptor offsets
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;
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xr.len=0 ; SLEN[15:01] segment length
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xr.buf=2 ; SEGB[15:00] segment base MDB
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xr.fl2=4 ; flags and SEGB[17:16]
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xr.fl3=6 ; flags and MLEN
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;
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; receive descriptor word 2 and word 3
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;
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r2.own=100000 ; OWN: if 1 owned by DEUNA
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r2.ers=040000 ; ERRS: error summary
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r2.fra=020000 ; FRAM: frame error
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r2.ofl=010000 ; OFLO: message overflow
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r2.crc=004000 ; CRC: CRC error
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r2.stp=001000 ; STP: start of packet
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r2.enp=000400 ; ENP: end of packet
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r3.ble=100000 ; BUFL: buffer length error
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r3.uto=040000 ; UBTO: UNIBUS timeout
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r3.nch=010000 ; NCHN: no data chaining
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r3.mle=007777 ; MLEN: message length
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