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163 lines
4.8 KiB
Tcl
163 lines
4.8 KiB
Tcl
# $Id: test_tm11_int.tcl 1365 2023-02-02 11:46:43Z mueller $
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# SPDX-License-Identifier: GPL-3.0-or-later
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# Copyright 2015-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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#
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# Revision History:
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# Date Rev Version Comment
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# 2019-03-09 1120 1.0.2 add proper device check
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# 2015-07-25 704 1.0.1 tmpproc_dotest: use args rather opts
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# 2015-05-17 683 1.0 Initial version
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#
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# Test interrupt response
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# A:
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# ----------------------------------------------------------------------------
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rlc log "test_tm11_int: test interrupt response ------------------------------"
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rlc log " setup: all units online"
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package require ibd_tm11
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if {![ibd_tm11::setup]} {
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rlc log " test_tm11_int-W: device not found, test aborted"
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return
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}
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rlc set statmask $rw11::STAT_DEFMASK
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rlc set statvalue 0
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# configure drives
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set rsronl [regbld ibd_tm11::RRL {onl 1} {bot 1}]
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$cpu cp -wibr "tma.cr" [ibd_tm11::rcr_wunit 0] \
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-wibr "tma.rl" $rsronl \
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-wibr "tma.cr" [ibd_tm11::rcr_wunit 1] \
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-wibr "tma.rl" $rsronl \
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-wibr "tma.cr" [ibd_tm11::rcr_wunit 2] \
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-wibr "tma.rl" $rsronl \
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-wibr "tma.cr" [ibd_tm11::rcr_wunit 3] \
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-wibr "tma.rl" $rsronl
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# load test code
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$cpu ldasm -lst lst -sym sym {
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.include |lib/defs_cpu.mac|
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.include |lib/defs_tm.mac|
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;
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.include |lib/vec_cpucatch.mac|
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;
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. = 000224 ; setup TM11 interrupt vector
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v..tm: .word vh.tm
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.word cp.pr7
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;
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. = 1000 ; data area
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stack:
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ibuf: .blkw 3. ; input buffer
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obuf: .blkw 5. ; output buffer
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fbuf: .blkw 4. ; final buffer
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;
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. = 2000 ; code area
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start: spl 7 ; lock out interrupts
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;
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mov #obuf,r0 ; clear obuf
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clr (r0)+
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clr (r0)+
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clr (r0)+
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clr (r0)+
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clr (r0)+
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;
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mov #ibuf,r0 ; setup regs from ibuf
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mov (r0)+,@#tm.bc ; bc
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mov (r0)+,@#tm.ba ; ba
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mov (r0)+,@#tm.cr ; cr
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spl 0 ; allow interrupts
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;
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poll: tstb @#tm.cr ; check cr
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bpl poll ; if rdy=0 keep polling
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;
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4$: mov #fbuf,r0 ; store final regs in fbuf
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mov @#tm.sr,(r0)+ ; sr
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mov @#tm.cr,(r0)+ ; cr
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mov @#tm.bc,(r0)+ ; bc
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mov @#tm.ba,(r0)+ ; ba
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halt ; halt if done
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stop:
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; TM11 interrupt handler
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vh.tm: mov #obuf,r0 ; store regs in obuf
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mov #1,(r0)+ ; flag
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mov @#tm.sr,(r0)+ ; sr
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mov @#tm.cr,(r0)+ ; cr
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mov @#tm.bc,(r0)+ ; bc
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mov @#tm.ba,(r0)+ ; ba
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rti ; and return
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}
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##puts $lst
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# define tmpproc for readback checks
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proc tmpproc_dotest {cpu symName args} {
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upvar 1 $symName sym
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set tout 10.; # FIXME_code: parameter ??
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# setup defs hash, first defaults, than write over concrete run values
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args2opts opts {i.cr 0 \
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i.bc 0 \
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i.ba 0 \
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o.sr 0 \
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o.cr 0 \
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o.bc 0 \
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o.ba 0 \
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do.lam 0 } {*}$args
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# build ibuf
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set ibuf [list $opts(i.bc) $opts(i.ba) $opts(i.cr)]
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# setup write ibuf, setup stack, and start cpu at start:
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$cpu cp -wal $sym(ibuf) \
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-bwm $ibuf \
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-wsp $sym(stack) \
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-stapc $sym(start)
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# here do minimal lam handling (harvest + send DONE)
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if {$opts(do.lam)} {
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rlc wtlam $tout apat
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$cpu cp -attn \
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-wibr tma.cs [ibd_rhrp::cr_func $ibd_tm11::RFUNC_DONE]
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}
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$cpu wtcpu -reset $tout
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# determine regs after cleanup
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$cpu cp -rpc -edata $sym(stop) \
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-rsp -edata $sym(stack) \
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-wal $sym(obuf) \
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-rmi -edata 1 \
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-rmi -edata $opts(o.sr) \
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-rmi -edata $opts(o.cr) \
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-rmi -edata $opts(o.bc) \
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-rmi -edata $opts(o.ba) \
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-wal $sym(fbuf) \
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-rmi -edata $opts(o.sr) \
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-rmi -edata $opts(o.cr) \
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-rmi -edata $opts(o.bc) \
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-rmi -edata $opts(o.ba)
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return
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}
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# discard pending attn to be on save side
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rlc wtlam 0.
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rlc exec -attn
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# -- Section A ---------------------------------------------------------------
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rlc log " A1.1 set cr.ie=1 -> software interrupt -------------"
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tmpproc_dotest $cpu sym \
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i.cr [regbld ibd_tm11::CR ie] \
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i.bc 0xff00 \
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i.ba 0x8800 \
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o.sr [regbld ibd_tm11::SR onl bot tur] \
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o.cr [regbld ibd_tm11::CR rdy ie] \
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o.bc 0xff00 \
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o.ba 0x8800
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