mirror of
https://github.com/wfjm/w11.git
synced 2026-02-02 23:21:27 +00:00
0c395856d7
- add fifo_simple_dram: simple fifo with CE/WE interface, dram based - add test benches for fifo_simple_dram, fifo_2c_dram, and fifo_2c_dram2 - add simclkv: test bench clock generator with variable period
6 lines
57 B
Plaintext
6 lines
57 B
Plaintext
# libs
|
|
../slvtypes.vhd
|
|
# components
|
|
# design
|
|
simclkv.vhd
|