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- tools/src/... - tools/tcl/... - tools/dox - tools/make - add rlink test system - rtl/sys_gen/tst_rlink/nexys2/...
8 lines
121 B
Plaintext
8 lines
121 B
Plaintext
# libs
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../slvtypes.vhd
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memlib.vhd
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# components
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ram_1swsr_xfirst_gen_unisim.vbom
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# design
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ram_1swsr_wfirst_gen_unisim.vhd
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