mirror of
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66f3f5d085
- the CI/CD workflow did not defined the TBW_GHDL_OPTS environment variable, as consequence VHDL IEEE package warnings at t=0ms were not suppressed and polluted the log files - that problem was already in .travis.yml and was carried over to ci.yml - now fixed, and log files are not cluttered anymore with essentially unavoidable but harmless warnings at t=0ms.
143 lines
4.9 KiB
Groff
143 lines
4.9 KiB
Groff
.\" -*- nroff -*-
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.\" $Id: config_wrapper.1 1234 2022-05-03 18:28:48Z mueller $
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.\" SPDX-License-Identifier: GPL-3.0-or-later
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.\" Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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.\"
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.\" ------------------------------------------------------------------
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.
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.TH CONFIG_WRAPPER 1 2013-01-02 "Retro Project" "Retro Project Manual"
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.\" ------------------------------------------------------------------
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.SH NAME
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config_wrapper \- configure FPGA via ISE impact or Linux jtag
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.\" ------------------------------------------------------------------
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.SH SYNOPSIS
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.
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.SY config_wrapper
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.OP \-\-board=\fIb\fP
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.OP \-\-path=\fIp\fP
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.I COMMAND
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.I FILE
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.
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.SY config_wrapper
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.B \-\-help
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.YS
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.
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.\" ------------------------------------------------------------------
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.SH DESCRIPTION
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Wrapper script to handle the configuration of an FPGA board with either
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a XILINX JTAG programming cable and the ISE \fBimpact\fP program or with
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an onboard Cypress FX2 USB controller and the \fBjtag\fP(1) program.
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The \fICOMMAND\fP argument controls the action:
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.RS 3
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.PD 0
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.IP \fBiconfig\fP 10
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configure using \fBimpact\fP with \fI.bit\fP file \fIFILE\fP
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.IP \fBjconfig\fP
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configure using \fBjtag\fP(1) with \fI.svf\fP file \fIFILE\fP
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.IP \fBbit2svf\fP
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create a \fI.svf\fP file from the \fI.bit\fP file \fIFILE\fP
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.PD
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.
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.\" ------------------------------------------------------------------
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.SH OPTIONS
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.
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.\" ----------------------------------------------
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.IP \fB\-\-board=\fIb\fR
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determines the type of board to be configured. The default is 's3board',
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currently supported boards are:
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.RS
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.RS 3
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.PD 0
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.IP \fBs3board\fP 10
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Digilent S3BOARD. Default path: xc3s1000
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.IP \fBnexys2\fP
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Digilent Nexys2. Default path: xc3s1200e
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.IP \fBnexys3\fP
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Digilent Nexys3. Default path: xc6slx16
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.IP \fBatlys\fP
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Digilent Atlys. Default path: xc6slx45
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.IP \fBsp605\fP
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Xilinx SP605. Default path: xc6slx45t
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.RE
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.RE
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.PD
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.
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.\" ----------------------------------------------
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.IP \fB\-\-path=\fIp\fR
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determines the type of FPGA to be configured. It is usually properly defaulted
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based on the \fB\-\-board\fP option. Only in cases where a board is available
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with several die sizes this option will be needed.
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.
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.\" ----------------------------------------------
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.IP \fB\-\-help\fP
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print help text and exit.
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.
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.\" ------------------------------------------------------------------
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.SH COMMANDS
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.
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.\" ----------------------------------------------
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.IP \fBbit2svf\fP
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Convert an FPGA configuration file from \fI.bit\fP format (the native XILINX
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format) to \fI.svf\fP format (the portable Serial Vector Format). The
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XILINX ISE \fBimpact\fP program is used, the input \fIFILE\fP must be in
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\fI.bit\fP format.
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.
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.\" ----------------------------------------------
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.IP \fBiconfig\fP
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Configure an FPGA with XILINX ISE \fBimpact\fP. The input \fIFILE\fP must be in
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\fI.bit\fP format.
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.
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.\" ----------------------------------------------
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.IP \fBjconfig\fP
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Configure an FPGA with \fBjtag\fP(1). The input \fIFILE\fP must be in
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\fI.svf\fP format. This sub command is usually used for boards with a
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Cypress FX2 USB controller, like the Digilent Nexys2, Nexys3 or Atlys,
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and an FX2 firmware that emulates an Altera USB-Blaster programming cable.
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The USB device path is defined by the environment variables \fBRETRO_FX2_VID\fP
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and \fBRETRO_FX2_PID\fP, or defaults to vid=16c0 and pid=03ef.
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Use the \fBfx2load_wrapper\fP(1) command to ensure that the proper firmware
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is loaded in the Cypress FX2 USB controller.
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The \fBbit2svf\fP sub command can be used to create a \fI.svf\fP from
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a \fI.bit\fP file.
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.
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.\" ------------------------------------------------------------------
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.SH EXIT STATUS
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In case of an error an exit status 1 is returned.
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.
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.\" ------------------------------------------------------------------
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.SH ENVIRONMENT
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.IP "\fBRETRO_FX2_VID, RETRO_FX2_PID\fR" 4
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Used by the \fBjconfig\fP sub command to define the USB path of the
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Cypress FX2 USB controller emulating an Altera USB-Blaster cable.
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.IP \fBXILINX\fR
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Path to current XILINX ISE installation. Required by all sub commands,
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mainly to locate the \fI.bsdl\fP files which describe the JTAG commands
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of all devices in the JTAG chain.
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.br
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Best is to use \fBconfig_wrapper\fP with the \fBxtwi\fP(1) wrapper, this will
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automatically define this environment variable.
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.
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.\" ------------------------------------------------------------------
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.SH EXAMPLES
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.IP "\fBconfig_wrapper bit2svf test.bit\fR" 4
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Creates \fItest.svf\fP from \fItest.bit\fP.
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.
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.IP "\fBconfig_wrapper --board=nexys2 iconfig test.bit\fR"
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Configures a Nexys2 board with \fItest.bit\fP using ISE \fBimpact\fP.
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.
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.IP "\fBconfig_wrapper --board=nexys3 jconfig test.svf\fR"
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Configures a Nexys3 board with \fItest.svf\fP using \fBjtag\fP(1).
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.
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.\" ------------------------------------------------------------------
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.SH "SEE ALSO"
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.BR jtag (1),
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.BR fx2load_wrapper (1),
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.BR xtwi (1)
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.\" ------------------------------------------------------------------
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.SH AUTHOR
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Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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