mirror of
https://github.com/wfjm/w11.git
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- rtl/w11a:
- pdp11.vhd: add cpustat_type treq_tbit and resetcnt; use op_rti rather op_rtt
- pdp11_decode.vhd: use op_rti rather op_rtt
- pdp11_sequencer.vhd: tbit logic overhaul; use treq_tbit; cleanups;
use resetcnt for 8 cycle RESET wait
- rtl/sys_gen/w11a/s3board/sys_conf.vhd: disable monitors for timing closure
- rtl/sys_gen/w11a/*/*.vmfset: drop removed signals
- tools
- asm-11/lib/push_pop.mac: add push2
- tbench/w11a/test_w11a_inst_quick.tcl: use creset option to clr pending traps
- tcl/rw11/asm.tcl: asmrun: add creset option (active with ps option)
- tcode/cpu_basics.mac: add F2.3 (reset settling time)
- tcode/cpu_details.mac: add A4.* (PSW + tbit traps)
Notes on w11 systems: w11a for Arty A7-35
Basics
The sys_w11a_arty system is a w11a implementation for the Digilent Arty A7-35 board with DDR3 SDRAM support via a Vivado MIG core. For complete configuration, see sys_conf.vhd. The most important features are:
| Property | Value |
|---|---|
| CPU options | FPP: no; Cache: 32 kB |
| Memory | 3840 kB from DDR3 SDRAM via miglib_arty |
| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes |
| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes |
| Rlink | 12 Mbps via FT2232HQ based serial link |
An alternative design that uses only BRAM is available as sys_w11a_br_arty.
Usage
The board has only 4 LEDs plus 4 RGB-LEDS and offers only a compactified console light emulation. The memory size of 3840 kB allows starting all oskits.
For complete instructions on how to run operating system images, see w11a_os_guide. The default setup is:
SWI = 0110 (gives console light emulation...)
ti_w11 -tuD,12M,break,xon @<oskit-name>_boot.tcl
Status & History
The Arty A7-35 board is one of the main w11 development platforms. The sys_w11a_arty design is often FPGA tested with ostest against all oskits.
- 2019-06-05: reduce clock to 72 MHz, Vivado 2919.1 fails with 75 MHz
- 2019-01-27: reduce clock to 75 MHz, Vivado 2918.3 fails with 80 MHz
- 2018-11-18: initial version, runs with 80 MHz using Vivado 2017.4