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0e96fa106b
- rtl/bplib/nexys4d: added board support - rtl/sys_gen - tst_rlink/nexys4d: rlink tester design - tst_serloop/nexys4d: serial port tester design - tst_snhumanio/nexys4d: human IO tester design - w11a/nexys4d_bram: w11 design using BRAM only
17 lines
438 B
Makefile
17 lines
438 B
Makefile
# $Id: viv_default_nexys4d.mk 838 2017-01-04 20:57:57Z mueller $
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#
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# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# License disclaimer see License.txt in $RETROBASE directory
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#
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# Revision History:
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# Date Rev Version Comment
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# 2017-01-04 838 1.0 Initial version
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#---
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#
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# Setup for Digilent Nexys4 DDR
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#
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# setup default board and part
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#
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VIV_BOARD_SETUP = ${RETROBASE}/rtl/bplib/nexys4d/nexys4d_setup.tcl
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#
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