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102 lines
3.2 KiB
VHDL
102 lines
3.2 KiB
VHDL
-- $Id: tbd_cdata2byte.vhd 984 2018-01-02 20:56:27Z mueller $
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--
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-- Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 3, or (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Module Name: tbd_cdata2byte - syn
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-- Description: Wrapper for cdata2byte + byte2cdata.
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--
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-- Dependencies: cdata2byte
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-- byte2cdata
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--
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-- To test: cdata2byte
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-- byte2cdata
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--
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-- Target Devices: generic
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--
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-- Synthesized (xst):
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- 2014-10-18 597 14.7 xc6slx16 25 67 0 28 s 3.56
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--
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-- Tool versions: xst 14.7; ghdl 0.31
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-- Revision History:
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-- Date Rev Version Comment
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-- 2014-10-18 597 1.0 Initial version
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.comlib.all;
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entity tbd_cdata2byte is -- cdata2byte + byte2cdata [tb design]
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port (
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CLK : in slbit; -- clock
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RESET : in slbit; -- reset
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C2B_ESCXON : in slbit; -- c2b: enable xon/xoff escaping
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C2B_ESCFILL : in slbit; -- c2b: enable fill escaping
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C2B_DI : in slv9; -- c2b: input data; bit 8 = comma flag
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C2B_ENA : in slbit; -- c2b: input data enable
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C2B_BUSY : out slbit; -- c2b: input data busy
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C2B_DO : out slv8; -- c2b: output data
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C2B_VAL : out slbit; -- c2b: output data valid
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B2C_BUSY : out slbit; -- b2c: input data busy
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B2C_DO : out slv9; -- b2c: output data; bit 8 = comma flag
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B2C_VAL : out slbit; -- b2c: output data valid
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B2C_HOLD : in slbit -- b2c: output data hold
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);
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end tbd_cdata2byte;
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architecture syn of tbd_cdata2byte is
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signal C2B_DO_L : slv8 := (others=>'0');
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signal C2B_VAL_L : slbit := '0';
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signal B2C_BUSY_L : slbit := '0';
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begin
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C2B : cdata2byte
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port map (
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CLK => CLK,
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RESET => RESET,
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ESCXON => C2B_ESCXON,
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ESCFILL => C2B_ESCFILL,
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DI => C2B_DI,
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ENA => C2B_ENA,
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BUSY => C2B_BUSY,
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DO => C2B_DO_L,
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VAL => C2B_VAL_L,
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HOLD => B2C_BUSY_L
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);
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B2C : byte2cdata
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port map (
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CLK => CLK,
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RESET => RESET,
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DI => C2B_DO_L,
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ENA => C2B_VAL_L,
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ERR => '0',
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BUSY => B2C_BUSY_L,
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DO => B2C_DO,
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VAL => B2C_VAL,
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HOLD => B2C_HOLD
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);
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C2B_DO <= C2B_DO_L;
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C2B_VAL <= C2B_VAL_L;
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B2C_BUSY <= B2C_BUSY_L;
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end syn;
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