mirror of
https://github.com/wfjm/w11.git
synced 2026-04-24 19:40:39 +00:00
- sys_tst_sram_arty: add system and tb - sramif_mig_arty: add SRAM to DDR via MIG adapter for arty - cdc_pulse: add clock domain crossing for a slowly changing value - cdc_vector_s0: add ENA port (now used in cdc_pulse) - tst_mig/util.tcl: test_rwait: add optional lena argument - viv_tools_build.tcl: downgrade SSN critical warnings to warnings
61 lines
2.4 KiB
VHDL
61 lines
2.4 KiB
VHDL
-- $Id: sys_conf.vhd 1074 2018-11-25 21:38:59Z mueller $
|
|
--
|
|
-- Copyright 2018- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
|
--
|
|
-- This program is free software; you may redistribute and/or modify it under
|
|
-- the terms of the GNU General Public License as published by the Free
|
|
-- Software Foundation, either version 3, or (at your option) any later version.
|
|
--
|
|
-- This program is distributed in the hope that it will be useful, but
|
|
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
|
|
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
|
-- for complete details.
|
|
--
|
|
------------------------------------------------------------------------------
|
|
-- Package Name: sys_conf
|
|
-- Description: Definitions for sys_tst_sram_arty (for synthesis)
|
|
--
|
|
-- Dependencies: -
|
|
-- Tool versions: viv 2017.2; ghdl 0.34
|
|
-- Revision History:
|
|
-- Date Rev Version Comment
|
|
-- 2018-11-17 1071 1.0 Initial version
|
|
------------------------------------------------------------------------------
|
|
|
|
library ieee;
|
|
use ieee.std_logic_1164.all;
|
|
|
|
use work.slvtypes.all;
|
|
|
|
package sys_conf is
|
|
|
|
constant sys_conf_clksys_vcodivide : positive := 1;
|
|
constant sys_conf_clksys_vcomultiply : positive := 8; -- vco 800 MHz
|
|
constant sys_conf_clksys_outdivide : positive := 10; -- sys 80 MHz
|
|
constant sys_conf_clksys_gentype : string := "MMCM";
|
|
-- dual clock design, clkser = 120 MHz
|
|
constant sys_conf_clkser_vcodivide : positive := 1;
|
|
constant sys_conf_clkser_vcomultiply : positive := 12; -- vco 1200 MHz
|
|
constant sys_conf_clkser_outdivide : positive := 10; -- sys 120 MHz
|
|
constant sys_conf_clkser_gentype : string := "PLL";
|
|
|
|
-- configure rlink and hio interfaces --------------------------------------
|
|
constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
|
|
|
|
-- derived constants
|
|
|
|
constant sys_conf_clksys : integer :=
|
|
((100000000/sys_conf_clksys_vcodivide)*sys_conf_clksys_vcomultiply) /
|
|
sys_conf_clksys_outdivide;
|
|
constant sys_conf_clksys_mhz : integer := sys_conf_clksys/1000000;
|
|
|
|
constant sys_conf_clkser : integer :=
|
|
((100000000/sys_conf_clkser_vcodivide)*sys_conf_clkser_vcomultiply) /
|
|
sys_conf_clkser_outdivide;
|
|
constant sys_conf_clkser_mhz : integer := sys_conf_clkser/1000000;
|
|
|
|
constant sys_conf_ser2rri_cdinit : integer :=
|
|
(sys_conf_clkser/sys_conf_ser2rri_defbaud)-1;
|
|
|
|
end package sys_conf;
|