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wfjm.w11/tools/tcode/cpu_eis.mac
2022-07-18 07:48:31 +02:00

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; $Id: cpu_eis.mac 1257 2022-07-16 21:49:08Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date Rev Version Comment
; 2022-07-09 1450 1.0 Initial version
;
; Test CPU EIS instructions
;
.include |lib/tcode_std_base.mac|
;
; Section A: div =============================================================
; This section verifies
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
; 0 111 001 rrr sss sss NZVC DIV
;
jmp ta0101
;
; driver for div tests
;
topdiv: mov (r5),r4 ; setup data pointer
mov 2(r5),r5 ; setup end pointer
mov #cp.psw,r3 ; setup psw pointer
;
100$: mov (r4)+,r0 ; load divident high
mov (r4)+,r1 ; load divident low
div (r4)+,r0 ; divide by divisor
mov (r3),r2 ; get psw
cmp (r4)+,r2 ; check psw
beq .+4
halt
bit #cp00vc, r2 ; V or C set ?
beq 200$ ; eq if V=0 and C=0
add #4,r4 ; skip q and r check
br 300$
;
200$: cmp (r4)+,r0 ; check quotient
beq .+4
halt
cmp (r4)+,r1 ; check reminder
beq .+4
halt
;
300$: cmp r4,r5 ; more to do ?
blo 100$
rts pc
;
; Test A1.1 -- div test basics ++++++++++++++++++++++++++++++++++++++++++++++++
; from test_w11a_div.tcl, div_testd2 cases, translated 1-to-1
;
ta0101: mov #1000$,r5
jsr pc,topdiv
jmp 9999$
;
1000$: .word 1010$
.word 1011$
;
;
; ddh ddl dr psw q r
1010$:
; --- dr>0
.word 0, 0, 3, cp0z00, 0, 0
.word 0, 1, 3, cp0z00, 0, 1
.word 0, 2, 3, cp0z00, 0, 2
.word 0, 3, 3, cp0000, 1, 0
.word 0, 4, 3, cp0000, 1, 1
.word -1, -1, 3, cp0z00, 0, -1
.word -1, -2, 3, cp0z00, 0, -2
.word -1, -3, 3, cpn000, -1, 0
.word -1, -4, 3, cpn000, -1, -1
; --- dr<0
.word 0, 0, -3, cp0z00, 0, 0
.word 0, 1, -3, cp0z00, 0, 1
.word 0, 2, -3, cp0z00, 0, 2
.word 0, 3, -3, cpn000, -1, 0
.word 0, 4, -3, cpn000, -1, 1
.word -1, -1, -3, cp0z00, 0, -1
.word -1, -2, -3, cp0z00, 0, -2
.word -1, -3, -3, cp0000, 1, 0
.word -1, -4, -3, cp0000, 1, -1
; --- dr==0
.word 0, 0, 0, cp0zvc, 0, 0 ; !vc
.word 0, 1, 0, cp0zvc, 0, 0 ; !vc
.word -1, -1, 0, cp0zvc, 0, 0 ; !vc
; --- 4 quadrant basics
.word 0, 34., 5., cp0000, 6., 4.
.word 0, 34., -5., cpn000, -6., 4.
.word -1, -34., 5., cpn000, -6., -4.
.word -1, -34., -5., cp0000, 6., -4.
; --- late div quite cases in 2 quadrant algorithm
.word -1,-32767., -1., cp0000, 32767., 0. ;-32767/-1
.word -1, 100000, -1., cp00v0, 0, 0 ;-32768/-1 !v
.word -1, 077777, -1., cp00v0, 0, 0 ;-32769/-1 !v
;
.word -1, 000002, -2., cp0000, 32767., 0. ;-65534/-2
.word -1, 000001, -2., cp0000, 32767., -1. ;-65535/-2
.word -1, 000000, -2., cp00v0, 0, 0 ;-65536/-2 !v
.word -2, 177777, -2., cp00v0, 0, 0 ;-65537/-2 !v
; --- big divident overflow cases
.word 77777, 177777, 1., cp00v0, 0, 0 ;0x7fffffff/ 1 !v
.word 77777, 177777, 2., cp00v0, 0, 0 ;0x7fffffff/ 2 !v
.word 77777, 177777, -1., cpn0v0, 0, 0 ;0x7fffffff/-1 !v
.word 77777, 177777, -2., cpn0v0, 0, 0 ;0x7fffffff/-2 !v
.word 100000, 000000, 1., cpn0v0, 0, 0 ;0x80000000/ 1 !v
.word 100000, 000000, 2., cpn0v0, 0, 0 ;0x80000000/ 2 !v
.word 100000, 000000, -1., cp00v0, 0, 0 ;0x80000000/-1 !v
.word 100000, 000000, -2., cp00v0, 0, 0 ;0x80000000/-2 !v
;
1011$:
9999$: iot ; end of test A1.1
;
; Test A1.2 -- div test systematic ++++++++++++++++++++++++++++++++++++++++++++
; from test_w11a_div.tcl, div_testdqr cases, exported via div_show_exp
;
ta0102: mov #1000$,r5
jsr pc,topdiv
jmp 9999$
;
1000$: .word 1010$
.word 1011$
;
;
; ddh ddl dr psw q r
1010$:
; test q=100000 boundary cases (q = max neg value)
; case dd>0, dr<0 -- factor 21846
.word 0025253,0000000, -21846., cpn000, -32768., 0.;dd= 715849728
.word 0025253,0000001, -21846., cpn000, -32768., 1.;dd= 715849729
.word 0025253,0052524, -21846., cpn000, -32768., 21844.;dd= 715871572
.word 0025253,0052525, -21846., cpn000, -32768., 21845.;dd= 715871573
.word 0025253,0052526, -21846., cpn0v0, 10923., 21846.;dd= 715871574
.word 0025253,0052527, -21846., cpn0v0, 10923., 21847.;dd= 715871575
; case dd<0, dr>0 -- factor 21846
.word 0152525,0000000, 21846., cpn000, -32768., 0.;dd= -715849728
.word 0152524,0177777, 21846., cpn000, -32768., -1.;dd= -715849729
.word 0152524,0125254, 21846., cpn000, -32768., -21844.;dd= -715871572
.word 0152524,0125253, 21846., cpn000, -32768., -21845.;dd= -715871573
.word 0152524,0125252, 21846., cpn0v0, -10924., -21846.;dd= -715871574
.word 0152524,0125251, 21846., cpn0v0, -10924., -21847.;dd= -715871575
; case dd>0, dr<0 -- factor 21847
.word 0025253,0100000, -21847., cpn000, -32768., 0.;dd= 715882496
.word 0025253,0100001, -21847., cpn000, -32768., 1.;dd= 715882497
.word 0025253,0152525, -21847., cpn000, -32768., 21845.;dd= 715904341
.word 0025253,0152526, -21847., cpn000, -32768., 21846.;dd= 715904342
.word 0025253,0152527, -21847., cpn0v0, 10923., -10921.;dd= 715904343
.word 0025253,0152530, -21847., cpn0v0, 10923., -10920.;dd= 715904344
; case dd<0, dr>0 -- factor 21847
.word 0152524,0100000, 21847., cpn000, -32768., 0.;dd= -715882496
.word 0152524,0077777, 21847., cpn000, -32768., -1.;dd= -715882497
.word 0152524,0025253, 21847., cpn000, -32768., -21845.;dd= -715904341
.word 0152524,0025252, 21847., cpn000, -32768., -21846.;dd= -715904342
.word 0152524,0025251, 21847., cpn0v0, -10924., 10921.;dd= -715904343
.word 0152524,0025250, 21847., cpn0v0, -10924., 10920.;dd= -715904344
; test q=077777 boundary cases (q = max pos value)
; case dd>0, dr>0 -- factor 21846
.word 0025252,0125252, 21846., cp0000, 32767., 0.;dd= 715827882
.word 0025252,0125253, 21846., cp0000, 32767., 1.;dd= 715827883
.word 0025252,0177776, 21846., cp0000, 32767., 21844.;dd= 715849726
.word 0025252,0177777, 21846., cp0000, 32767., 21845.;dd= 715849727
.word 0025253,0000000, 21846., cp00v0, 10923., 0.;dd= 715849728
.word 0025253,0000001, 21846., cp00v0, 10923., 1.;dd= 715849729
; case dd<0, dr<0 -- factor 21846
.word 0152525,0052526, -21846., cp0000, 32767., 0.;dd= -715827882
.word 0152525,0052525, -21846., cp0000, 32767., -1.;dd= -715827883
.word 0152525,0000002, -21846., cp0000, 32767., -21844.;dd= -715849726
.word 0152525,0000001, -21846., cp0000, 32767., -21845.;dd= -715849727
.word 0152525,0000000, -21846., cp00v0, -10923., 0.;dd= -715849728
.word 0152524,0177777, -21846., cp00v0, -10924., -1.;dd= -715849729
; case dd>0, dr>0 -- factor 21847
.word 0025253,0025251, 21847., cp0000, 32767., 0.;dd= 715860649
.word 0025253,0025252, 21847., cp0000, 32767., 1.;dd= 715860650
.word 0025253,0077776, 21847., cp0000, 32767., 21845.;dd= 715882494
.word 0025253,0077777, 21847., cp0000, 32767., 21846.;dd= 715882495
.word 0025253,0100000, 21847., cp00v0, 10923., -32768.;dd= 715882496
.word 0025253,0100001, 21847., cp00v0, 10923., -32767.;dd= 715882497
; case dd<0, dr<0 -- factor 21847
.word 0152524,0152527, -21847., cp0000, 32767., 0.;dd= -715860649
.word 0152524,0152526, -21847., cp0000, 32767., -1.;dd= -715860650
.word 0152524,0100002, -21847., cp0000, 32767., -21845.;dd= -715882494
.word 0152524,0100001, -21847., cp0000, 32767., -21846.;dd= -715882495
.word 0152524,0100001, -21847., cp0000, 32767., -21846.;dd= -715882495
.word 0152524,0100000, -21847., cp00v0, -10924., -32768.;dd= -715882496
; test dr=100000 boundary cases (dr = max neg value)
; case dd<0, q>0
.word 0177777,0100000, -32768., cp0000, 1., 0.;dd= -32768
.word 0177777,0077777, -32768., cp0000, 1., -1.;dd= -32769
.word 0177777,0000001, -32768., cp0000, 1., -32767.;dd= -65535
.word 0177777,0000000, -32768., cp0000, 2., 0.;dd= -65536
.word 0177776,0177777, -32768., cp0000, 2., -1.;dd= -65537
.word 0177776,0100001, -32768., cp0000, 2., -32767.;dd= -98303
.word 0177776,0100000, -32768., cp0000, 3., 0.;dd= -98304
.word 0177776,0077777, -32768., cp0000, 3., -1.;dd= -98305
.word 0177776,0000001, -32768., cp0000, 3., -32767.;dd= -131071
.word 0177776,0000000, -32768., cp0000, 4., 0.;dd= -131072
.word 0177775,0177777, -32768., cp0000, 4., -1.;dd= -131073
.word 0177775,0100001, -32768., cp0000, 4., -32767.;dd= -163839
.word 0177775,0000000, -32768., cp0000, 6., 0.;dd= -196608
.word 0140003,0000000, -32768., cp0000, 32762., 0.;dd=-1073545216
.word 0140002,0000000, -32768., cp0000, 32764., 0.;dd=-1073610752
.word 0140001,0100000, -32768., cp0000, 32765., 0.;dd=-1073643520
.word 0140001,0000000, -32768., cp0000, 32766., 0.;dd=-1073676288
.word 0140000,0177777, -32768., cp0000, 32766., -1.;dd=-1073676289
.word 0140000,0100001, -32768., cp0000, 32766., -32767.;dd=-1073709055
.word 0140000,0100000, -32768., cp0000, 32767., 0.;dd=-1073709056
.word 0140000,0077777, -32768., cp0000, 32767., -1.;dd=-1073709057
.word 0140000,0000001, -32768., cp0000, 32767., -32767.;dd=-1073741823
; case dd>0, q<0
.word 0000000,0100000, -32768., cpn000, -1., 0.;dd= 32768
.word 0000000,0100001, -32768., cpn000, -1., 1.;dd= 32769
.word 0000000,0177777, -32768., cpn000, -1., 32767.;dd= 65535
.word 0000001,0000000, -32768., cpn000, -2., 0.;dd= 65536
.word 0000001,0000001, -32768., cpn000, -2., 1.;dd= 65537
.word 0000001,0077777, -32768., cpn000, -2., 32767.;dd= 98303
.word 0037777,0100000, -32768., cpn000, -32767., 0.;dd= 1073709056
.word 0037777,0100001, -32768., cpn000, -32767., 1.;dd= 1073709057
.word 0037777,0177777, -32768., cpn000, -32767., 32767.;dd= 1073741823
.word 0040000,0000000, -32768., cpn000, -32768., 0.;dd= 1073741824
.word 0040000,0000001, -32768., cpn000, -32768., 1.;dd= 1073741825
.word 0040000,0077777, -32768., cpn000, -32768., 32767.;dd= 1073774591
; test dr=077777 boundary cases (dr = max pos value)
; case dd>0, q>0
.word 0000000,0077777, 32767., cp0000, 1., 0.;dd= 32767
.word 0000000,0100000, 32767., cp0000, 1., 1.;dd= 32768
.word 0000000,0177775, 32767., cp0000, 1., 32766.;dd= 65533
.word 0000000,0177776, 32767., cp0000, 2., 0.;dd= 65534
.word 0000000,0177777, 32767., cp0000, 2., 1.;dd= 65535
.word 0000001,0077774, 32767., cp0000, 2., 32766.;dd= 98300
.word 0037776,0100002, 32767., cp0000, 32766., 0.;dd= 1073643522
.word 0037776,0100003, 32767., cp0000, 32766., 1.;dd= 1073643523
.word 0037777,0000000, 32767., cp0000, 32766., 32766.;dd= 1073676288
.word 0037777,0000001, 32767., cp0000, 32767., 0.;dd= 1073676289
.word 0037777,0000002, 32767., cp0000, 32767., 1.;dd= 1073676290
.word 0037777,0077777, 32767., cp0000, 32767., 32766.;dd= 1073709055
; case dd<0, q<0
.word 0177777,0100001, 32767., cpn000, -1., 0.;dd= -32767
.word 0177777,0100000, 32767., cpn000, -1., -1.;dd= -32768
.word 0177777,0000003, 32767., cpn000, -1., -32766.;dd= -65533
.word 0177777,0000002, 32767., cpn000, -2., 0.;dd= -65534
.word 0177777,0000001, 32767., cpn000, -2., -1.;dd= -65535
.word 0177776,0100004, 32767., cpn000, -2., -32766.;dd= -98300
.word 0140000,0177777, 32767., cpn000, -32767., 0.;dd=-1073676289
.word 0140000,0177776, 32767., cpn000, -32767., -1.;dd=-1073676290
.word 0140000,0100001, 32767., cpn000, -32767., -32766.;dd=-1073709055
.word 0140000,0100000, 32767., cpn000, -32768., 0.;dd=-1073709056
.word 0140000,0077777, 32767., cpn000, -32768., -1.;dd=-1073709057
.word 0140000,0000002, 32767., cpn000, -32768., -32766.;dd=-1073741822
; test dd max cases
; case dd>0 dr<0 near nmax*nmax+nmax-1 = +1073774591
.word 0037777,0177777, -32768., cpn000, -32767., 32767.;dd= 1073741823
.word 0040000,0000000, -32768., cpn000, -32768., 0.;dd= 1073741824
.word 0040000,0000001, -32768., cpn000, -32768., 1.;dd= 1073741825
.word 0040000,0077776, -32768., cpn000, -32768., 32766.;dd= 1073774590
.word 0040000,0077777, -32768., cpn000, -32768., 32767.;dd= 1073774591
.word 0037777,0100000, -32768., cpn000, -32767., 0.;dd= 1073709056
.word 0037777,0100001, -32768., cpn000, -32767., 1.;dd= 1073709057
; case dd>0 dr>0 near pmax*pmax+pmax-1 = +1073709055
.word 0037777,0000000, 32767., cp0000, 32766., 32766.;dd= 1073676288
.word 0037777,0000001, 32767., cp0000, 32767., 0.;dd= 1073676289
.word 0037777,0000002, 32767., cp0000, 32767., 1.;dd= 1073676290
.word 0037777,0077776, 32767., cp0000, 32767., 32765.;dd= 1073709054
.word 0037777,0077777, 32767., cp0000, 32767., 32766.;dd= 1073709055
.word 0037777,0100000, 32767., cp00v0, 16383., -32768.;dd= 1073709056
.word 0037776,0100001, 32767., cp0000, 32765., 32766.;dd= 1073643521
; case dd<0 dr>0 near nmax*pmax+pmax-1 = -1073741822
.word 0140000,0100001, 32767., cpn000, -32767., -32766.;dd=-1073709055
.word 0140000,0100000, 32767., cpn000, -32768., 0.;dd=-1073709056
.word 0140000,0077777, 32767., cpn000, -32768., -1.;dd=-1073709057
.word 0140000,0000003, 32767., cpn000, -32768., -32765.;dd=-1073741821
.word 0140000,0000002, 32767., cpn000, -32768., -32766.;dd=-1073741822
.word 0140000,0000001, 32767., cpn0v0, -16384., 1.;dd=-1073741823
.word 0140000,0000000, 32767., cpn0v0, -16384., 0.;dd=-1073741824
; case dd<0 dr<0 near pmax*nmax+nmax-1 = -1073741823
.word 0140000,0100001, -32768., cp0000, 32766., -32767.;dd=-1073709055
.word 0140000,0100000, -32768., cp0000, 32767., 0.;dd=-1073709056
.word 0140000,0077777, -32768., cp0000, 32767., -1.;dd=-1073709057
.word 0140000,0000002, -32768., cp0000, 32767., -32766.;dd=-1073741822
.word 0140000,0000001, -32768., cp0000, 32767., -32767.;dd=-1073741823
.word 0140000,0000000, -32768., cp00v0, -16384., 0.;dd=-1073741824
.word 0137777,0177777, -32768., cp00v0, -16385., -1.;dd=-1073741825
;
1011$:
9999$: iot ; end of test A1.2
;
; Section C: ash =============================================================
; This section verifies
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
; 0 111 010 rrr sss sss NZVC ASH
;
; Test C1.1 -- ash +++++++++++++++++++++++++++++++++++++++++++++++++++
;
tc0101: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
mov #cp.psw,r3 ; setup psw pointer
100$: mov (r4)+,r0 ; load src
ash (r4)+,r0 ; ash
cmp (r4)+,(r3) ; check psw
beq .+4
halt
cmp (r4)+,r0 ; check
beq .+4
halt
cmp r4,r5
blo 100$
jmp 9999$
;
200$: .word 0
;
; src, shift, psw, res ;
1000$: .word 000000, 0., cp0z00, 000000
.word 000200, 0., cp0000, 000200
.word 000200, 1., cp0000, 000400
.word 000200, 7., cp0000, 040000
.word 000200, 8., cpn0v0, 100000 ; sign!
.word 000200, 9., cp0zvc, 000000 ; sign!, C=1
.word 000200, 10., cp0zv0, 000000 ; sign!
.word 000200, 31., cp0zv0, 000000 ; sign!; max pos count
.word 000200, 32., cp0z00, 000000 ; !! 0040 --> like -32.
.word 000200, 60., cp0000, 000010 ; !! 0074 --> like -4.
.word 000200, 65., cp0000, 000400 ; !! 0101 --> like 1.
.word 000200, -1., cp0000, 000100
.word 000200, -7., cp0000, 000001
.word 000200, -8., cp0z0c, 000000 ; C=1
.word 000200, -9., cp0z00, 000000
.word 000200, -31., cp0z00, 000000
.word 000200, -32., cp0z00, 000000 ; max neg count
.word 000200, -33., cp0zv0, 000000 ; !! 0737 --> like 31.
.word 000200, -60., cp0000, 004000 ; !! 0704 --> like 4.
.word 000200, -65., cp0000, 000100 ; !! 0677 --> like -1.
.word 000200, 000077, cp0000, 000100 ; -1. only 6 bits
.word 000200, 000071, cp0000, 000001 ; -7. only 6 bits
.word 000200, 000070, cp0z0c, 000000 ; -8. only 6 bits
.word 100200, 0., cpn000, 100200
.word 100200, 1., cp00vc, 000400 ; sign change, C=1
.word 100200, 7., cp00v0, 040000 ; sign change
.word 100200, 8., cpn0v0, 100000 ; sign change
.word 100200, 9., cp0zvc, 000000 ; sign change, C=1
.word 100200, -1., cpn000, 140100
.word 100200, -7., cpn000, 177401
.word 100200, -8., cpn00c, 177600 ; C=1
.word 100200, -9., cpn000, 177700
.word 100200, -15., cpn000, 177777
.word 100200, -16., cpn00c, 177777 ; C=1
.word 100200, -17., cpn00c, 177777 ; C=1
1010$:
;
9999$: iot ; end of test C1.1
;
; Section D: ashc ============================================================
; This section verifies
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
; 0 111 011 rrr sss sss NZVC ASHC
;
; Test D1.1 -- ashc even register +++++++++++++++++++++++++++++++++++
;
td0101: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
mov #cp.psw,r3 ; setup psw pointer
100$: mov (r4)+,r0 ; load src_h
mov (r4)+,r1 ; load src_l
ashc (r4)+,r0 ; ashc
cmp (r4)+,(r3) ; check psw
beq .+4
halt
cmp (r4)+,r0 ; check res_h
beq .+4
halt
cmp (r4)+,r1 ; check res_l
beq .+4
halt
cmp r4,r5
blo 100$
jmp 9999$
;
; src_h, src_h, shift, psw, res_h, res_l ;
1000$: .word 000000, 000000, 0., cp0z00, 000000, 000000
.word 000020, 000200, 0., cp0000, 000020, 000200
.word 000020, 000200, 1., cp0000, 000040, 000400
.word 000020, 000200, 8., cp0000, 010000, 100000
.word 000020, 000200, 9., cp0000, 020001, 000000
.word 000020, 000200, 10., cp0000, 040002, 000000
.word 000020, 000200, 11., cpn0v0, 100004, 000000 ; sign!
.word 000020, 000200, 12., cp00vc, 000010, 000000 ; sign! C=1
.word 000020, 000200, 13., cp00v0, 000020, 000000 ; sign!
.word 000020, 000200, 23., cp00v0, 040000, 000000 ; sign!
.word 000020, 000200, 24., cpn0v0, 100000, 000000 ; sign!
.word 000020, 000200, 25., cp0zvc, 000000, 000000 ; sign! C=1
.word 000020, 000200, 26., cp0zv0, 000000, 000000 ; sign!
.word 000020, 000200, 31., cp0zv0, 000000, 000000 ; sign! max pos
.word 000020, 000200, 32., cp0z00, 000000, 000000 ; 0040 like -32.
.word 000020, 000200, 60., cp0000, 000001, 000010 ; 0074 like -4.
.word 000020, 000200, 65., cp0000, 000040, 000400 ; 0101 like 1.
.word 000020, 000200, -1., cp0000, 000010, 000100
.word 000020, 000200, -4., cp0000, 000001, 000010
.word 000020, 000200, -5., cp0000, 000000, 100004
.word 000020, 000200, -7., cp0000, 000000, 020001
.word 000020, 000200, -8., cp000c, 000000, 010000 ; C=1
.word 000020, 000200, -9., cp0000, 000000, 004000
.word 000020, 000200, -20., cp0000, 000000, 000001
.word 000020, 000200, -21., cp0z0c, 000000, 000000 ; C=1
.word 000020, 000200, -22., cp0z00, 000000, 000000
.word 000020, 000200, -32., cp0z00, 000000, 000000 ; max neg
.word 000020, 000200, -33., cp0zv0, 000000, 000000 ; 0737 like 31.
.word 000020, 000200, -60., cp0000, 000400, 004000 ; 0704 like 4.
.word 000020, 000200, -65., cp0000, 000010, 000100 ; 0677 like -1.
.word 100020, 000200, 0., cpn000, 100020, 000200
.word 100020, 000200, 1., cp00vc, 000040, 000400 ; sign! C=1
.word 100020, 000200, 10., cp00v0, 040002, 000000 ; sign!
.word 100020, 000200, 11., cpn0v0, 100004, 000000 ; sign!
.word 100020, 000200, 12., cp00vc, 000010, 000000 ; sign! C=1
.word 100020, 000200, 13., cp00v0, 000020, 000000 ; sign!
.word 100020, 000200, -1., cpn000, 140010, 000100
.word 100020, 000200, -4., cpn000, 174001, 000010
.word 100020, 000200, -5., cpn000, 176000, 100004
.word 100020, 000200, -7., cpn000, 177400, 020001
.word 100020, 000200, -8., cpn00c, 177600, 010000 ; C=1
.word 100020, 000200, -9., cpn000, 177700, 004000
.word 100020, 000200, -15., cpn000, 177777, 000040
.word 100020, 000200, -16., cpn000, 177777, 100020
.word 100020, 000200, -20., cpn000, 177777, 174001
.word 100020, 000200, -21., cpn00c, 177777, 176000 ; C=1
.word 100020, 000200, -22., cpn000, 177777, 177000
.word 100020, 000200, -30., cpn000, 177777, 177776
.word 100020, 000200, -31., cpn000, 177777, 177777
.word 100020, 000200, -32., cpn00c, 177777, 177777 ; C=1
1010$:
;
9999$: iot ; end of test D1.1
;
; Test D1.2 -- ashc odd register ++++++++++++++++++++++++++++++++++++
; Note: ashc has very non-obvious cc semantics because the non visible
; upper half plays a role. see 'h:' in data below
;
td0102: mov #1000$,r4 ; setup data pointer
mov #1010$,r5 ; setup end pointer
mov #cp.psw,r3 ; setup psw pointer
clr r0 ; for tmu optics
100$: mov (r4)+,r1 ; load src
ashc (r4)+,r1 ; ashc
cmp (r4)+,(r3) ; check psw
beq .+4
halt
cmp (r4)+,r1 ; check res
beq .+4
halt
cmp r4,r5
blo 100$
jmp 9999$
;
; src, shift, psw, res ;
1000$: .word 000000, 0., cp0z00, 000000 ; h: 000000
.word 002010, 0., cp0000, 002010 ; h: 002010
.word 002010, 1., cp0000, 004020 ; h: 004020
.word 002010, 4., cp0000, 040200 ; h: 040200
.word 002010, 5., cpn0v0, 100400 ; sign! h: 100400
.word 002010, 6., cp00vc, 001000 ; sign! C=1 h: 001001
.word 002010, 7., cp00v0, 002000 ; sign! h: 002002
.word 002010, 11., cp00v0, 040000 ; sign! h: 040004
.word 002010, 12., cpn0v0, 100000 ; sign! h: 100100
.word 002010, 13., cp00vc, 000000 ; sign! C=1 Z=0! h: 000201
.word 002010, 14., cp00v0, 000000 ; sign! Z=0! h: 000402
.word 002010, 20., cp00v0, 000000 ; sign! Z=0! h: 040200
.word 002010, 21., cpn0v0, 000000 ; sign! N=1! Z=0! h: 100400
.word 002010, 22., cp00vc, 000000 ; sign! C=1! Z=0! h: 001000
.word 002010, 23., cp00v0, 000000 ; sign! Z=0! h: 002000
.word 002010, 27., cp00v0, 000000 ; sign! Z=0! h: 040000
.word 002010, 28., cpn0v0, 000000 ; sign! N=1! Z=0! h: 100000
.word 002010, 29., cp0zvc, 000000 ; sign! h: 000000
.word 002010, 30., cp0zv0, 000000 ; sign! h: 000000
.word 002010, -1., cp0000, 001004 ; h: 001004
.word 002010, -3., cp0000, 000201 ; h: 000201
.word 002010, -4., cp000c, 100100 ; C=1 N=0! h: 000100
.word 002010, -5., cp0000, 040040 ; h: 000040
.word 002010, -10., cp0000, 001001 ; h: 000001
.word 002010, -11., cp000c, 100400 ; C=1 N=0! h: 000000
.word 002010, -12., cp0000, 040200 ; h: 000000
.word 002010, -15., cp0000, 004020 ; h: 000000
.word 002010, -16., cp0000, 002010 ; h: 000000
.word 002010, -19., cp0000, 000201 ; h: 000000
.word 002010, -20., cp000c, 000100 ; C=1 !no rol! h: 000000
.word 002010, -21., cp0000, 000040 ; h: 000000
.word 002010, -26., cp0000, 000001 ; h: 000000
.word 002010, -27., cp0z0c, 000000 ; C=1 Z=1 h: 000000
.word 002010, -28., cp0z00, 000000 ; Z=1 h: 000000
.word 102010, 0., cpn000, 102010 ; h: 102010
.word 102010, -1., cpn000, 041004 ; N=1! h: 141004
.word 102010, -3., cpn000, 010201 ; N=1! h: 170201
.word 102010, -4., cpn00c, 104100 ; C=1 N=1! h: 174100
.word 102010, -5., cpn000, 042040 ; N=1! h: 176040
.word 102010, -10., cpn000, 001041 ; N=1! h: 177741
.word 102010, -11., cpn00c, 100420 ; C=1 N=1! h: 177760
.word 102010, -12., cpn000, 040210 ; N=1! h: 177770
.word 102010, -15., cpn000, 004021 ; N=1! h: 177777
.word 102010, -16., cpn00c, 102010 ; C=1 h: 177777
.word 102010, -17., cpn000, 141004 ; h: 177777
.word 102010, -19., cpn000, 170201 ; h: 177777
.word 102010, -20., cpn00c, 174100 ; C=1 h: 177777
.word 102010, -21., cpn000, 176040 ; h: 177777
.word 102010, -26., cpn000, 177741 ; h: 177777
.word 102010, -27., cpn00c, 177760 ; C=1 h: 177777
.word 102010, -28., cpn000, 177770 ; h: 177777
.word 102010, -31., cpn000, 177777 ; h: 177777
1010$:
;
9999$: iot ; end of test D1.2
;
; END OF ALL TESTS - loop closure ============================================
;
mov tstno,r0 ; hack, for easy monitoring ...
cmp tstno,#5. ; all tests done ?
beq .+4
halt
;
jmp loop