1.1 KiB
Known differences between w11a and KB11-C (11/70)
PC is incremented before an instruction fetch abort
The 11/70 starts an instruction fetch in FET.00 and increments the PC
in FET.10 when the fetch succeeded. The PC is therefore unchanged in
case of a fetch abort and points to the location of the failed opcode
fetch.
The w11 increments the PC in the states that start an instruction fetch.
The PC is therefore incremented in case of a fetch abort and points to
the location after the failed opcode fetch.
This is not relevant to normal operation and is therefore considered an
acceptable implementation difference. An instruction re-execution after
an MMU abort relies always on MMR2. Only error messages that give a "PC at
abort" might differ.
SimH implements the 11/70 behavior, the PC is incremented after the
successful load of the instruction register.
However, test and verification codes might be sensitive to this behavior.
A tcode verifies this saved PS and
distinguished between w11 and SimH
(see cpu_mmu tests B4.1).