535 lines
17 KiB
C
535 lines
17 KiB
C
/*
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* @(#) dbrivar.h 1.1@(#) Copyright (c) 1991-92 Sun Microsystems, Inc.
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*/
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#ifndef _sbusdev_dbrivar_h
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#define _sbusdev_dbrivar_h
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/*
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* This file describes the ATT T5900FC (DBRI) ISDN chip and declares
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* parameters and data structures used by the audio driver.
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*/
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#ifdef KERNEL
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#if !defined(DBRI_NOSETPORT)
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#define DBRI_NOSETPORT /* Make this the default for now */
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#endif
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/*
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* This is the size of the STREAMS buffers for receive.
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*
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* XXX - For now, this is set to 1K so that reader processes like
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* soundtool that require some real-time response to input don't have to
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* wait for larger buffers to fill up. Eventually, there should be an
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* ioctl that tells the driver to send all available data upstream. In
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* this way, the buffering for 'normal' processes can be increased
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* without sacrificing the performance of real-time display processes.
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*/
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#define DBRI_RECV_BSIZE (1024) /* Receive buffer size */
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/* N.B. High and low water marks must fit into unsigned shorts */
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/* XXX - 4.x water mark bugs need to be considered if these change */
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#define DBRI_HIWATER (57000)
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#define DBRI_LOWATER (32000)
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#define DBRI_CMDPOOL (20) /* command block buffer pool */
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#define DBRI_RECBUFS (16) /* # of record command blocks */
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#define DBRI_DEFAULT_GAIN (128) /* gain initialization */
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/*
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* Device minor numbers, the clone device becomes either DBRI_AUDIO_RW or
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* DBRI_AUDIO_RO depending on the open flags. DBRI_AUDIOCTL has been
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* changed from 0x80 to allow more minor devices to be added without
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* kludges. This breaks compatibility with the previous audio.c.
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*
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* Note: When new channel types are added to dbri_conf.c they must also
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* be added here as a new minor device. A device special file also needs
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* to be made in the /dev directory. The minor device number in the
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* /dev/directory must be the number below << 2 as the unit number is
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* encoded in the bottom two bits.
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*/
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typedef enum {
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DBRI_MINOR_NODEV = 0,
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DBRI_MINOR_AUDIO_RW = 1,
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DBRI_MINOR_AUDIO_RO = 2,
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DBRI_MINOR_AUDIOCTL = 3,
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DBRI_MINOR_TE_B1_RW = 4,
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DBRI_MINOR_TE_B1_RO = 5,
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DBRI_MINOR_TE_B2_RW = 6,
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DBRI_MINOR_TE_B2_RO = 7,
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DBRI_MINOR_TE_D = 8,
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DBRI_MINOR_TEMGT = 9,
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DBRI_MINOR_NT_B1_RW = 10,
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DBRI_MINOR_NT_B1_RO = 11,
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DBRI_MINOR_NT_B2_RW = 12,
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DBRI_MINOR_NT_B2_RO = 13,
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DBRI_MINOR_NT_D = 14,
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DBRI_MINOR_NTMGT = 15,
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DBRI_MINOR_DBRIMGT = 16,
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DBRI_MINOR_TE_B1_56_RW = 17,
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DBRI_MINOR_TE_B1_56_RO = 18,
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DBRI_MINOR_TE_B1_TR_RW = 19,
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DBRI_MINOR_TE_B1_TR_RO = 20,
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DBRI_MINOR_NT_B1_56_RW = 21,
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DBRI_MINOR_NT_B1_56_RO = 22,
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DBRI_MINOR_NT_B1_TR_RW = 23,
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DBRI_MINOR_NT_B1_TR_RO = 24,
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DBRI_MINOR_TE_B2_56_RW = 25,
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DBRI_MINOR_TE_B2_56_RO = 26,
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DBRI_MINOR_TE_B2_TR_RW = 27,
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DBRI_MINOR_TE_B2_TR_RO = 28,
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DBRI_MINOR_NT_B2_56_RW = 29,
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DBRI_MINOR_NT_B2_56_RO = 30,
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DBRI_MINOR_NT_B2_TR_RW = 31,
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DBRI_MINOR_NT_B2_TR_RO = 32,
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DBRI_MINOR_TE_H_RW = 33,
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DBRI_MINOR_TE_H_RO = 34,
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DBRI_MINOR_NT_H_RW = 35,
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DBRI_MINOR_NT_H_RO = 36,
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} dbri_minor_t;
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/*
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* Note that the unit number is encoded into the upper 2 bits of the minor
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* device number. The lower order bits specify the type of channel.
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*/
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#define MAXDBRI 4 /* max # of DBRI's */
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#define MINORDEV(dev) (minor(dev) & 0x3f) /* get minor dev */
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#define MINORUNIT(dev) (minor(dev) >> 6) /* get minor unit # */
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#define dbrimakedev(maj, unit, min) \
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makedev((maj), (((unit) << 6) | ((min) & 0x3f))) /* make a new dev_t */
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/* DBRI channels */
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typedef enum {
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DBRI_NO_CHNL = -2,
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DBRI_HOST_CHNL = -1,
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/* TE channel defines */
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DBRI_TE_D_OUT = 0,
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DBRI_TE_D_IN,
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DBRI_TE_B1_OUT,
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DBRI_TE_B1_IN,
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DBRI_TE_B2_OUT,
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DBRI_TE_B2_IN,
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DBRI_TE_H_OUT,
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DBRI_TE_H_IN,
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DBRI_TE_B1_56_OUT,
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DBRI_TE_B1_56_IN,
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DBRI_TE_B2_56_OUT,
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DBRI_TE_B2_56_IN,
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DBRI_TE_B1_TR_OUT,
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DBRI_TE_B1_TR_IN,
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DBRI_TE_B2_TR_OUT,
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DBRI_TE_B2_TR_IN,
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/* NT channel defines */
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DBRI_NT_D_OUT,
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DBRI_NT_D_IN,
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DBRI_NT_B1_OUT,
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DBRI_NT_B1_IN,
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DBRI_NT_B2_OUT,
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DBRI_NT_B2_IN,
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DBRI_NT_H_OUT,
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DBRI_NT_H_IN,
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DBRI_NT_B1_56_OUT,
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DBRI_NT_B1_56_IN,
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DBRI_NT_B2_56_OUT,
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DBRI_NT_B2_56_IN,
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DBRI_NT_B1_TR_OUT,
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DBRI_NT_B1_TR_IN,
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DBRI_NT_B2_TR_OUT,
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DBRI_NT_B2_TR_IN,
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/* CHI channel defines */
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DBRI_AUDIO_OUT,
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DBRI_AUDIO_IN,
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/*
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* Not user visible channels. (?)
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* Used for data and control pipes dealing with device control.
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*/
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DBRI_AUDIOCTL, /* actually MMCODEC control */
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DBRI_TEMGT, /* generic ISDN control on TE */
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DBRI_NTMGT, /* generic ISDN control on NT */
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DBRI_DBRIMGT, /* DBRI specific control */
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DBRI_LAST_CHNL
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/* DO NOT PUT ANY ENTRIES AFTER THIS LAST DUMMY ENTRY */
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} dbri_chnl_t;
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#define DBRI_NSTREAM ((int)DBRI_LAST_CHNL) /* # of channels available */
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/*
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* This will be increased later
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* by an offset
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*/
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/*
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* Data mode to be used by the pipe. Note that this does not apply to
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* fixed pipes.
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*/
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typedef enum {
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DBRI_MODE_UNKNOWN = -1, /* mode predefined by def */
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DBRI_MODE_XPRNT = DBRI_SDP_TRANSPARENT, /* Transparent mode */
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DBRI_MODE_HDLC = DBRI_SDP_HDLC, /* HDLC mode */
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DBRI_MODE_HDLC_D = DBRI_SDP_TE_DCHNL, /* HDLC-D mode */
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DBRI_MODE_SER = DBRI_SDP_SERIAL, /* Serial to serial */
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DBRI_MODE_FIXED = DBRI_SDP_FIXED /* Fixed mode */
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} dbri_mode_t;
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typedef struct dbri_conn_req {
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dbri_chnl_t xchan; /* transmit channel type */
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dbri_chnl_t rchan; /* receive channel type */
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dbri_mode_t mode; /* SDP command mode */
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} dbri_conn_req_t;
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typedef struct dbri_port_tab {
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isdn_port_t port; /* isdn port */
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dbri_chnl_t xchan; /* dbri transmit port */
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dbri_chnl_t rchan; /* dbri receive port */
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} dbri_port_tab_t;
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typedef struct dbri_chan_tab {
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dbri_chnl_t chan; /* dbri channel */
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isdn_port_t port; /* port associated w/chan */
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unsigned int bpipe; /* base pipe of channel */
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unsigned int cycle; /* bit offset of time slot */
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unsigned int len; /* bit length of time slot */
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int dir; /* direction of this channel */
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dbri_mode_t mode; /* pipe mode - default HDLC */
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int samplerate; /* sample frames per second */
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int channels; /* channels per sample frame */
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dbri_chnl_t in_as; /* input data stream */
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dbri_chnl_t out_as; /* output data stream */
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dbri_chnl_t control_as; /* control data stream */
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aud_streamtype_t audtype; /* audio type of stream */
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dbri_minor_t minordev; /* dev minor #...well almost */
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isdn_interface_t isdntype; /* ISDN type of stream */
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int numbufs; /* Number of descriptors */
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char *name; /* Name string for printfs */
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int input_size; /* Default record buffer size */
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} dbri_chan_tab_t;
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#define DBRI_MAX_CMDS (512) /* max cmds in Q */
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#define DBRI_MAX_CMDSIZE (3) /* max # of words in a cmd */
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/*
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* Limit to ensure we can insert a JMP back to the head of list. Note
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* that the JMP cmd is two words long.
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*/
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#define DBRI_END_CMDLIST (DBRI_MAX_CMDS - DBRI_MAX_CMDSIZE - 2 - 1)
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/* DBRI internal command queue structure */
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typedef struct dbri_chip_cmdq {
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unsigned int cmd[DBRI_MAX_CMDS]; /* space for command list */
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unsigned int cmdhp; /* next command to add to list */
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} dbri_chip_cmdq_t;
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typedef struct {
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unsigned int berr; /* detectible bit errors */
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unsigned int ferr; /* frame sync errors */
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} primitives_t;
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/* Status for TE, NT, and CHI channels */
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typedef struct serial_status {
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unsigned int te_cmd; /* TE command */
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struct dbri_code_sbri te_sbri; /* SBRI intr te status */
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primitives_t te_primitives; /* primtvs. for TE */
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unsigned int nt_cmd; /* NT command */
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struct dbri_code_sbri nt_sbri; /* SBRI intr nt status */
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primitives_t nt_primitives; /* primtvs. for NT */
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unsigned int chi_cmd; /* CHI command */
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unsigned int chi_cdeccmd; /* CDEC command */
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unsigned int chi_cdm; /* CDM command */
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unsigned int chi_dd_val; /* CHI Dummy Data value */
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unsigned int chi_flags; /* state info */
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unsigned int chi_state; /* current CHI state */
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unsigned int chi_nofs; /* number of nofs interrupts */
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int ibeg; /* # times IBEG intr */
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int iend; /* # times IEND intr */
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int cmdi; /* cmdi intr timer */
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int pal_present; /* TRUE if present */
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int mmcodec_ts_start; /* cycle of CODEC */
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} serial_status_t;
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/* Possible CHI state flags */
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#define CHI_FLAG_CODEC_RPTD 0x01
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#define CHI_FLAG_HAVE_PAL 0x02
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#define CHI_FLAG_OPEN_SLEEP 0x04
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#define CHI_FLAG_SER_STS 0x08
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/* Possible CHI Bus states */
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#define CHI_NO_STATE 0
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#define CHI_NO_DEVICES 1
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#define CHI_IN_DATA_MODE 2
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#define CHI_IN_CTRL_MODE 3
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#define CHI_WAIT_DCB_LOW 4
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#define CHI_WAIT_DCB_HIGH 5
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#define CHI_GOING_TO_DATA_MODE 6
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#define CHI_CODEC_CALIBRATION 7
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#define CHI_GOING_TO_CTRL_MODE 8
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#define CHI_POWERED_DOWN 9
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/* frame lengths */
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#define CHI_DATA_MODE_LEN 128
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#define CHI_CTRL_MODE_LEN 256
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typedef enum { DBRI_NO_TAG, DBRI_MM1_CTRL1W, DBRI_MM1_CTRL2W,
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DBRI_MM1_CTRL1R, DBRI_MM1_CTRL2R,
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DBRI_MM1_CTRL3R, DBRI_MM1_CTRL4R,
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DBRI_MM1_DATA, DBRI_MM2_CTRL1W,
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DBRI_MM2_CTRL2W, DBRI_MM2_CTRL1R,
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DBRI_MM2_CTRL2R, DBRI_MM2_CTRL3R,
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DBRI_MM2_CTRL4R, DBRI_MM2_DATA,
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DBRI_S_CHNL, DBRI_Q_CHNL, DBRI_NT_TE,
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DBRI_NT_CHI, DBRI_TE_NT, DBRI_TE_CHI,
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DBRI_CHI_NT, DBRI_CHI_TE
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} short_pipe_id_t;
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/* Status for 16 long pipes and 16 short pipes */
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typedef struct pipe_tab {
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aud_stream_t *as; /* stream assoc w/port */
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short_pipe_id_t pid; /* pipe id */
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unsigned int sdp; /* setup data pipe cmd */
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unsigned int ssp; /* set short pipe cmd */
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union dbri_dtscmd dts; /* define time slot cmd */
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union dbri_dtstsd in_tsd; /* input time slot desc */
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union dbri_dtstsd out_tsd; /* output time slot desc */
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int monflag; /*
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* monitor flag indicator. TRUE
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* means monitor pipe attached
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* to this base pipe.
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*/
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dbri_chnl_t xchan; /* transmit channel type */
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dbri_chnl_t rchan; /* receive channel type */
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} pipe_tab_t;
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typedef struct isdn_var {
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enum isdn_ph_param_maint maint; /* Maintenance mode */
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enum isdn_ph_param_asmb asmb; /* Act. State Machine Type */
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unsigned char message_type; /* 0 if signals, else M_PROTO */
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unsigned int norestart; /* XXX Enable for DBRI restart hack */
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unsigned int power; /* ISDN_PH_PARAM_POWER_OFF or ...ON */
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unsigned int enable; /* if (enable && power) enable intf */
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int t101; /* NT ASM */
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int t102; /* NT ASM */
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int t103; /* TE ASM */
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int t104; /* TE ASM */
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} isdn_var_t;
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/* Reserved pipes */
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#define DBRI_PIPE_TE_D_IN 0
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#define DBRI_PIPE_TE_D_OUT 1
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#define DBRI_PIPE_NT_D_OUT 2
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#define DBRI_PIPE_NT_D_IN 3
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#define DBRI_PIPE_LONGFREE 4 /* initial start of free list */
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#define DBRI_PIPE_CHI 16 /* base pipe for CHI */
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/*
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* These next few dedicated short pipes are needed as they contain s/w
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* status. They should never be used for any other purpose. If any
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* additional short pipes are needed for status insert them before the
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* define for the freelist and modify the start of the freelist.
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*/
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#define DBRI_PIPE_DM_T_5_8 17 /* Data Mode xmit TS's 5-8 */
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#define DBRI_PIPE_DM_R_5_6 18 /* Data Mode recv TS's 5-6 */
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#define DBRI_PIPE_DM_R_7_8 19 /* Data Mode recv TS's 7-8 */
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#define DBRI_PIPE_CM_T_1_4 20 /* Cntrl Mode xmit TS's 1-4 */
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#define DBRI_PIPE_CM_R_1_2 21 /* Cntrl Mode recv TS's 1-2 */
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#define DBRI_PIPE_CM_R_3_4 22 /* Cntrl Mode recv TS's 3-4 */
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#define DBRI_PIPE_SB_PAL_T 23 /* SBox ID PAL transmit */
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#define DBRI_PIPE_SB_PAL_R 24 /* SBox ID PAL receive */
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#define DBRI_PIPE_CM_R_7 25 /* To read MMCODEC Manu info */
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#define DBRI_PIPE_DUMMYDATA 26 /* to xmit dummy data */
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#define DBRI_PIPE_SHORTFREE 27 /* initial start of free list */
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#define DBRI_MAX_PIPES 32 /* total number of pipes */
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/* also used for invalid pipe */
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#define DBRI_BAD_PIPE DBRI_MAX_PIPES /* total number of pipes */
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/* DBRI pipe types */
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#define DBRI_LONGPIPE 0 /* Long pipe type */
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#define DBRI_SHORTPIPE 1 /* Short pipe type */
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#define ISPIPEINUSE(a) ((a)->dts.r.id == DBRI_DTS_ID)
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#define ISHWCONNECTED(as) (ISDATASTREAM(as) && \
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(AsToDs(as)->pipe != DBRI_BAD_PIPE))
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#define ISTEDCHANNEL(as) ((AsToDs(as)->pipe == DBRI_PIPE_TE_D_IN) || \
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(AsToDs(as)->pipe == DBRI_PIPE_TE_D_OUT))
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#define ISNTDCHANNEL(as) ((AsToDs(as)->pipe == DBRI_PIPE_NT_D_IN) || \
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(AsToDs(as)->pipe == DBRI_PIPE_NT_D_OUT))
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#define ISXMITDIRECTION(as) (((dbri_dev_t *) \
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(as)->v->devdata)->ptab[AsToDs(as)->pipe].sdp & DBRI_SDP_D)
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#define ISAUDIOCONNECTION(a) ((a == DBRI_AUDIO_OUT) || (a == DBRI_AUDIO_IN))
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#define DBRI_NO_IO 0x0 /* Not input or output */
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#define DBRI_IN 0x1 /* input direction */
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#define DBRI_OUT 0x2 /* output direction */
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#define DBRI_GOODCONN 1 /* good connection return val */
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#define DBRI_BADCONN 2 /* bad connection return value */
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/* Command list status and info within a specific stream */
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/*
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* Note that each message descriptor (tmd/rmd) MUST start on
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* a 16 byte alignment for DBRI V5 silicon. This is a h/w
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* requirement! An ASSERT has been added to the driver to
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* check for this
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*/
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#define DBRI_MD_ALIGN 16 /* md's must be 16 byte aligned */
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typedef struct dbri_cmd {
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aud_cmd_t cmd; /* generic driver's generic command */
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struct dbri_cmd *nextio; /* next IO command */
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caddr_t sb_addr; /* 4m only, but keep same size */
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union {
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dbri_tmd_t t; /* transmit message descriptor */
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dbri_rmd_t r; /* receive message descriptor */
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} md;
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} dbri_cmd_t;
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/* Stream specific status info within a particular controller */
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typedef struct dbri_stream {
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aud_stream_t as; /* HW independent state */
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dbri_cmd_t *cmdptr; /* cmd chain list head */
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dbri_cmd_t *cmdlast; /* last IO command in list */
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unsigned int samples; /* number samples converted */
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unsigned int recv_eol; /* indicates receive hit EOL */
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unsigned int audio_uflow; /* audio over/under-flow */
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unsigned int last_flow_err; /* XXX DBRI[de] bug 3034 */
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unsigned int pipe; /* index into hardware pipe table */
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isdn_info_t i_info; /* ISDN state and error information */
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isdn_var_t i_var; /* driver's ISDN private variables */
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dbri_stat_t d_stats; /* DBRI Statistics */
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mblk_t *mp; /* current ioctl message pointer */
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} dbri_stream_t;
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#define AsToDs(as) ((dbri_stream_t *)(void *)(as))
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#define DsToAs(as) ((aud_stream_t *)(void *)(as))
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#define DBRI_NUM_INTQS 10 /* number of interrupt queues */
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typedef struct dbri_intr_struct {
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dbri_intq_t *intq_bp; /* interrupt queue base ptr */
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dbri_intq_t *curqp; /* intr qptr to current qstruct */
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int off; /* offset into qstruct */
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} dbri_intr_struct_t;
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/* Controller specific status and info on a per controller basis */
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typedef struct dbri_dev {
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aud_state_t hwi_state; /* HW Independant chip State */
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int intrlevel; /* Unit-specific interrupt level */
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dbri_reg_t *chip; /* addr of device registers */
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dbri_intr_struct_t intq; /* base of entire intq struct */
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int openinhibit; /* FALSE if opens on device allowed */
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dbri_chip_cmdq_t *cmdqp; /* DBRI chip command qptr */
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caddr_t mem_base; /* base of kernel memory */
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int mem_size; /* to free memory on unload */
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caddr_t sb_addr; /* 4m only, but keep same size */
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int addr_offset; /* offset to add for DBRI address */
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pipe_tab_t ptab[DBRI_INT_MAX_CHNL]; /* pipe status table */
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serial_status_t ser_sts; /* serial status table */
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dbri_stream_t ioc[DBRI_NSTREAM]; /* Per stream info */
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struct dev_info *dbri_dev; /* ptr to dev vector info */
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int init_chip; /* TRUE if chip already init */
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int init_cmdq; /* TRUE if cmdq already init */
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unsigned int dbri_flags; /* State info */
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int keep_alive_running; /* Sanity ref cnt if NT|TE used */
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char dbri_version; /* DBRI Revision letter */
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/* XXX error counters per controller go here */
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} dbri_dev_t;
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#define DBRI_ADDR(d, a) ((caddr_t)a + d->addr_offset)
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#define KERN_ADDR(d, a) ((caddr_t)a - d->addr_offset)
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/* dbri routines */
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int dbri_open();
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void dbri_close();
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aud_return_t dbri_ioctl();
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void dbri_start();
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void dbri_stop();
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unsigned int dbri_setflag();
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aud_return_t dbri_setinfo();
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void dbri_queuecmd();
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void dbri_flushcmd();
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aud_stream_t * dbri_minortoas();
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int dbri_intr();
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|
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/* routines in dbri_subr.c */
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void dbri_initchip();
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int dbri_con_stream();
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int dbri_xcon_stream();
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void audio_ser_to_ser_config();
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int dbri_disconnect();
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int dbri_chnl_activated();
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unsigned int dbri_setup_chnl();
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void dbri_setup_sdp();
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void dbri_setup_ntte();
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int dbri_setup_dts();
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int dbri_find_oldnext();
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void dbri_remove_dts();
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unsigned int dbri_getpipe();
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|
unsigned int dbri_findshortpipe();
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|
void dbri_command();
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int dbri_check_req();
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int dbri_chnl_activated();
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int dbri_tsd_overlap();
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void dbri_te_timer();
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void dbri_nt_timer();
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|
void dbri_keep_alive();
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|
void dbri_panic();
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|
|
|
int audio_con_stream();
|
|
void audio_xcon_stream();
|
|
int mmcodec_getdev();
|
|
int mmcodec_check_audio_config();
|
|
void mmcodec_set_audio_config();
|
|
void audio_pause_record();
|
|
void audio_pause_play();
|
|
void audio_resume_record();
|
|
void audio_resume_play();
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|
|
|
|
|
/* routines in dbri_isr.c */
|
|
void dbri_sbri_intr();
|
|
void dbri_xmit_intr();
|
|
void dbri_recv_intr();
|
|
|
|
/* routines in audio.c */
|
|
void audio_sendsig();
|
|
|
|
extern int Dbri_debug;
|
|
extern int Dbri_panic;
|
|
extern int Ndbri;
|
|
extern int Default_T101_timer;
|
|
extern int Default_T102_timer;
|
|
extern int Default_T103_timer;
|
|
extern int Default_T104_timer;
|
|
extern enum isdn_ph_param_asmb Default_asmb;
|
|
extern int Default_power;
|
|
extern int Keepalive_timer;
|
|
extern int Nstreams;
|
|
extern dbri_dev_t *Dbri_devices;
|
|
extern dbri_chan_tab_t Chan_tab[];
|
|
extern dbri_port_tab_t Port_tab[];
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|
|
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#endif /* KERNEL */
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|
|
|
#endif /* !_sbusdev_dbrivar_h */
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