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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-19 17:27:59 +00:00

Make new Builds

This commit is contained in:
Gehstock 2020-01-08 14:49:01 +01:00
parent 751109e525
commit 006054a801
2 changed files with 4 additions and 4 deletions

View File

@ -217,10 +217,10 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(Defender_MiST)
# -------------------------
# -------------------------
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@ -112,7 +112,7 @@ always @(*) begin
end
end
assign LED = 1;
assign LED = ~ioctl_downl;
assign SDRAM_CLK = clk_sys;
assign SDRAM_CKE = 1;
@ -151,7 +151,7 @@ wire [7:0] ioctl_dout;
/*
ROM Structure:
0000-6FFF main cpu 44k (D000-FFFF + page 1,2,3,7)
0000-6FFF main cpu 28k (D000-FFFF + page 1,2,3,7)
7000-73FF decoder 1k
7400-7BFF snd cpu 2k
*/