mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-01-20 01:34:38 +00:00
last Sync on old Repo
This commit is contained in:
parent
2620dc9fc6
commit
0170939adb
@ -3,15 +3,3 @@ Tropica Angel by Dar (darfpga@aol.fr) (16/03/2019)
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Port to MiST
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TROPANG.ROM is required at the root of the SD-Card.
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Creating in Windows:
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copy /B zr1-0.m3 + zr1-5.l3 + zr1-6a.k3 + zr1-7.j3 TRAVERSE.ROM
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Creating in Linux:
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cat zr1-0.m3 zr1-5.l3 zr1-6a.k3 zr1-7.j3 > TRAVERSE.ROM
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Some ROM files contain different names, like:
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zippyrac.000
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zippyrac.005
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zippyrac.006
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zippyrac.007
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@ -1,6 +1,6 @@
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2014 Altera Corporation
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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@ -16,16 +16,16 @@
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
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# Date created = 21:22:13 June 04, 2019
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# Quartus II 64-Bit
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# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
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# Date created = 23:22:22 January 01, 2020
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# TropicalAngel_assignment_defaults.qdf
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# TropicalAngel_MiST_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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@ -35,11 +35,16 @@
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#
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# -------------------------------------------------------------------------- #
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# Project-Wide Assignments
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# ========================
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:22:13 JUNE 04, 2019"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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set_global_assignment -name SMART_RECOMPILE ON
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# Pin & Location Assignments
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# ==========================
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@ -114,62 +119,128 @@ set_location_assignment PIN_59 -to SDRAM_nCS
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set_location_assignment PIN_33 -to SDRAM_CKE
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set_location_assignment PIN_43 -to SDRAM_CLK
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set_global_assignment -name FAMILY "Cyclone III"
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set_global_assignment -name DEVICE EP3C25E144C8
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set_global_assignment -name TOP_LEVEL_ENTITY TropicalAngel_MiST
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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# Classic Timing Assignments
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# ==========================
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
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# Analysis & Synthesis Assignments
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# ================================
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set_global_assignment -name FAMILY "Cyclone III"
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set_global_assignment -name TOP_LEVEL_ENTITY TropicalAngel_MiST
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
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# Fitter Assignments
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# ==================
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set_global_assignment -name DEVICE EP3C25E144C8
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_NCE_PIN OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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# Assembler Assignments
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# =====================
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name GENERATE_RBF_FILE ON
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# Power Estimation Assignments
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# ============================
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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# Advanced I/O Timing Assignments
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# ===============================
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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set_global_assignment -name SMART_RECOMPILE ON
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set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name GENERATE_RBF_FILE ON
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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# --------------------------------
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# start ENTITY(TropicalAngel_MiST)
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# Pin & Location Assignments
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# ==========================
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
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# Fitter Assignments
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# ==================
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
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# start DESIGN_PARTITION(Top)
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# ---------------------------
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# Incremental Compilation Assignments
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# ===================================
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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# end DESIGN_PARTITION(Top)
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# -------------------------
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# end ENTITY(TropicalAngel_MiST)
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# ------------------------------
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/TropicalAngel_MiST.sv
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set_global_assignment -name VHDL_FILE rtl/TropicalAngel.vhd
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set_global_assignment -name VHDL_FILE rtl/moon_patrol_sound_board.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_rgb_lut.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_palette.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit6.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit5.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit4.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit3.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit2.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_spr_bit1.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_chr_palette_l.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_chr_palette_h.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_chr_bit3.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_chr_bit2.vhd
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set_global_assignment -name VHDL_FILE rtl/proms/tropical_chr_bit1.vhd
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set_global_assignment -name VHDL_FILE rtl/gen_ram.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_rgb_lut.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_palette.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit6.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit5.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit4.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit3.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit2.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_spr_bit1.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_chr_palette_l.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_chr_palette_h.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_chr_bit3.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_chr_bit2.vhd
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set_global_assignment -name VHDL_FILE rtl/Rom/tropical_chr_bit1.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu68.vhd
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set_global_assignment -name QIP_FILE rtl/pll_mist.qip
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/YM2149.sv
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
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set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
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set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
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set_global_assignment -name QIP_FILE ../../../common/CPU/T80/T80.qip
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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@ -79,8 +79,8 @@ set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [ge
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set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_SS2}]
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set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_SS3}]
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set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 6.4 [get_ports SDRAM_DQ[*]]
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set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min 3.2 [get_ports SDRAM_DQ[*]]
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set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -max 6.4 [get_ports SDRAM_DQ[*]]
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set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -min 3.2 [get_ports SDRAM_DQ[*]]
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#**************************************************************
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# Set Output Delay
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@ -92,10 +92,8 @@ set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_componen
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set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {LED}]
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set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {VGA_*}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.5 [get_ports {SDRAM_CLK}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min -0.8 [get_ports {SDRAM_CLK}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
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#**************************************************************
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# Set Clock Groups
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@ -107,7 +105,7 @@ set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks
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# Set False Path
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#**************************************************************
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set_false_path -to [get_ports {SDRAM_CLK}]
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#**************************************************************
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# Set Multicycle Path
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@ -50,10 +50,11 @@ module TropicalAngel_MiST(
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`include "rtl/build_id.v"
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localparam CONF_STR = {
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localparam CONF_STR = {
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"TROPANG;;",
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"O2,Rotate Controls,Off,On;",
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"O34,Scanlines,Off,25%,50%,75%;",
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"OA,Blending,Off,On;",
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"O5,Analog Accelarator,Off,On;",
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"O6,Stop Mode,Off,On;",
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"O7,Invulnerability,Off,On;",
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@ -63,7 +64,7 @@ localparam CONF_STR = {
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};
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assign LED = ~ioctl_downl;
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assign SDRAM_CLK = clk_sd;
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assign SDRAM_CLK = clk_sd;//sound problems on sys clock
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assign SDRAM_CKE = 1;
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wire clk_sys, clk_aud, clk_sd;
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@ -32,7 +32,7 @@ module Popeye_MiST(
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`include "rtl/build_id.v"
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localparam CONF_STR = {
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"POPEYE;;",
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"POPEYE;ROM;",
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// "O34,Scanlines,Off,25%,50%,75%;",
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"O5,Blend,Off,On;",
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// "O7,Service,Off,On;",//Beep on REV4 ROM, not needed
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