1
0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-20 17:47:33 +00:00

LodeRunner: clocking and video fix

This commit is contained in:
Gyorgy Szombathelyi 2020-03-01 01:53:56 +01:00
parent 150c7377fd
commit 1d98e4b642
7 changed files with 151 additions and 137 deletions

View File

@ -269,5 +269,4 @@ begin
sprite_ctl_o <= sprite_ctl_o_s;
end SYN;

View File

@ -40,7 +40,10 @@ localparam CONF_STR = {
"V,v1.0.",`BUILD_DATE
};
wire rotate = status[2];
wire [1:0] scanlines = status[4:3];
wire blend = status[5];
wire service = status[6];
assign LED = ~ioctl_downl;
assign SDRAM_CLK = clk_sd;
@ -65,21 +68,39 @@ wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoublerD;
wire ypbpr;
wire [11:0] audio;
wire hs, vs;
wire blankn = 1'b1;//todo
wire [3:0] g,b,r;
wire no_csync;
wire key_pressed;
wire [7:0] key_code;
wire key_strobe;
user_io #(
.STRLEN(($size(CONF_STR)>>3)))
user_io(
.clk_sys (clk_sys ),
.conf_str (CONF_STR ),
.SPI_CLK (SPI_SCK ),
.SPI_SS_IO (CONF_DATA0 ),
.SPI_MISO (SPI_DO ),
.SPI_MOSI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable (scandoublerD ),
.ypbpr (ypbpr ),
.no_csync (no_csync ),
.key_strobe (key_strobe ),
.key_pressed (key_pressed ),
.key_code (key_code ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
wire [14:0] rom_addr;
wire [15:0] rom_do;
wire [13:0] snd_addr;
wire [15:0] snd_do;
wire [14:0] sp_addr;
wire [31:0] sp_do;
@ -165,15 +186,20 @@ always @(posedge clk_sys) begin
end
wire [11:0] audio;
wire hs, vs;
wire blankn = 1'b1;//todo
wire [3:0] g,b,r;
target_top target_top(
.clock_50(clk_sys),//40MHz
.clock_vid(clk_vid),//25.263158MHz
.clock_sys(clk_sys),//4xclk_vid
.clock_vid(clk_vid),//11MHz
.clk_aud(clk_aud),//0.895MHz
.reset_in(reset),
.audio_out(audio),
.usr_coin1(m_coin1),
.usr_coin2(m_coin2),
.usr_service(status[6]),
.usr_service(service),
.usr_start1(m_one_player),
.usr_start2(m_two_players),
.p1_up(m_up),
@ -188,18 +214,18 @@ target_top target_top(
.p2_rt(m_right2),
.p2_f1(m_fire2A),
.p2_f2(m_fire2B),
.VGA_VS(hs),
.VGA_HS(vs),
.VGA_R(r),
.VGA_G(g),
.VGA_B(b),
.VGA_VS(vs),
.VGA_HS(hs),
.VGA_R(r),
.VGA_G(g),
.VGA_B(b),
.cpu_rom_addr(rom_addr),
.cpu_rom_do( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ),
.snd_rom_addr(snd_addr),
.snd_rom_do(snd_addr[0] ? snd_do[15:8] : snd_do[7:0])
.snd_rom_do(snd_addr[0] ? snd_do[15:8] : snd_do[7:0])
);
mist_video #(.COLOR_DEPTH(4), .SD_HCNT_WIDTH(9)) mist_video(
mist_video #(.COLOR_DEPTH(4), .SD_HCNT_WIDTH(10)) mist_video(
.clk_sys ( clk_sys ),
.SPI_SCK ( SPI_SCK ),
.SPI_SS3 ( SPI_SS3 ),
@ -214,33 +240,13 @@ mist_video #(.COLOR_DEPTH(4), .SD_HCNT_WIDTH(9)) mist_video(
.VGA_B ( VGA_B ),
.VGA_VS ( VGA_VS ),
.VGA_HS ( VGA_HS ),
.rotate ( { 1'b1, status[2] } ),
.ce_divider ( 1'b1 ),
.scandoubler_disable( 1),//scandoublerD ),
.scanlines ( status[4:3] ),
.blend ( status[5] ),
.ypbpr ( ypbpr )
);
user_io #(
.STRLEN(($size(CONF_STR)>>3)))
user_io(
.clk_sys (clk_sys ),
.conf_str (CONF_STR ),
.SPI_CLK (SPI_SCK ),
.SPI_SS_IO (CONF_DATA0 ),
.SPI_MISO (SPI_DO ),
.SPI_MOSI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable (scandoublerD ),
.ypbpr (ypbpr ),
.key_strobe (key_strobe ),
.key_pressed (key_pressed ),
.key_code (key_code ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
.rotate ( { 1'b1, rotate } ),
.ce_divider ( 1'b0 ),
.scandoubler_disable( scandoublerD ),
.scanlines ( scanlines ),
.blend ( blend ),
.ypbpr ( ypbpr ),
.no_csync ( no_csync )
);
wire dac_o;
@ -267,7 +273,7 @@ arcade_inputs inputs (
.key_code ( key_code ),
.joystick_0 ( joystick_0 ),
.joystick_1 ( joystick_1 ),
.rotate ( status[2] ),
.rotate ( rotate ),
.orientation ( 2'b10 ),
.joyswap ( 1'b0 ),
.oneplayer ( 1'b1 ),

View File

@ -8,42 +8,44 @@ use work.platform_variant_pkg.all;
use work.video_controller_pkg.all;
package platform_pkg is
constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_VGA_640x480_60Hz;
constant PACE_CLK0_DIVIDE_BY : natural := 3;
constant PACE_CLK0_MULTIPLY_BY : natural := 5; -- 24*5/3 = 40MHz
constant PACE_CLK1_DIVIDE_BY : natural := 19;
constant PACE_CLK1_MULTIPLY_BY : natural := 20; -- 24*20/19 = 25.263158MHz
constant PACE_VIDEO_H_SCALE : integer := 1;
constant PACE_VIDEO_V_SCALE : integer := 1;
constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '0';
constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_VGA_640x480_60Hz;
-- constant PACE_CLK0_DIVIDE_BY : natural := 3;
-- constant PACE_CLK0_MULTIPLY_BY : natural := 5; -- 24*5/3 = 40MHz
-- constant PACE_CLK1_DIVIDE_BY : natural := 19;
-- constant PACE_CLK1_MULTIPLY_BY : natural := 20; -- 24*20/19 = 25.263158MHz
-- constant PACE_VIDEO_H_SCALE : integer := 1;
-- constant PACE_VIDEO_V_SCALE : integer := 1;
-- constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_ARCADE_STD_336x240_60Hz;
-- constant PACE_CLK0_DIVIDE_BY : natural := 1;
-- constant PACE_CLK0_MULTIPLY_BY : natural := 1; -- 24*1/1 = 24MHz
-- constant PACE_CLK1_DIVIDE_BY : natural := 57;
-- constant PACE_CLK1_MULTIPLY_BY : natural := 17; -- 24*17/57 = 7.157895MHz
-- constant PACE_CLK0_DIVIDE_BY : natural := 19;
-- constant PACE_CLK0_MULTIPLY_BY : natural := 20; -- 27*20/19 = 24MHz
-- constant PACE_CLK1_DIVIDE_BY : natural := 19;
-- constant PACE_CLK1_MULTIPLY_BY : natural := 5; -- 27*5/19 = 7.157895MHz
-- constant PACE_VIDEO_H_SCALE : integer := 1;
-- constant PACE_VIDEO_V_SCALE : integer := 1;
-- constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '0';
--constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_CVBS_720x288p_50Hz;
--constant PACE_CLK0_DIVIDE_BY : natural := 8;
--constant PACE_CLK0_MULTIPLY_BY : natural := 9; -- 24*9/8 = 27MHz
--constant PACE_CLK1_DIVIDE_BY : natural := 16;
--constant PACE_CLK1_MULTIPLY_BY : natural := 9; -- 24*9/16 = 13.5MHz
--constant PACE_VIDEO_H_SCALE : integer := 2;
--constant PACE_VIDEO_V_SCALE : integer := 1;
--constant PACE_ENABLE_ADV724 : std_logic := '1';
--constant USE_VIDEO_VBLANK_INTERRUPT : boolean := false;
constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_PAL_576x288_50Hz;
constant PACE_CLK0_DIVIDE_BY : natural := 27;
constant PACE_CLK0_MULTIPLY_BY : natural := 44; -- 27*44/27 = 44MHz
constant PACE_CLK1_DIVIDE_BY : natural := 27;
constant PACE_CLK1_MULTIPLY_BY : natural := 11; -- 27*11/27 = 11MHz
constant PACE_VIDEO_H_SCALE : integer := 1;
constant PACE_VIDEO_V_SCALE : integer := 1;
constant PACE_ENABLE_ADV724 : std_logic := '1';
constant USE_VIDEO_VBLANK_INTERRUPT : boolean := false;
constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '1';
constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '1';
constant PACE_VIDEO_BORDER_RGB : RGB_t := RGB_BLACK;
constant M62_VIDEO_H_SIZE : integer := 384;
constant M62_VIDEO_H_OFFSET : integer := (512-M62_VIDEO_H_SIZE)/2;
constant M62_VIDEO_V_SIZE : integer := 256;
constant PACE_VIDEO_NUM_BITMAPS : natural := 0;
constant PACE_VIDEO_NUM_TILEMAPS : natural := 1;
constant PACE_VIDEO_NUM_SPRITES : natural := 32;
@ -52,18 +54,14 @@ package platform_pkg is
constant PACE_VIDEO_L_CROP : integer := 0;
constant PACE_VIDEO_R_CROP : integer := PACE_VIDEO_L_CROP;
constant PACE_VIDEO_PIPELINE_DELAY : integer := 5;
constant PACE_INPUTS_NUM_BYTES : integer := 6;
constant CLK0_FREQ_MHz : natural :=
27 * PACE_CLK0_MULTIPLY_BY / PACE_CLK0_DIVIDE_BY;
constant CPU_FREQ_MHz : natural := 3;
constant M62_CPU_CLK_ENA_DIVIDE_BY : natural := CLK0_FREQ_MHz / CPU_FREQ_MHz;
constant M62_CPU_CLK_ENA_DIVIDE_BY : natural := CLK0_FREQ_MHz / CPU_FREQ_MHz;
type from_PLATFORM_IO_t is record
not_used : std_logic;

View File

@ -14,11 +14,11 @@
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 13.1.0 Build 162 10/23/2013 SJ Web Edition
-- 13.1.4 Build 182 03/12/2014 Patches 4.26 SJ Web Edition
-- ************************************************************
--Copyright (C) 1991-2013 Altera Corporation
--Copyright (C) 1991-2014 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
@ -166,19 +166,19 @@ BEGIN
bandwidth_type => "AUTO",
clk0_divide_by => 27,
clk0_duty_cycle => 50,
clk0_multiply_by => 40,
clk0_multiply_by => 44,
clk0_phase_shift => "0",
clk1_divide_by => 43,
clk1_divide_by => 27,
clk1_duty_cycle => 50,
clk1_multiply_by => 40,
clk1_multiply_by => 11,
clk1_phase_shift => "0",
clk2_divide_by => 3,
clk2_divide_by => 27,
clk2_duty_cycle => 50,
clk2_multiply_by => 8,
clk2_multiply_by => 88,
clk2_phase_shift => "0",
clk3_divide_by => 5400,
clk3_divide_by => 9000,
clk3_duty_cycle => 50,
clk3_multiply_by => 179,
clk3_multiply_by => 299,
clk3_phase_shift => "0",
compensate_clock => "CLK0",
inclk0_input_frequency => 37037,
@ -262,17 +262,17 @@ END SYN;
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "27"
-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "43"
-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "3"
-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "27"
-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "27"
-- Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "27"
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "40.000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "25.116280"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "72.000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "0.895000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "44.000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "11.000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "88.000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "0.897000"
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@ -301,15 +301,15 @@ END SYN;
-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK3 STRING "0"
-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "40"
-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "40"
-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "8"
-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "44"
-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "11"
-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "88"
-- Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "1"
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "40.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "25.26315800"
-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "72.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "0.89500000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "44.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "11.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "88.00000000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "0.89700000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
@ -371,19 +371,19 @@ END SYN;
-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "27"
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "40"
-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "44"
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "43"
-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "27"
-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "40"
-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "11"
-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "3"
-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "27"
-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "8"
-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "88"
-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "5400"
-- Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "9000"
-- Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "179"
-- Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "299"
-- Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"

View File

@ -9,40 +9,40 @@ use work.video_controller_pkg.all;
use work.platform_pkg.all;
entity target_top is port(
clock_50 : in std_logic;
clock_sys : in std_logic;
clock_vid : in std_logic;
clk_aud : in std_logic;
reset_in : in std_logic;
audio_out : out std_logic_vector(11 downto 0);
reset_in : in std_logic;
audio_out : out std_logic_vector(11 downto 0);
usr_coin1 : in std_logic;
usr_coin2 : in std_logic;
usr_service : in std_logic;
usr_start1 : in std_logic;
usr_start2 : in std_logic;
p1_up : in std_logic;
p1_dw : in std_logic;
p1_lt : in std_logic;
p1_rt : in std_logic;
p1_f1 : in std_logic;
p1_f2 : in std_logic;
usr_coin2 : in std_logic;
usr_service : in std_logic;
usr_start1 : in std_logic;
usr_start2 : in std_logic;
p1_up : in std_logic;
p1_dw : in std_logic;
p1_lt : in std_logic;
p1_rt : in std_logic;
p1_f1 : in std_logic;
p1_f2 : in std_logic;
p2_up : in std_logic;
p2_dw : in std_logic;
p2_lt : in std_logic;
p2_rt : in std_logic;
p2_f1 : in std_logic;
p2_f2 : in std_logic;
VGA_VS : out std_logic;
VGA_HS : out std_logic;
VGA_R : out std_logic_vector(3 downto 0);
VGA_G : out std_logic_vector(3 downto 0);
VGA_B : out std_logic_vector(3 downto 0);
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_do : in std_logic_vector(7 downto 0);
snd_rom_addr : out std_logic_vector(13 downto 0);
snd_rom_do : in std_logic_vector(7 downto 0)
);
p2_up : in std_logic;
p2_dw : in std_logic;
p2_lt : in std_logic;
p2_rt : in std_logic;
p2_f1 : in std_logic;
p2_f2 : in std_logic;
VGA_VS : out std_logic;
VGA_HS : out std_logic;
VGA_R : out std_logic_vector(3 downto 0);
VGA_G : out std_logic_vector(3 downto 0);
VGA_B : out std_logic_vector(3 downto 0);
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_do : in std_logic_vector(7 downto 0);
snd_rom_addr : out std_logic_vector(13 downto 0);
snd_rom_do : in std_logic_vector(7 downto 0)
);
end target_top;
architecture SYN of target_top is
@ -59,7 +59,7 @@ architecture SYN of target_top is
signal sound_data : std_logic_vector(7 downto 0);
begin
clkrst_i.clk(0) <= clock_50;
clkrst_i.clk(0) <= clock_sys;
clkrst_i.clk(1) <= clock_vid;
clkrst_i.arst <= reset_in;
clkrst_i.arst_n <= not clkrst_i.arst;

View File

@ -258,6 +258,16 @@ begin
v_back_porch_r <= 13;
v_border_r <= (240-VIDEO_V_SIZE)/2;
when PACE_VIDEO_PAL_576x288_50Hz =>
-- pixclk=11 MHz
h_front_porch_r <= 2*6;
h_sync_r <= 2*28;
h_back_porch_r <= 2*30;
h_border_r <= (576-VIDEO_H_SIZE)/2;
v_front_porch_r <= 8;
v_sync_r <= 3;
v_back_porch_r <= 13;
v_border_r <= (288-VIDEO_V_SIZE)/2;
when others =>
null;
end case;

View File

@ -21,7 +21,8 @@ package video_controller_pkg is
PACE_VIDEO_ARCADE_STD_336x240_60Hz, -- arcade std resolution (7.16MHz)
PACE_VIDEO_ARCADE_STD_336x240_60Hz_28M64, -- arcade std resolution (28.64MHz)
PACE_VIDEO_CVBS_720x288p_50Hz, -- generic composite
PACE_VIDEO_LCM_320x240_60Hz -- DE2 LCD
PACE_VIDEO_LCM_320x240_60Hz, -- DE2 LCD
PACE_VIDEO_PAL_576x288_50Hz
);
type PACEVideoDisplay_t is