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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-03-10 12:28:26 +00:00

add MiST Toplevel

This commit is contained in:
Marcel
2023-07-10 17:38:51 +02:00
parent 9c58851bd1
commit 1f73580d8d
16 changed files with 7684 additions and 7418 deletions

View File

@@ -18,7 +18,7 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Full Version
# Date created = 12:41:19 July 08, 2023
# Date created = 16:51:06 July 10, 2023
#
# -------------------------------------------------------------------------- #
#
@@ -130,7 +130,7 @@ set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name TOP_LEVEL_ENTITY DemonsWorld_Top
set_global_assignment -name TOP_LEVEL_ENTITY DemonsWorld
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
@@ -177,8 +177,8 @@ set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# -----------------------------
# start ENTITY(DemonsWorld_Top)
# -------------------------
# start ENTITY(DemonsWorld)
# Pin & Location Assignments
# ==========================
@@ -229,17 +229,17 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(DemonsWorld_Top)
# ---------------------------
# end ENTITY(DemonsWorld)
# -----------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_demonsworld/DemonsWorld.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_demonsworld/DemonsWorld_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_demonsworld/chip_select.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name QIP_FILE rtl/TMS320C1X/TMS320C1X.qip
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

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@@ -130,7 +130,7 @@ set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name TOP_LEVEL_ENTITY RallyBike_Top
set_global_assignment -name TOP_LEVEL_ENTITY RallyBike
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
@@ -231,14 +231,14 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_rallybike/RallyBike.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_rallybike/RallyBike_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_rallybike/chip_select.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@@ -42,19 +42,8 @@
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_vimana/Vimana_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_vimana/chip_select.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_7 -to LED
@@ -140,7 +129,7 @@ set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name TOP_LEVEL_ENTITY Vimana_Top
set_global_assignment -name TOP_LEVEL_ENTITY Vimana
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
@@ -192,53 +181,63 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# Pin & Location Assignments
# ==========================
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
# Fitter Assignments
# ==================
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(RallyBike_Top)
# -------------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_vimana/Vimana.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_vimana/Vimana_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_vimana/chip_select.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@@ -42,17 +42,8 @@
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_zerowing/Zerowing_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_zerowing/chip_select.v
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
# Pin & Location Assignments
# ==========================
@@ -139,7 +130,7 @@ set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name TOP_LEVEL_ENTITY Zerowing_Top
set_global_assignment -name TOP_LEVEL_ENTITY Zerowing
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
@@ -191,53 +182,63 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# Pin & Location Assignments
# ==========================
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
# Fitter Assignments
# ==================
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(Zerowing_Top)
# ------------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_zerowing/Zerowing.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/rtl_zerowing/Zerowing_Top.sv
set_global_assignment -name VERILOG_FILE rtl/rtl_zerowing/chip_select.v
set_global_assignment -name QIP_FILE rtl/common/common.qip
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VERILOG_FILE rtl/pll_mist.v
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name QIP_FILE ../../common/Sound/jtopl/jt26.qip
set_global_assignment -name QIP_FILE ../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@@ -1,103 +0,0 @@
//============================================================================
// Generic pause handling for MiSTer cores.
//
// https://github.com/JimmyStones/Pause_MiSTer
//
// Copyright (c) 2021 Jim Gregory
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 3 of the License, or (at your option)
// any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
// more details.
//
// You should have received a copy of the GNU General Public License along
// with this program; if not, write to the Free Software Foundation, Inc.,
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
//============================================================================
/*
Features:
- Pause can be triggered by user input, hiscore module or OSD opening (optionally controlled by setting in OSD)
- When paused the RGB outputs will be halved after 10 seconds to reduce burn-in (optionally controlled by setting in OSD)
- Reset signal will cancel user triggered pause
Version history:
0001 - 2021-03-15 - First marked release
0002 - 2021-08-28 - Add optional output of dim_video signal (currently used by Galaga)
============================================================================
*/
module pause #(
parameter RW=8, // Width of red channel
parameter GW=8, // Width of green channel
parameter BW=8, // Width of blue channel
parameter CLKSPD = 12 // Main clock speed in MHz
)
(
input clk_sys, // Core system clock (should match HPS module)
input reset, // CPU reset signal (active-high)
input user_button, // User pause button signal (active-high)
input pause_request, // Pause requested by other code (active-high)
input [1:0] options, // Pause options from OSD
// [0] = pause in OSD (active-high)
// [1] = dim video (active-high)
input OSD_STATUS, // OSD is open (active-high)
input [(RW-1):0] r, // Red channel
input [(GW-1):0] g, // Green channel
input [(BW-1):0] b, // Blue channel
output pause_cpu, // Pause signal to CPU (active-high)
`ifdef PAUSE_OUTPUT_DIM
output dim_video, // Dim video requested (active-high)
`endif
output [(RW+GW+BW-1):0] rgb_out // RGB output to arcade_video module
);
// Option constants
localparam pause_in_osd = 1'b0;
localparam dim_video_timer= 1'b1;
reg pause_toggle = 1'b0; // User paused (active-high)
reg [31:0] pause_timer = 1'b0; // Time since pause
reg [31:0] dim_timeout = (CLKSPD*10000000); // Time until video output dim (10 seconds @ CLKSPD Mhz)
`ifndef PAUSE_OUTPUT_DIM
wire dim_video; // Dim video requested (active-high)
`endif
assign pause_cpu = (pause_request | pause_toggle | (OSD_STATUS & options[pause_in_osd])) & !reset;
assign dim_video = (pause_timer >= dim_timeout);
always @(posedge clk_sys) begin
// Track user pause button down
reg user_button_last;
user_button_last <= user_button;
if (!user_button_last & user_button) begin
pause_toggle <= ~pause_toggle;
end
// Clear user pause on reset
if (pause_toggle & reset) begin
pause_toggle <= 0;
end
if (pause_cpu & options[dim_video_timer]) begin
// Track pause duration for video dim
if (pause_timer<dim_timeout) begin
pause_timer <= pause_timer + 1'b1;
end
end else begin
pause_timer <= 1'b0;
end
end
assign rgb_out = dim_video ? {r >> 2,g >> 2, b >> 2} : {r,g,b};
endmodule

View File

@@ -0,0 +1,296 @@
//============================================================================
// Toaplan Hardware v1 HW top-level for MiST
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 of the License, or (at your option)
// any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
// more details.
//
// You should have received a copy of the GNU General Public License along
// with this program; if not, write to the Free Software Foundation, Inc.,
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
//============================================================================
module DemonsWorld(
output LED,
output [5:0] VGA_R,
output [5:0] VGA_G,
output [5:0] VGA_B,
output VGA_HS,
output VGA_VS,
output AUDIO_L,
output AUDIO_R,
input SPI_SCK,
inout SPI_DO,
input SPI_DI,
input SPI_SS2,
input SPI_SS3,
input SPI_SS4,
input CONF_DATA0,
input CLOCK_27,
output [12:0] SDRAM_A,
inout [15:0] SDRAM_DQ,
output SDRAM_DQML,
output SDRAM_DQMH,
output SDRAM_nWE,
output SDRAM_nCAS,
output SDRAM_nRAS,
output SDRAM_nCS,
output [1:0] SDRAM_BA,
output SDRAM_CLK,
output SDRAM_CKE
);
`include "../build_id.v"
//`include "defs.v"
`define CORE_NAME "DemonsWorld"
assign LED = ~ioctl_downl;
assign SDRAM_CLK = clk_72;
assign SDRAM_CKE = 1;
localparam CONF_STR = {
`CORE_NAME, ";;",
"O2,Rotate Controls,Off,On;",
"O34,Scanlines,Off,25%,50%,75%;",
"O5,Blending,Off,On;",
"O6,Joystick Swap,Off,On;",
"DIP;",
"T0,Reset;",
"V,v1.20.",`BUILD_DATE
};
wire rotate = status[2];
wire [1:0] scanlines = status[4:3];
wire blend = status[5];
wire joyswap = status[6];
wire [7:0] dsw1 = status[23:16];
wire [7:0] dsw2 = status[31:24];
reg [7:0] dsw_m68k, dsw_sp85;
reg [7:0] p1, p2;
wire flipped;
wire key_service = m_fire1[4];
wire key_test = m_fire1[3];
wire clk_72;
wire pll_locked;
pll_mist pll(
.inclk0(CLOCK_27),
.c0(clk_72),
.locked(pll_locked)
);
// reset generation
reg reset = 1;
reg rom_loaded = 0;
always @(posedge clk_72) begin
reg ioctl_downlD;
ioctl_downlD <= ioctl_downl;
if (ioctl_downlD & ~ioctl_downl) rom_loaded <= 1;
reset <= status[0] | buttons[1] | ~rom_loaded | ioctl_downl;
end
// ARM connection
wire [63:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [31:0] joystick_0;
wire [31:0] joystick_1;
wire scandoublerD;
wire ypbpr;
wire no_csync;
wire key_strobe;
wire key_pressed;
wire [7:0] key_code;
wire [6:0] core_mod;
user_io #(
.STRLEN($size(CONF_STR)>>3),
.ROM_DIRECT_UPLOAD(1))
user_io(
.clk_sys (clk_72 ),
.conf_str (CONF_STR ),
.SPI_CLK (SPI_SCK ),
.SPI_SS_IO (CONF_DATA0 ),
.SPI_MISO (SPI_DO ),
.SPI_MOSI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable (scandoublerD ),
.ypbpr (ypbpr ),
.no_csync (no_csync ),
.core_mod (core_mod ),
.key_strobe (key_strobe ),
.key_pressed (key_pressed ),
.key_code (key_code ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
wire ioctl_downl;
wire [7:0] ioctl_index;
wire ioctl_wr;
wire [24:0] ioctl_addr;
wire [7:0] ioctl_dout;
data_io #(.ROM_DIRECT_UPLOAD(1)) data_io(
.clk_sys ( clk_72 ),
.SPI_SCK ( SPI_SCK ),
.SPI_SS2 ( SPI_SS2 ),
.SPI_SS4 ( SPI_SS4 ),
.SPI_DI ( SPI_DI ),
.SPI_DO ( SPI_DO ),
.ioctl_download( ioctl_downl ),
.ioctl_index ( ioctl_index ),
.ioctl_wr ( ioctl_wr ),
.ioctl_addr ( ioctl_addr ),
.ioctl_dout ( ioctl_dout )
);
wire [15:0] laudio, raudio;
wire hs, vs;
wire blankn = ~(hb | vb);
wire hb, vb;
wire [4:0] r,b,g;
DemonsWorld_Top DemonsWorld_Top(
.pll_locked ( pll_locked ),
.clk_sys ( clk_72 ),
.reset ( reset ),
.turbo_68k (0),//cpu_turbo
.pause_cpu (0),
// input scrollDBG,
.p1_right (m_right1),
.p1_left (m_left1),
.p1_down (m_down1),
.p1_up (m_up1),
.p1_buttons (m_fire1[3:0]),
.p2_right (m_right2),
.p2_left (m_left2),
.p2_down (m_down2),
.p2_up (m_up2),
.p2_buttons (m_fire2[3:0]),
.start1 (m_one_player),
.start2 (m_two_players),
.coin_a (m_coin1),
.coin_b (m_coin2),
.b_pause (),
.service (),
.key_tilt (m_tilt),
.key_service (),
.sw0 (),
.sw1 (),
.sw2 (),
.hblank ( hb ),
.vblank ( vb ),
.hsync ( hs ),
.vsync ( vs ),
.r ( r ),
.g ( g ),
.b ( b ),
.hs_offset (0),
.vs_offset (0),
.hs_width (0),
.vs_width (0),
.refresh_mod (0),
.ntsc (0),
.opl2_level (2'b00),
.audio_l ( laudio ),
.audio_r ( raudio ),
.ioctl_download( ioctl_downl),
.ioctl_index (ioctl_index),
.ioctl_addr ( ioctl_addr - 2'd2 ),//check
.ioctl_wr ( ioctl_wr ),
.ioctl_dout ( ioctl_dout ),
.SDRAM_A ( SDRAM_A ),
.SDRAM_BA ( SDRAM_BA ),
.SDRAM_DQ ( SDRAM_DQ ),
.SDRAM_DQML ( SDRAM_DQML ),
.SDRAM_DQMH ( SDRAM_DQMH ),
.SDRAM_nCS ( SDRAM_nCS ),
.SDRAM_nCAS ( SDRAM_nCAS ),
.SDRAM_nRAS ( SDRAM_nRAS ),
.SDRAM_nWE ( SDRAM_nWE )
);
mist_video #(.COLOR_DEPTH(5),.SD_HCNT_WIDTH(10)) mist_video(
.clk_sys(clk_72),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(blankn ? r : 5'd0),
.G(blankn ? g : 5'd0),
.B(blankn ? b : 5'd0),
.HSync(~hs),
.VSync(~vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.no_csync(no_csync),
.rotate({~flipped,rotate}),
.ce_divider(3'd5), // pix clock = 72/6
.blend(blend),
.scandoubler_disable(scandoublerD),
.scanlines(scanlines),
.ypbpr(ypbpr)
);
dac #(16) dacl(
.clk_i(clk_72),
.res_n_i(1),
.dac_i({~laudio[15], laudio[14:0]}),
.dac_o(AUDIO_L)
);
dac #(16) dacr(
.clk_i(clk_72),
.res_n_i(1),
.dac_i({~raudio[15], raudio[14:0]}),
.dac_o(AUDIO_R)
);
// Common inputs
wire m_up1, m_down1, m_left1, m_right1, m_up1B, m_down1B, m_left1B, m_right1B;
wire m_up2, m_down2, m_left2, m_right2, m_up2B, m_down2B, m_left2B, m_right2B;
wire m_up3, m_down3, m_left3, m_right3, m_up3B, m_down3B, m_left3B, m_right3B;
wire m_up4, m_down4, m_left4, m_right4, m_up4B, m_down4B, m_left4B, m_right4B;
wire m_tilt, m_coin1, m_coin2, m_coin3, m_coin4, m_one_player, m_two_players, m_three_players, m_four_players;
wire [11:0] m_fire1, m_fire2, m_fire3, m_fire4;
arcade_inputs inputs (
.clk ( clk_72 ),
.key_strobe ( key_strobe ),
.key_pressed ( key_pressed ),
.key_code ( key_code ),
.joystick_0 ( joystick_0 ),
.joystick_1 ( joystick_1 ),
.rotate ( rotate ),
.orientation ( {~flipped, 1'b0} ),
.joyswap ( joyswap ),
.oneplayer ( 1'b0 ),
.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),
.player1 ( {m_up1B, m_down1B, m_left1B, m_right1B, m_fire1, m_up1, m_down1, m_left1, m_right1} ),
.player2 ( {m_up2B, m_down2B, m_left2B, m_right2B, m_fire2, m_up2, m_down2, m_left2, m_right2} ),
.player3 ( {m_up3B, m_down3B, m_left3B, m_right3B, m_fire3, m_up3, m_down3, m_left3, m_right3} ),
.player4 ( {m_up4B, m_down4B, m_left4B, m_right4B, m_fire4, m_up4, m_down4, m_left4, m_right4} )
);
endmodule

View File

@@ -1,13 +1,11 @@
module DemonsWorld_Top(
input clk_sys,
input clk_70M,
input pll_locked,
input turbo_68k,//cpu_turbo
input reset,
input reset,
input pause_cpu,
input status32,
//------------------------------------
input scrollDBG,
input p1_right,
input p1_left,
input p1_down,
@@ -29,7 +27,7 @@ module DemonsWorld_Top(
input [7:0] sw0,
input [7:0] sw1,
input [7:0] sw2,
//------------------------------------
output hsync,
output vsync,
output hblank,
@@ -44,18 +42,24 @@ module DemonsWorld_Top(
output [4:0] b,
input ntsc,
input [1:0] opl2_level,
output [15:0] audio,
input ioctl_download,
input ioctl_upload,
// input ioctl_upload_req;
// input ioctl_wait;
output ioctl_wr,
input [15:0] ioctl_index,
output [26:0] ioctl_addr,
input [15:0] ioctl_dout,
output [15:0] ioctl_din
//------------------------------------
output [15:0] audio_l,
output [15:0] audio_r,
//------------------------------------
input ioctl_download,
input ioctl_index,
input [23:0] ioctl_addr,
input ioctl_wr,
input [7:0] ioctl_dout,
output [12:0] SDRAM_A,
output [1:0] SDRAM_BA,
inout [15:0] SDRAM_DQ,
output SDRAM_DQML,
output SDRAM_DQMH,
output SDRAM_nCS,
output SDRAM_nCAS,
output SDRAM_nRAS,
output SDRAM_nWE
);
//// INPUT
@@ -81,8 +85,8 @@ always @ (posedge clk_sys ) begin
z80_dswb <= sw1;
z80_tjump <= sw2;
if ( status32 == 1 ) begin
system <= { vblank, start2 | p1_buttons[3], start1 | p1_buttons[3], coin_b, coin_a, service | status32, key_tilt, key_service };
if ( scrollDBG == 1 ) begin
system <= { vblank, start2 | p1_buttons[3], start1 | p1_buttons[3], coin_b, coin_a, service | scrollDBG, key_tilt, key_service };
end else begin
system <= { vblank, start2, start1, coin_b, coin_a, service, key_tilt, key_service };
end
@@ -304,7 +308,7 @@ end
wire tms_reset;
reg [7:0] tms_reset_count;
always @ (posedge clk_70M) begin
always @ (posedge clk_sys) begin
if ( reset == 1 ) begin
tms_reset_count <= 0;
tms_reset <= 1 ;
@@ -319,7 +323,7 @@ end
TMS320C1X dsp
(
.CLK(clk_70M), // (X2/CLKIN) Crystal input internal oscillator or external system clock input
.CLK(clk_sys), // (X2/CLKIN) Crystal input internal oscillator or external system clock input
.RST_N(~reset),
.EN(1), // (DEN) Data enable for device input data on D15-D0
@@ -480,10 +484,12 @@ jtframe_mixer #(.W0(16), .WOUT(16)) u_mix_mono(
always @ (posedge clk_sys ) begin
if ( pause_cpu == 1 ) begin
audio <= 0;
audio_l <= 0;
audio_r <= 0;
end else if ( pause_cpu == 0 ) begin
// mix audio
audio <= {~mono[15],mono[14:0]};
audio_l <= {mono[15:0]};
audio_r <= {mono[15:0]};
end
end
@@ -1478,36 +1484,36 @@ reg [11:0] shared_dsp_ram_addr ;
reg shared_dsp_ram_w ;
// main 68k ram high
dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_H
(
.clock_a ( clk_10M ),
.address_a ( cpu_a[14:1] ),
.wren_a ( !cpu_rw & ram_cs & !cpu_uds_n ),
.data_a ( cpu_dout[15:8] ),
.q_a ( ram_dout[15:8] ),
.clock_b( clk_14M ),
.address_b( shared_dsp_ram_addr[11:0] ),
.wren_b( shared_dsp_ram_w ),
.data_b( shared_dsp_ram_din[15:8] ),
.q_b( shared_dsp_ram_dout[15:8] )
);
// main 68k ram low
dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_L
(
.clock_a( clk_10M ),
.address_a( cpu_a[14:1] ),
.wren_a( !cpu_rw & ram_cs & !cpu_lds_n ),
.data_a( cpu_dout[7:0] ),
.q_a( ram_dout[7:0] ),
.clock_b( clk_14M ),
.address_b( shared_dsp_ram_addr[11:0] ),
.wren_b( shared_dsp_ram_w ),
.data_b( shared_dsp_ram_din[7:0] ),
.q_b( shared_dsp_ram_dout[7:0] )
);
//dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_H
//(
// .clock_a ( clk_10M ),
// .address_a ( cpu_a[14:1] ),
// .wren_a ( !cpu_rw & ram_cs & !cpu_uds_n ),
// .data_a ( cpu_dout[15:8] ),
// .q_a ( ram_dout[15:8] ),
//
// .clock_b( clk_14M ),
// .address_b( shared_dsp_ram_addr[11:0] ),
// .wren_b( shared_dsp_ram_w ),
// .data_b( shared_dsp_ram_din[15:8] ),
// .q_b( shared_dsp_ram_dout[15:8] )
//);
//
//// main 68k ram low
//dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_L
//(
// .clock_a( clk_10M ),
// .address_a( cpu_a[14:1] ),
// .wren_a( !cpu_rw & ram_cs & !cpu_lds_n ),
// .data_a( cpu_dout[7:0] ),
// .q_a( ram_dout[7:0] ),
//
// .clock_b( clk_14M ),
// .address_b( shared_dsp_ram_addr[11:0] ),
// .wren_b( shared_dsp_ram_w ),
// .data_b( shared_dsp_ram_din[7:0] ),
// .q_b( shared_dsp_ram_dout[7:0] )
//);
@@ -1516,20 +1522,20 @@ dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_L
// z80 and 68k shared ram
// 4k
dual_port_ram #(.LEN(4096), .DATA_WIDTH(8)) shared_ram
(
.clock_a( clk_10M ),
.address_a( cpu_a[12:1] ),
.wren_a( shared_ram_cs & !cpu_rw & !cpu_lds_n),
.data_a( cpu_dout[7:0] ),
.q_a( cpu_shared_dout[7:0] ),
.clock_b( clk_3_5M ), // z80 clock is 3.5M
.address_b( z80_addr[11:0] ),
.data_b( z80_dout ),
.wren_b( sound_ram_1_cs & ~z80_wr_n ),
.q_b( z80_shared_dout )
);
//dual_port_ram #(.LEN(4096), .DATA_WIDTH(8)) shared_ram
//(
// .clock_a( clk_10M ),
// .address_a( cpu_a[12:1] ),
// .wren_a( shared_ram_cs & !cpu_rw & !cpu_lds_n),
// .data_a( cpu_dout[7:0] ),
// .q_a( cpu_shared_dout[7:0] ),
//
// .clock_b( clk_3_5M ), // z80 clock is 3.5M
// .address_b( z80_addr[11:0] ),
// .data_b( z80_dout ),
// .wren_b( sound_ram_1_cs & ~z80_wr_n ),
// .q_b( z80_shared_dout )
// );
reg [11:0] sprite_rb_addr;
wire [15:0] sprite_rb_dout;

View File

@@ -1,13 +1,12 @@
module RallyBike_Top(
input clk_sys,
input clk_70M,
input pll_locked,
input turbo_68k,//cpu_turbo
input reset,
input pause_cpu,
input status32,
input scrollDBG,
input p1_right,
input p1_left,
input p1_down,
@@ -44,18 +43,24 @@ module RallyBike_Top(
output [4:0] b,
input ntsc,
input [1:0] opl2_level,
output [15:0] audio,
output [15:0] audio_l,
output [15:0] audio_r,
input ioctl_download,
input ioctl_upload,
// input ioctl_upload_req;
// input ioctl_wait;
output ioctl_wr,
input [15:0] ioctl_index,
output [26:0] ioctl_addr,
input [15:0] ioctl_dout,
output [15:0] ioctl_din
input ioctl_index,
input ioctl_download,
input [23:0] ioctl_addr,
input ioctl_wr,
input [7:0] ioctl_dout,
output [12:0] SDRAM_A,
output [1:0] SDRAM_BA,
inout [15:0] SDRAM_DQ,
output SDRAM_DQML,
output SDRAM_DQMH,
output SDRAM_nCS,
output SDRAM_nCAS,
output SDRAM_nRAS,
output SDRAM_nWE
);
//// INPUT
@@ -81,8 +86,8 @@ always @ (posedge clk_sys ) begin
z80_dswb <= sw1;
z80_tjump <= sw2;
if ( status32 == 1 ) begin
system <= { vblank, start2 | p1_buttons[3], start1 | p1_buttons[3], coin_b, coin_a, service | status32, key_tilt, key_service };
if ( scrollDBG == 1 ) begin
system <= { vblank, start2 | p1_buttons[3], start1 | p1_buttons[3], coin_b, coin_a, service | scrollDBG, key_tilt, key_service };
end else begin
system <= { vblank, start2, start1, coin_b, coin_a, service, key_tilt, key_service };
end
@@ -431,10 +436,12 @@ jtframe_mixer #(.W0(16), .WOUT(16)) u_mix_mono(
always @ (posedge clk_sys ) begin
if ( pause_cpu == 1 ) begin
audio <= 0;
audio_l <= 0;
audio_r <= 0;
end else if ( pause_cpu == 0 ) begin
// mix audio
audio <= {~mono[15],mono[14:0]};
audio_l <= {mono[15:0]};
audio_r <= {mono[15:0]};
end
end
@@ -1201,23 +1208,23 @@ dual_port_ram #(.LEN(1024), .DATA_WIDTH(8)) sprite_palram_h (
);
// main 68k ram low
dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_L (
.clock_a ( clk_10M ),
.address_a ( cpu_a[14:1] ),
.wren_a ( !cpu_rw & ram_cs & !cpu_lds_n ),
.data_a ( cpu_dout[7:0] ),
.q_a ( ram_dout[7:0] )
);
// main 68k ram high
dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_H (
.clock_a ( clk_10M ),
.address_a ( cpu_a[14:1] ),
.wren_a ( !cpu_rw & ram_cs & !cpu_uds_n ),
.data_a ( cpu_dout[15:8] ),
.q_a ( ram_dout[15:8] )
);
//// main 68k ram low
//dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_L (
// .clock_a ( clk_10M ),
// .address_a ( cpu_a[14:1] ),
// .wren_a ( !cpu_rw & ram_cs & !cpu_lds_n ),
// .data_a ( cpu_dout[7:0] ),
// .q_a ( ram_dout[7:0] )
//);
//
//// main 68k ram high
//dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_H (
// .clock_a ( clk_10M ),
// .address_a ( cpu_a[14:1] ),
// .wren_a ( !cpu_rw & ram_cs & !cpu_uds_n ),
// .data_a ( cpu_dout[15:8] ),
// .q_a ( ram_dout[15:8] )
//);
//wire [15:0] z80_shared_addr = z80_addr - 16'h8000;
@@ -1225,19 +1232,19 @@ dual_port_ram #(.LEN(16384), .DATA_WIDTH(8)) ram16kx8_H (
// z80 and 68k shared ram
// 4k
dual_port_ram #(.LEN(4096), .DATA_WIDTH(8)) shared_ram (
.clock_a ( clk_10M ),
.address_a ( cpu_a[12:1] ),
.wren_a ( shared_ram_cs & !cpu_rw & !cpu_lds_n),
.data_a ( cpu_dout[7:0] ),
.q_a ( cpu_shared_dout[7:0] ),
.clock_b ( clk_3_5M ), // z80 clock is 3.5M
.address_b ( z80_addr[11:0] ),
.data_b ( z80_dout ),
.wren_b ( sound_ram_1_cs & ~z80_wr_n ),
.q_b ( z80_shared_dout )
);
//dual_port_ram #(.LEN(4096), .DATA_WIDTH(8)) shared_ram (
// .clock_a ( clk_10M ),
// .address_a ( cpu_a[12:1] ),
// .wren_a ( shared_ram_cs & !cpu_rw & !cpu_lds_n),
// .data_a ( cpu_dout[7:0] ),
// .q_a ( cpu_shared_dout[7:0] ),
//
// .clock_b ( clk_3_5M ), // z80 clock is 3.5M
// .address_b ( z80_addr[11:0] ),
// .data_b ( z80_dout ),
// .wren_b ( sound_ram_1_cs & ~z80_wr_n ),
// .q_b ( z80_shared_dout )
//);
reg sprite_attr_w ;
reg [10:0] sprite_attr_addr;

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@@ -1,13 +1,13 @@
module Vimana_Top(
input [1:0] pcb,
input clk_sys,
input clk_70M,
input pll_locked,
input turbo_68k,//cpu_turbo
input reset,
input reset,
input pause_cpu,
input status32,
//------------------------------------
input scrollDBG,
input p1_right,
input p1_left,
input p1_down,
@@ -29,8 +29,7 @@ module Vimana_Top(
input [7:0] sw0,
input [7:0] sw1,
input [7:0] sw2,
input [1:0] pcb,
//------------------------------------
output hsync,
output vsync,
output hblank,
@@ -45,18 +44,24 @@ module Vimana_Top(
output [4:0] b,
input ntsc,
input [1:0] opl2_level,
output [15:0] audio,
input ioctl_download,
input ioctl_upload,
// input ioctl_upload_req;
// input ioctl_wait;
output ioctl_wr,
input [15:0] ioctl_index,
output [26:0] ioctl_addr,
input [15:0] ioctl_dout,
output [15:0] ioctl_din
//------------------------------------
output [15:0] audio_l,
output [15:0] audio_r,
//------------------------------------
input ioctl_download,
input ioctl_index,
input [23:0] ioctl_addr,
input ioctl_wr,
input [7:0] ioctl_dout,
output [12:0] SDRAM_A,
output [1:0] SDRAM_BA,
inout [15:0] SDRAM_DQ,
output SDRAM_DQML,
output SDRAM_DQMH,
output SDRAM_nCS,
output SDRAM_nCAS,
output SDRAM_nRAS,
output SDRAM_nWE
);
@@ -78,8 +83,8 @@ always @ (posedge clk_sys ) begin
z80_dswa <= sw0;
z80_tjump <= sw2;
if ( status32 == 1 ) begin
z80_dswb <= { sw1[7], sw1[6] | status32, sw1[5:0] };
if ( scrollDBG == 1 ) begin
z80_dswb <= { sw1[7], sw1[6] | scrollDBG, sw1[5:0] };
system <= { vblank, start2 | p1_buttons[3], start1 | p1_buttons[3], coin_b, coin_a, service, key_tilt, key_service };
end else begin
z80_dswb <= sw1;
@@ -534,10 +539,12 @@ jtframe_mixer #(.W0(16), .WOUT(16)) u_mix_mono(
always @ (posedge clk_sys ) begin
if ( pause_cpu == 1 ) begin
audio <= 0;
audio_l <= 0;
audio_r <= 0;
end else if ( pause_cpu == 0 ) begin
// mix audio
audio <= {~mono[15],mono[14:0]};
audio_l <= {mono[15:0]};
audio_r <= {mono[15:0]};
end
end

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