mirror of
https://github.com/Gehstock/Mist_FPGA.git
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Jailbreak: add Z80 games (Green Beret, Mr. Goemon)
This commit is contained in:
@@ -253,6 +253,7 @@ set_global_assignment -name VHDL_FILE rtl/VLM5030/vlm5030_pack.vhd
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set_global_assignment -name VHDL_FILE rtl/VLM5030/vlm5030_gl.vhd
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set_global_assignment -name QIP_FILE rtl/pll.qip
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set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
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set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
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set_global_assignment -name VERILOG_FILE ../../common/CPU/MC6809/mc6809is.v
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set_global_assignment -name QIP_FILE ../../common/Sound/sn76489/sn76489.qip
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set_global_assignment -name SIGNALTAP_FILE output_files/sdram.stp
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@@ -2,6 +2,8 @@
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https://github.com/MiSTer-devel/Arcade-Jailbreak_MiSTer
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Green Beret/Mr. Goemon added by Slingshot
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## Usage
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- Create ROM and ARC files from the MRA files using the MRA utility.
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42
Arcade_MiST/Konami Jailbreak/meta/Green Beret.mra
Normal file
42
Arcade_MiST/Konami Jailbreak/meta/Green Beret.mra
Normal file
@@ -0,0 +1,42 @@
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<misterromdescription>
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<name>Green Beret</name>
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<mameversion>0216</mameversion>
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<setname>gberet</setname>
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<mratimestamp>201911270000</mratimestamp>
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<year>1985</year>
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<manufacturer>Konami</manufacturer>
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<category>Army / Fighter</category>
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<rbf>jailbrek</rbf>
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<switches default="00,16,00" base="8" page_id="1" page_name="Switches">
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<dip bits="0,3" name="Credits A" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Free Play"/>
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<dip bits="4,7" name="Credits B" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Invalid"/>
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<dip bits="8,9" name="Lives" ids="2,3,5,7"/>
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<dip bits="10" name="Cabinet type" ids="Cocktail,Upright"/>
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<dip bits="11,12" name="Bonus" ids="30K/70K+,40K/80K+,50K/100K+,50K/200K+"/>
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<dip bits="13,14" name="Difficulty" ids="Easy,Normal,Hard,Hardest"/>
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<dip bits="15" name="Attract mode sound" ids="Off,On"/>
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<dip bits="16" name="Flip screen" ids="Off,On"/>
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<dip bits="17" name="Upright controls" ids="Single,Dual"/>
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</switches>
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<rom index="1"><part>1</part></rom>
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<rom index="0" zip="gberet.zip" md5="ab0edafbb20d2a12be5194c8304dbafe" type="merged|nonmerged">
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<part name="577l03.10c"/>
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<part name="577l02.8c"/>
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<part name="577l01.7c"/>
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<part repeat="0x4000">FF</part>
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<part name="577l07.3f"/>
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<part name="577l06.5e"/>
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<part name="577l05.4e"/>
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<part name="577l08.4f"/>
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<part name="577l04.3e"/>
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<part name="577h10.5f"/>
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<part name="577h11.6f"/>
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<part name="577h09.2f"/>
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</rom>
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</misterromdescription>
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6
Arcade_MiST/Konami Jailbreak/meta/Jailbreak.mra
Executable file → Normal file
6
Arcade_MiST/Konami Jailbreak/meta/Jailbreak.mra
Executable file → Normal file
@@ -44,13 +44,17 @@
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<rom index="0" zip="jailbrek.zip" md5="none">
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<part crc="a0b88dfd" name="507p03.11d"/>
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<part crc="444b7d8e" name="507p02.9d"/>
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<part crc="0c8a3605" name="507l01.8c"/>
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<part crc="e3b7a226" name="507l08.4f"/>
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<part crc="504f0912" name="507j09.5f"/>
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<part crc="0d269524" name="507j04.3e"/>
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<part crc="27d4f6f4" name="507j05.4e"/>
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<part crc="717485cb" name="507j06.5e"/>
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<part crc="e933086f" name="507j07.3f"/>
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<part crc="0c8a3605" name="507l01.8c"/>
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<part crc="0266c7db" name="507j12.6f"/>
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<part crc="d4fe5c97" name="507j13.7f"/>
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<part crc="f1909605" name="507j10.1f"/>
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7
Arcade_MiST/Konami Jailbreak/meta/Manhattan 24 Bunsyo (J).mra
Executable file → Normal file
7
Arcade_MiST/Konami Jailbreak/meta/Manhattan 24 Bunsyo (J).mra
Executable file → Normal file
@@ -44,13 +44,18 @@
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<rom index="0" zip="jailbrek.zip|manhatan.zip" md5="none">
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<part crc="e5039f7e" name="507n03.11d"/>
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<part crc="143cc62c" name="507n02.9d"/>
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<part crc="973fa351" name="507p01.8c"/>
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<part crc="175e1b49" name="507j08.4f"/>
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<part crc="504f0912" name="507j09.5f"/>
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<part crc="0d269524" name="507j04.3e"/>
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<part crc="27d4f6f4" name="507j05.4e"/>
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<part crc="717485cb" name="507j06.5e"/>
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<part crc="e933086f" name="507j07.3f"/>
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<part crc="973fa351" name="507p01.8c"/>
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<part crc="0266c7db" name="507j12.6f"/>
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<part crc="d4fe5c97" name="507j13.7f"/>
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<part crc="f1909605" name="507j10.1f"/>
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37
Arcade_MiST/Konami Jailbreak/meta/Mr. Goemon.mra
Normal file
37
Arcade_MiST/Konami Jailbreak/meta/Mr. Goemon.mra
Normal file
@@ -0,0 +1,37 @@
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<misterromdescription>
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<name>Mr. Goemon</name>
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<mameversion>0216</mameversion>
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<setname>mrgoemon</setname>
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<mratimestamp>201911270000</mratimestamp>
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<year>1985</year>
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<manufacturer>Konami</manufacturer>
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<rbf>jailbrek</rbf>
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<switches default="00,16,00" base="8" page_id="1" page_name="Switches">
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<dip bits="0,3" name="Credits A" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Free Play"/>
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<dip bits="4,7" name="Credits B" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Invalid"/>
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<dip bits="8,9" name="Lives" ids="2,3,5,7"/>
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<dip bits="10" name="Cabinet type" ids="Cocktail,Upright"/>
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<dip bits="11,12" name="Bonus" ids="20K/60K+,30K/70K+,40K/80K+,50K/90K+"/>
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<dip bits="13,14" name="Difficulty" ids="Easy,Normal,Hard,Hardest"/>
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<dip bits="15" name="Attract mode sound" ids="Off,On"/>
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<dip bits="16" name="Flip screen" ids="Off,On"/>
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<dip bits="17" name="Upright controls" ids="Single,Dual"/>
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</switches>
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<rom index="1"><part>1</part></rom>
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<rom index="0" zip="mrgoemon.zip" md5="61a1776255ef2a3aef4fc58a9cafbe29" type="merged">
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<part name="621d01.10c"/>
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<part name="621d02.12c"/>
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<part name="621a05.6d"/>
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<part name="621d03.4d"/>
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<part name="621d04.5d"/>
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<part name="621a07.6f"/>
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<part name="621a08.7f"/>
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<part name="621a06.5f"/>
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</rom>
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</misterromdescription>
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42
Arcade_MiST/Konami Jailbreak/meta/Rush'n Attack (US).mra
Normal file
42
Arcade_MiST/Konami Jailbreak/meta/Rush'n Attack (US).mra
Normal file
@@ -0,0 +1,42 @@
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<misterromdescription>
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<name>Rush'n Attack (US)</name>
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<mameversion>0216</mameversion>
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<setname>rushatck</setname>
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<mratimestamp>201911270000</mratimestamp>
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<year>1985</year>
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<manufacturer>Konami</manufacturer>
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<category>Army / Fighter</category>
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<rbf>jailbrek</rbf>
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<switches default="00,16,00" base="8" page_id="1" page_name="Switches">
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<dip bits="0,3" name="Credits A" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Free Play"/>
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<dip bits="4,7" name="Credits B" ids="1c/1cr,1c/2cr,1c/3cr,1c/4cr,1c/5cr,1c/6cr,1c/7cr,2c/1cr,2c/3cr,2c/5cr,3c/1cr,3c/2cr,3c/4cr,4c/1cr,4c/3cr,Invalid"/>
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<dip bits="8,9" name="Lives" ids="2,3,5,7"/>
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<dip bits="10" name="Cabinet type" ids="Cocktail,Upright"/>
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<dip bits="11,12" name="Bonus" ids="30K/70K+,40K/80K+,50K/100K+,50K/200K+"/>
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<dip bits="13,14" name="Difficulty" ids="Easy,Normal,Hard,Hardest"/>
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<dip bits="15" name="Attract mode sound" ids="Off,On"/>
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<dip bits="16" name="Flip screen" ids="Off,On"/>
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<dip bits="17" name="Upright controls" ids="Single,Dual"/>
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</switches>
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<rom index="1"><part>1</part></rom>
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<rom index="0" zip="gberet.zip" md5="7cf052f789644b08a05a63416e02423b" type="merged|nonmerged">
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<part name="rushatck/577h03.10c"/>
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<part name="rushatck/577h02.8c"/>
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<part name="rushatck/577h01.7c"/>
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<part repeat="0x4000">FF</part>
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<part name="rushatck/577h07.3f"/>
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<part name="577l06.5e"/>
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<part name="rushatck/577h05.4e"/>
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<part name="577l08.4f"/>
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<part name="577l04.3e"/>
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<part name="577h10.5f"/>
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<part name="577h11.6f"/>
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<part name="577h09.2f"/>
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</rom>
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</misterromdescription>
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@@ -32,7 +32,9 @@ module Jailbreak
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input [1:0] btn_start, //1 = Player 2, 0 = Player 1
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input [3:0] p1_joystick, p2_joystick, //3 = up, 2 = down, 1 = right, 0 = left
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input [1:0] p1_buttons, p2_buttons, //2 buttons per player
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input gberet, // Z80 board variant
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input [19:0] dipsw,
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//This input serves to select a fractional divider to acheive 3.072MHz for the YM2203 depending on whether Scooter Shooter
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@@ -150,7 +152,7 @@ jtframe_frac_cen sn76489_cen
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.cen({1'bZ, cen_1m5_adjust})
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);
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//------------------------------------------------------------ CPU -------------------------------------------------------------//
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//------------------------------------------------------------ CPU (KONAMI-1) ----------------------------------------------------------//
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//CPU - KONAMI-1 custom encrypted MC6809E (uses synchronous version of Greg Miller's cycle-accurate MC6809E made by
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//Sorgelig with a wrapper to decrypt XOR/XNOR-encrypted opcodes and a further modification to Greg's MC6809E to directly
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@@ -171,36 +173,105 @@ KONAMI1 u18F
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.nFIRQ(firq),
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.nNMI(nmi),
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.nHALT(~pause),
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.nRESET(reset)
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.nRESET(reset & !gberet)
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);
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//Address decoding for KONAMI-1
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wire cs_dip2 = ~n_iocs & (k1_A[10:8] == 3'b001) & k1_rw;
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wire cs_dip3 = ~n_iocs & (k1_A[10:8] == 3'b010) & k1_rw;
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wire cs_controls_dip1 = ~n_iocs & (k1_A[10:8] == 3'b011) & k1_rw;
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wire cs_snlatch = ~n_iocs & (k1_A[10:8] == 3'b001) & ~k1_rw;
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wire cs_sn76489 = ~n_iocs & (k1_A[10:8] == 3'b010) & ~k1_rw;
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wire cs_k005849 = (k1_A[15:14] == 2'b00);
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wire cs_vlm5030_busy = (k1_A[15:12] == 4'b0110);
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wire cs_rom1 = (k1_A[15:14] == 2'b10) & k1_rw;
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wire cs_rom2 = (k1_A[15:14] == 2'b11) & k1_rw;
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wire cs_k1_dip2 = ~n_iocs & (k1_A[10:8] == 3'b001) & k1_rw;
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wire cs_k1_dip3 = ~n_iocs & (k1_A[10:8] == 3'b010) & k1_rw;
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wire cs_k1_controls_dip1 = ~n_iocs & (k1_A[10:8] == 3'b011) & k1_rw;
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wire cs_k1_snlatch = ~n_iocs & (k1_A[10:8] == 3'b001) & ~k1_rw;
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wire cs_k1_sn76489 = ~n_iocs & (k1_A[10:8] == 3'b010) & ~k1_rw;
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wire cs_k1_k005849 = (k1_A[15:14] == 2'b00);
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wire cs_k1_vlm5030_busy = (k1_A[15:12] == 4'b0110);
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wire cs_k1_rom1 = (k1_A[15:14] == 2'b10) & k1_rw;
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wire cs_k1_rom2 = (k1_A[15:14] == 2'b11) & k1_rw;
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//Multiplex data inputs to KONAMI-1
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wire [7:0] k1_Din = cs_dip2 ? dipsw[15:8]:
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cs_dip3 ? {4'hF, dipsw[19:16]}:
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cs_controls_dip1 ? controls_dip1:
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(cs_k005849 & n_iocs & k1_rw) ? k005849_D:
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cs_vlm5030_busy ? {7'h7F, vlm5030_busy}:
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cs_rom1 ? eprom1_D:
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cs_rom2 ? eprom2_D:
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wire [7:0] k1_Din = cs_k1_dip2 ? dipsw[15:8]:
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cs_k1_dip3 ? {4'hF, dipsw[19:16]}:
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cs_k1_controls_dip1 ? controls_k1_dip1:
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(cs_k1_k005849 & n_iocs & k1_rw) ? k005849_D:
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cs_k1_vlm5030_busy ? {7'h7F, vlm5030_busy}:
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cs_k1_rom1 ? eprom1_D:
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cs_k1_rom2 ? eprom2_D:
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8'hFF;
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//KONAMI-1 ROMs
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//------------------------------------------------------------ CPU (Z80) ----------------------------------------------------------//
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wire z80_n_m1, z80_n_mreq, z80_n_iorq, z80_n_rfsh, z80_n_rd, z80_n_wr;
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wire [15:0] z80_A;
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wire [7:0] z80_Dout;
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T80s u9A
|
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(
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.RESET_n(reset & gberet),
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.CLK(clk_49m),
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.CEN(cen_3m & ~pause),
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.INT_n(z80_n_int),
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.NMI_n(z80_n_nmi),
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.MREQ_n(z80_n_mreq),
|
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.IORQ_n(z80_n_iorq),
|
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.RD_n(z80_n_rd),
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.WR_n(z80_n_wr),
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.M1_n(z80_n_m1),
|
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.RFSH_n(z80_n_rfsh),
|
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.A(z80_A),
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.DI(z80_Din),
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.DO(z80_Dout)
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);
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//Address decoding for Z80
|
||||
wire z80_decode_en = (z80_n_rfsh & ~z80_n_mreq);
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||||
wire cs_z80_dip2 = ~n_iocs & (z80_A[10:8] == 3'b010) & ~z80_n_rd;
|
||||
wire cs_z80_dip3 = ~n_iocs & (z80_A[10:8] == 3'b100) & ~z80_n_rd;
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wire cs_z80_controls_dip1 = ~n_iocs & (z80_A[10:8] == 3'b110) & ~z80_n_rd;
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wire cs_z80_snlatch = ~n_iocs & (z80_A[10:8] == 3'b010) & ~z80_n_wr;
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wire cs_z80_sn76489 = ~n_iocs & (z80_A[10:8] == 3'b100) & ~z80_n_wr;
|
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wire cs_z80_bankw = ~n_iocs & (z80_A[10:8] == 3'b000) & ~z80_n_wr;
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||||
wire cs_z80_k005849 = z80_decode_en & (z80_A[15:14] == 2'b11) & ~cs_z80_rom4;
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||||
wire cs_z80_rom1 = z80_decode_en & (z80_A[15:14] == 2'b00);
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||||
wire cs_z80_rom2 = z80_decode_en & (z80_A[15:14] == 2'b01);
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wire cs_z80_rom3 = z80_decode_en & (z80_A[15:14] == 2'b10);
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||||
wire cs_z80_rom4 = z80_decode_en & (z80_A[15:11] == 5'b11111);
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||||
|
||||
//Multiplex data inputs to Z80
|
||||
wire [7:0] z80_Din = cs_z80_dip2 ? dipsw[15:8]:
|
||||
cs_z80_dip3 ? {4'hF, dipsw[19:16]}:
|
||||
cs_z80_controls_dip1 ? controls_z80_dip1:
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||||
(cs_z80_k005849 & n_iocs & ~z80_n_rd) ? k005849_D:
|
||||
cs_z80_rom1 ? eprom1_D:
|
||||
cs_z80_rom2 ? eprom2_D:
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||||
cs_z80_rom3 ? eprom3_D:
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||||
cs_z80_rom4 ? eprom4_D:
|
||||
8'hFF;
|
||||
|
||||
wire z80_n_nmi = nmi;
|
||||
wire z80_n_int = firq & irq;
|
||||
|
||||
reg [2:0] z80_bank;
|
||||
always_ff @(posedge clk_49m)
|
||||
if (cs_z80_bankw) z80_bank <= z80_Dout[7:5];
|
||||
|
||||
// --------------------------------------------CPU BUS Selector----------------------------------------------------------//
|
||||
wire cs_snlatch = gberet ? cs_z80_snlatch : cs_k1_snlatch;
|
||||
wire cs_sn76489 = gberet ? cs_z80_sn76489 : cs_k1_sn76489;
|
||||
wire cs_k005849 = gberet ? cs_z80_k005849 : cs_k1_k005849;
|
||||
wire [15:0] cpu_A = gberet ? z80_A : k1_A;
|
||||
wire [7:0] cpu_Dout = gberet ? z80_Dout : k1_Dout;
|
||||
wire cpu_rw = gberet ? z80_n_wr : k1_rw;
|
||||
|
||||
// ----------------------------------------------------------------------------------------------------------------------//
|
||||
//CPU ROMs (first 16k)
|
||||
`ifdef EXT_ROM
|
||||
always_ff @(posedge clk_49m)
|
||||
if (k1_A[15] & k1_rw)
|
||||
main_cpu_rom_addr <= k1_A[14:0];
|
||||
if (gberet) begin
|
||||
if (z80_A[15:14] != 2'b11 & z80_decode_en & ~z80_n_rd) main_cpu_rom_addr <= z80_A;
|
||||
if (z80_A[15:11] == 5'b11111 & z80_decode_en & ~z80_n_rd) main_cpu_rom_addr <= {2'b11, z80_bank, z80_A[10:0]};
|
||||
end
|
||||
else begin
|
||||
if (k1_A[15] & k1_rw) main_cpu_rom_addr <= k1_A[14:0];
|
||||
end
|
||||
|
||||
wire [7:0] eprom1_D = main_cpu_rom_do;
|
||||
wire [7:0] eprom2_D = main_cpu_rom_do;
|
||||
//wire [7:0] eprom3_D = main_cpu_rom_do;
|
||||
wire [7:0] eprom4_D = main_cpu_rom_do;
|
||||
`else
|
||||
//ROM 1/2
|
||||
wire [7:0] eprom1_D;
|
||||
@@ -232,19 +303,23 @@ eprom_2 u9D
|
||||
|
||||
//Sound latch
|
||||
reg [7:0] sound_data = 8'd0;
|
||||
always_ff @(posedge clk_49m) begin
|
||||
if(cen_3m && cs_snlatch)
|
||||
sound_data <= k1_Dout;
|
||||
end
|
||||
always_ff @(posedge clk_49m)
|
||||
if(cs_snlatch) sound_data <= cpu_Dout;
|
||||
|
||||
//--------------------------------------------------- Controls & DIP switches --------------------------------------------------//
|
||||
|
||||
//Multiplex player inputs and DIP switch bank 1
|
||||
wire [7:0] controls_dip1 = (k1_A[1:0] == 2'b00) ? {3'b111, btn_start, btn_service, coin}:
|
||||
(k1_A[1:0] == 2'b01) ? {2'b11, p1_buttons, p1_joystick}:
|
||||
(k1_A[1:0] == 2'b10) ? {2'b11, p2_buttons, p2_joystick}:
|
||||
(k1_A[1:0] == 2'b11) ? dipsw[7:0]:
|
||||
8'hFF;
|
||||
wire [7:0] controls_k1_dip1 = (k1_A[1:0] == 2'b00) ? {3'b111, btn_start, btn_service, coin}:
|
||||
(k1_A[1:0] == 2'b01) ? {2'b11, p1_buttons, p1_joystick}:
|
||||
(k1_A[1:0] == 2'b10) ? {2'b11, p2_buttons, p2_joystick}:
|
||||
(k1_A[1:0] == 2'b11) ? dipsw[7:0]:
|
||||
8'hFF;
|
||||
|
||||
wire [7:0] controls_z80_dip1 = (z80_A[1:0] == 2'b11) ? {3'b111, btn_start, btn_service, coin}:
|
||||
(z80_A[1:0] == 2'b10) ? {2'b11, p1_buttons, p1_joystick}:
|
||||
(z80_A[1:0] == 2'b01) ? {2'b11, p2_buttons, p2_joystick}:
|
||||
(z80_A[1:0] == 2'b00) ? dipsw[7:0]:
|
||||
8'hFF;
|
||||
|
||||
//--------------------------------------------------- Video timing & graphics --------------------------------------------------//
|
||||
|
||||
@@ -260,9 +335,9 @@ k005849 u8E
|
||||
(
|
||||
.CK49(clk_49m),
|
||||
.RES(reset),
|
||||
.READ(~k1_rw),
|
||||
.A(k1_A[13:0]),
|
||||
.DBi(k1_Dout),
|
||||
.READ(~cpu_rw),
|
||||
.A(cpu_A[13:0]),
|
||||
.DBi(cpu_Dout),
|
||||
.DBo(k005849_D),
|
||||
.VCF(tilemap_lut_A[7:4]),
|
||||
.VCB(tilemap_lut_A[3:0]),
|
||||
@@ -290,7 +365,7 @@ k005849 u8E
|
||||
.SD(spriterom_D),
|
||||
.HCTR(h_center),
|
||||
.VCTR(v_center),
|
||||
.SPFL(1),
|
||||
.SPFL(gberet),
|
||||
|
||||
.hs_address(hs_address),
|
||||
.hs_data_out(hs_data_out),
|
||||
@@ -303,22 +378,11 @@ k005849 u8E
|
||||
`ifdef EXT_ROM
|
||||
assign sp1_rom_addr = spriterom_A[15:1];
|
||||
wire [7:0] spriterom_D = spriterom_A[0] ? sp1_rom_do[15:8] : sp1_rom_do[7:0];
|
||||
assign char1_rom_addr = tilerom_A[14:1];
|
||||
assign char1_rom_addr = {gberet ? 1'b1 : tilerom_A[14], tilerom_A[13:1]};
|
||||
wire [7:0] tilerom_D = tilerom_A[0] ? char1_rom_do[15:8] : char1_rom_do[7:0];
|
||||
`else
|
||||
wire [7:0] eprom3_D, eprom4_D, eprom5_D, eprom6_D, eprom7_D, eprom8_D;
|
||||
eprom_3 u4F
|
||||
(
|
||||
.ADDR(tilerom_A[13:0]),
|
||||
.CLK(clk_49m),
|
||||
.DATA(eprom3_D),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
.DATA_IN(ioctl_data),
|
||||
.CS_DL(ep3_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_4 u5F
|
||||
wire [7:0] eprom4_D, eprom5_D, eprom6_D, eprom7_D, eprom8_D, eprom9_D;
|
||||
eprom_4 u4F
|
||||
(
|
||||
.ADDR(tilerom_A[13:0]),
|
||||
.CLK(clk_49m),
|
||||
@@ -329,10 +393,10 @@ eprom_4 u5F
|
||||
.CS_DL(ep4_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_5 u3E
|
||||
eprom_5 u5F
|
||||
(
|
||||
.ADDR(spriterom_A[13:0]),
|
||||
.CLK(~clk_49m),
|
||||
.ADDR(tilerom_A[13:0]),
|
||||
.CLK(clk_49m),
|
||||
.DATA(eprom5_D),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
@@ -340,7 +404,7 @@ eprom_5 u3E
|
||||
.CS_DL(ep5_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_6 u4E
|
||||
eprom_6 u3E
|
||||
(
|
||||
.ADDR(spriterom_A[13:0]),
|
||||
.CLK(~clk_49m),
|
||||
@@ -351,7 +415,7 @@ eprom_6 u4E
|
||||
.CS_DL(ep6_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_7 u5E
|
||||
eprom_7 u4E
|
||||
(
|
||||
.ADDR(spriterom_A[13:0]),
|
||||
.CLK(~clk_49m),
|
||||
@@ -362,7 +426,7 @@ eprom_7 u5E
|
||||
.CS_DL(ep7_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_8 u3F
|
||||
eprom_8 u5E
|
||||
(
|
||||
.ADDR(spriterom_A[13:0]),
|
||||
.CLK(~clk_49m),
|
||||
@@ -373,15 +437,26 @@ eprom_8 u3F
|
||||
.CS_DL(ep8_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
eprom_9 u3F
|
||||
(
|
||||
.ADDR(spriterom_A[13:0]),
|
||||
.CLK(~clk_49m),
|
||||
.DATA(eprom9_D),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
.DATA_IN(ioctl_data),
|
||||
.CS_DL(ep9_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
|
||||
//Multiplex tilemap ROMs
|
||||
wire [7:0] tilerom_D = tilerom_A[14] ? eprom4_D : eprom3_D;
|
||||
wire [7:0] tilerom_D = (gberet | tilerom_A[14]) ? eprom5_D : eprom4_D;
|
||||
|
||||
//Multiplex sprite ROMs
|
||||
wire [7:0] spriterom_D = (spriterom_A[15:14] == 2'b00) ? eprom5_D:
|
||||
(spriterom_A[15:14] == 2'b01) ? eprom6_D:
|
||||
(spriterom_A[15:14] == 2'b10) ? eprom7_D:
|
||||
(spriterom_A[15:14] == 2'b11) ? eprom8_D:
|
||||
wire [7:0] spriterom_D = (spriterom_A[15:14] == 2'b00) ? eprom6_D:
|
||||
(spriterom_A[15:14] == 2'b01) ? eprom7_D:
|
||||
(spriterom_A[15:14] == 2'b10) ? eprom8_D:
|
||||
(spriterom_A[15:14] == 2'b11) ? eprom9_D:
|
||||
8'hFF;
|
||||
`endif
|
||||
|
||||
@@ -457,17 +532,17 @@ vlm5030_gl u6A
|
||||
.o_audio(vlm5030_raw)
|
||||
);
|
||||
|
||||
//VLM5030 ROM
|
||||
wire [7:0] eprom9_D;
|
||||
eprom_9 u8C
|
||||
//VLM5030 ROM (8000-bfff CPU ROM on Greeb Beret/Mr.Goemon)
|
||||
wire [7:0] eprom3_D;
|
||||
eprom_3 u8C
|
||||
(
|
||||
.ADDR(vlm5030_rom_A),
|
||||
.ADDR(gberet ? cpu_A[13:0] : vlm5030_rom_A),
|
||||
.CLK(clk_49m),
|
||||
.DATA(eprom9_D),
|
||||
.DATA(eprom3_D),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
.DATA_IN(ioctl_data),
|
||||
.CS_DL(ep9_cs_i),
|
||||
.CS_DL(ep3_cs_i),
|
||||
.WR(ioctl_wr)
|
||||
);
|
||||
|
||||
@@ -496,17 +571,22 @@ end
|
||||
|
||||
//Multiplex data inputs from the ROM and KONAMI-1 to the VLM5030's data input
|
||||
wire [7:0] vlm5030_Din = vlm5030_enable ? vlm5030_sound_D:
|
||||
~n_vlm5030_rom_en ? eprom9_D:
|
||||
~n_vlm5030_rom_en ? eprom3_D:
|
||||
8'hFF;
|
||||
|
||||
//----------------------------------------------------- Final video output -----------------------------------------------------//
|
||||
|
||||
//Jailbreak's final video output consists of two PROMs addressed by the 005849 custom tilemap generator
|
||||
wire [7:0] prom1_d, prom2_d;
|
||||
assign video_r = gberet ? {prom1_d[2:0], prom1_d[2]} : prom1_d[3:0];
|
||||
assign video_g = gberet ? {prom1_d[5:3], prom1_d[5]} : prom1_d[7:4];
|
||||
assign video_b = gberet ? {prom1_d[7:6], prom1_d[7:6]} : prom2_d[3:0];
|
||||
|
||||
color_prom_1 u1F
|
||||
(
|
||||
.ADDR(color_A),
|
||||
.CLK(clk_49m),
|
||||
.DATA({video_g, video_r}),
|
||||
.DATA(prom1_d),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
.DATA_IN(ioctl_data),
|
||||
@@ -518,7 +598,7 @@ color_prom_2 u2F
|
||||
(
|
||||
.ADDR(color_A),
|
||||
.CLK(clk_49m),
|
||||
.DATA(video_b),
|
||||
.DATA(prom2_d),
|
||||
.ADDR_DL(ioctl_addr),
|
||||
.CLK_DL(clk_49m),
|
||||
.DATA_IN(ioctl_data),
|
||||
|
||||
@@ -52,6 +52,7 @@ wire pause = status[1];
|
||||
|
||||
wire [1:0] orientation = 2'b10;
|
||||
wire [23:0] dip_sw = ~status[31:8];
|
||||
wire gberet = core_mod[0];
|
||||
|
||||
assign LED = ~ioctl_downl;
|
||||
assign SDRAM_CLK = clock_98;
|
||||
@@ -124,7 +125,7 @@ data_io data_io(
|
||||
.ioctl_addr ( ioctl_addr ),
|
||||
.ioctl_dout ( ioctl_dout )
|
||||
);
|
||||
wire [24:0] bg_ioctl_addr = ioctl_addr - 16'h8000;
|
||||
wire [24:0] bg_ioctl_addr = ioctl_addr - 16'hc000;
|
||||
|
||||
reg port1_req, port2_req;
|
||||
sdram #(98) sdram(
|
||||
@@ -211,7 +212,9 @@ Jailbreak Jailbreak_inst
|
||||
.p2_joystick({~m_down2 | m_up2, ~m_up2, ~m_right2 | m_left2, ~m_left2}),
|
||||
.p1_buttons({~m_fireB, ~m_fireA}),
|
||||
.p2_buttons({~m_fire2B, ~m_fire2A}),
|
||||
|
||||
|
||||
.gberet(gberet),
|
||||
|
||||
.dipsw(dip_sw), // input [24:0] dipsw
|
||||
|
||||
.sound(audio), // output [15:0] sound
|
||||
|
||||
@@ -148,23 +148,21 @@ reg hblank = 0;
|
||||
reg vblank = 0;
|
||||
|
||||
reg frame_odd_even = 0;
|
||||
reg hmask = 0;
|
||||
always_ff @(posedge CK49) begin
|
||||
if(cen_6m) begin
|
||||
case(h_cnt)
|
||||
5: begin
|
||||
hblank <= 0;
|
||||
hblank <= hmask_en;
|
||||
h_cnt <= h_cnt + 9'd1;
|
||||
end
|
||||
13: begin
|
||||
hmask <= 0;
|
||||
hblank <= 0;
|
||||
h_cnt <= h_cnt + 9'd1;
|
||||
end
|
||||
//Blank the left-most and right-most 8 lines when the 005849's horizontal mask register bit
|
||||
//(register 3 bit 7) is active
|
||||
253: begin
|
||||
if(hmask_en)
|
||||
hmask <= 1;
|
||||
hblank <= hmask_en;
|
||||
h_cnt <= h_cnt + 9'd1;
|
||||
end
|
||||
261: begin
|
||||
@@ -205,9 +203,9 @@ assign SYNC = HSYC ^ VSYC;
|
||||
|
||||
//------------------------------------------------------------- IRQs -----------------------------------------------------------//
|
||||
//Edge detection for VBlank and vertical counter bit 5 for IRQ generation
|
||||
reg old_vblank, old_vcnt5;
|
||||
reg old_vblank, old_vcnt4;
|
||||
always_ff @(posedge CK49) begin
|
||||
old_vcnt5 <= v_cnt[5];
|
||||
old_vcnt4 <= v_cnt[4];
|
||||
old_vblank <= vblank;
|
||||
end
|
||||
|
||||
@@ -228,7 +226,7 @@ always_ff @(posedge CK49) begin
|
||||
if(!RES || !nmi_mask)
|
||||
nmi <= 1;
|
||||
else begin
|
||||
if(old_vcnt5 && !v_cnt[5])
|
||||
if(old_vcnt4 && !v_cnt[4])
|
||||
nmi <= 0;
|
||||
end
|
||||
end
|
||||
@@ -410,14 +408,17 @@ dpram_dc #(.widthad_a(12)) VRAM_SPR_SHADOW
|
||||
|
||||
//-------------------------------------------------------- Tilemap layer -------------------------------------------------------//
|
||||
|
||||
//**The following code is the original tilemap renderer from MiSTerX's Green Beret core with some minor tweaks**//
|
||||
//**The following code id based on the original tilemap renderer from MiSTerX's Green Beret core with some minor tweaks**//
|
||||
//**Added proper pipelining of external ROM data //**
|
||||
|
||||
//XOR horizontal and vertical counter bits with flipscreen bit
|
||||
wire [8:0] hcnt_x = h_cnt ^ {9{flipscreen}};
|
||||
wire [8:0] vcnt_x = v_cnt ^ {9{flipscreen}};
|
||||
|
||||
//Generate tilemap position - horizontal position is the sum of the horizontal counter, vertical position is the vertical counter
|
||||
//
|
||||
wire [8:0] tilemap_hpos = {h_cnt[8], hcnt_x[7:0]} + (~zram_scroll_dir ? {zram1_D[0], zram0_D} : 9'd0);
|
||||
wire [8:0] xscroll = (~zram_scroll_dir ? {zram1_D[0], zram0_D} : 9'd0);
|
||||
wire [8:0] tilemap_hpos = {h_cnt[8], hcnt_x[7:0]} + xscroll;
|
||||
wire [8:0] tilemap_vpos = vcnt_x + (zram_scroll_dir ? {zram1_D[0], zram0_D} : 9'd0);
|
||||
|
||||
//Address output to tile section of VRAM
|
||||
@@ -431,7 +432,7 @@ wire [10:0] tile_index = {tilemap_bank, tileram_attrib_D[7:6], tileram_code_D};
|
||||
wire [3:0] tile_color = tileram_attrib_D[3:0];
|
||||
reg [3:0] tile_color_r, tile_color_rr;
|
||||
reg tile_attrib7_r, tile_attrib7_rr;
|
||||
reg tile_hflip_r;
|
||||
reg tile_hflip_r, tile_hflip_rr;
|
||||
reg [7:0] RD_r;
|
||||
|
||||
//Tile flip attributes are stored in bits 4 (horizontal) and 5 (vertical)
|
||||
@@ -445,37 +446,37 @@ always_ff @(posedge CK49) begin
|
||||
R <= {tile_index, (tilemap_vpos[2:0] ^ {3{tile_vflip}}), (tilemap_hpos[2:1] ^ {2{tile_hflip}})};
|
||||
// Apply appropriate delay to flags
|
||||
tile_hflip_r <= tile_hflip;
|
||||
tile_hflip_rr <= tile_hflip_r;
|
||||
tile_color_r <= tile_color;
|
||||
tile_color_rr <= tile_color_r;
|
||||
tile_attrib7_r <= tileram_attrib_D[7];
|
||||
tile_attrib7_rr <= tile_attrib7_r;
|
||||
// latch tile ROM output
|
||||
RD_r <= RD;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//Multiplex tilemap ROM data down from 8 bits to 4 using bit 0 of the horizontal position
|
||||
wire [3:0] tile_pixel = (tilemap_hpos[0] ^ tile_hflip_r) ? RD_r[3:0] : RD_r[7:4];
|
||||
wire [3:0] tile_pixel = (hcnt_x[0] ^ tile_hflip_rr) ? RD_r[3:0] : RD_r[7:4];
|
||||
|
||||
//Retrieve tilemap select bit from the NOR of bit 7 of the tile attributes with the priority override bit
|
||||
reg tilemap_en = 0;
|
||||
always_ff @(posedge CK49) begin
|
||||
if(cen_6m) begin
|
||||
tilemap_en <= ~(tile_attrib7_rr | tile_priority_override);
|
||||
end
|
||||
end
|
||||
wire tilemap_force = ~(tile_attrib7_rr | tile_priority_override) & |tilemap_D;
|
||||
|
||||
//Address output to tilemap LUT PROM
|
||||
assign VCF = tile_color_rr;
|
||||
assign VCB = tile_pixel;
|
||||
reg [3:0] pix0, pix1;
|
||||
|
||||
//Delay tilemap data by one horizontal line
|
||||
reg [3:0] tilemap_D = 4'd0;
|
||||
always_ff @(posedge CK49) begin
|
||||
if(cen_6m)
|
||||
tilemap_D <= VCD;
|
||||
if(cen_6m) begin
|
||||
pix0 <= VCD;
|
||||
pix1 <= pix0;
|
||||
end
|
||||
end
|
||||
|
||||
wire [3:0] tilemap_D = xscroll[0] ? pix1 : pix0;
|
||||
|
||||
//-------------------------------------------------------- Sprite layer --------------------------------------------------------//
|
||||
|
||||
//The following code is the original sprite renderer from MiSTerX's Green Beret core with additional screen flipping support and
|
||||
@@ -506,14 +507,14 @@ always_ff @(posedge CK49) begin
|
||||
sprite_fsm_state <= 0;
|
||||
//When the sprite Y attribute is set to 0, skip the current sprite, otherwise obtain the sprite Y attribute
|
||||
//and scan out the other sprite attributes
|
||||
else begin
|
||||
if(hy) begin
|
||||
sprite_attrib3 <= spriteram_D;
|
||||
sprite_offset <= 2;
|
||||
sprite_fsm_state <= sprite_fsm_state + 3'd1;
|
||||
end
|
||||
else sprite_index <= sprite_index + 6'd1;
|
||||
else begin
|
||||
if(hy) begin
|
||||
sprite_attrib3 <= spriteram_D;
|
||||
sprite_offset <= 2;
|
||||
sprite_fsm_state <= sprite_fsm_state + 3'd1;
|
||||
end
|
||||
else sprite_index <= sprite_index + 6'd1;
|
||||
end
|
||||
end
|
||||
2: begin
|
||||
sprite_attrib2 <= spriteram_D;
|
||||
@@ -536,7 +537,8 @@ always_ff @(posedge CK49) begin
|
||||
5: if (S_req == S_ack) begin
|
||||
xcnt <= xcnt + 5'd1;
|
||||
sprite_fsm_state <= wre ? sprite_fsm_state : 3'd1;
|
||||
S_req <= (wre & xcnt[0]) ? !S_req : S_req;
|
||||
// request external memory access in every 4 pixels (16 bits)
|
||||
S_req <= (wre & xcnt[1:0] == 2'b11) ? !S_req : S_req;
|
||||
end
|
||||
default:;
|
||||
endcase
|
||||
@@ -544,7 +546,7 @@ end
|
||||
|
||||
//Subtract sprite attribute byte 2 with bit 7 of sprite attribute byte 1 to obtain sprite X position and XOR with the
|
||||
//flipscreen bit
|
||||
wire [8:0] sprite_x = ({1'b0, sprite_attrib2} - {sprite_attrib1[7], 8'h00}) ^ {9{flipscreen}};
|
||||
wire [8:0] sprite_x = ({1'b0, sprite_attrib2} - {sprite_attrib1[7], 8'h00} + 3'd5) ^ {9{flipscreen}};
|
||||
|
||||
//If the sprite state machine is in state 1, obtain sprite Y position directly from sprite RAM, otherwise obtain it from
|
||||
//sprite attribute byte 3 and XOR with the flipscreen bit
|
||||
@@ -573,18 +575,7 @@ assign S = {sprite_code, ly[3], lx[3], ly[2:0], lx[2:1]};
|
||||
//Multiplex sprite ROM data down from 8 bits to 4 using bit 0 of the horizontal position
|
||||
wire [3:0] sprite_pixel = lx[0] ? SD[3:0] : SD[7:4];
|
||||
|
||||
//Latch the sprite bank from bit 3 of register 3 on the rising edge of VSync and XNOR with the added SPFL signal to flip this bit
|
||||
//for Green Beret
|
||||
//TODO: Find the actual internal register bit (if any) on the 005849 to properly handle this
|
||||
reg sprite_bank = 0;
|
||||
reg old_vsync;
|
||||
always_ff @(posedge CK49) begin
|
||||
old_vsync <= VSYC;
|
||||
if(!VSYC)
|
||||
sprite_bank <= 0;
|
||||
else if(!old_vsync && VSYC)
|
||||
sprite_bank <= ~(reg3[3] ^ SPFL);
|
||||
end
|
||||
wire sprite_bank = reg3[3] ^ SPFL;
|
||||
|
||||
wire [11:0] spriteram_A = {3'b000, sprite_bank, sprite_index, sprite_offset};
|
||||
|
||||
@@ -654,17 +645,17 @@ end
|
||||
//--------------------------------------------------------- Color mixer --------------------------------------------------------//
|
||||
|
||||
//Multiplex tile and sprite data, then output the final result
|
||||
wire tile_sprite_sel = (tilemap_en | ~(|sprite_D));
|
||||
wire [3:0] tile_sprite_D = tile_sprite_sel ? tilemap_D : sprite_D;
|
||||
wire tile_bg_sel = tilemap_force | ~(|sprite_D);
|
||||
wire [3:0] tile_pix_D = tile_bg_sel ? tilemap_D : sprite_D;
|
||||
|
||||
//Latch and output pixel data
|
||||
reg [4:0] pixel_D;
|
||||
always_ff @(posedge CK49) begin
|
||||
if(cen_6m)
|
||||
pixel_D <= {tile_sprite_sel, tile_sprite_D};
|
||||
pixel_D <= {tile_bg_sel, tile_pix_D};
|
||||
end
|
||||
//If the horizontal mask is active, black out the left-most and right-most 8 columns to limit the display area to 240x224, otherwise
|
||||
//output the full 256x224
|
||||
assign COL = hmask ? 5'd0 : pixel_D;
|
||||
assign COL = pixel_D;
|
||||
|
||||
endmodule
|
||||
|
||||
@@ -91,6 +91,7 @@ begin
|
||||
reg_q <= (others => '0');
|
||||
we_q <= false;
|
||||
ready_q <= '0';
|
||||
we_n_d <= '1';
|
||||
|
||||
elsif clock_i'event and clock_i = '1' then
|
||||
if clk_en_i then
|
||||
|
||||
Reference in New Issue
Block a user