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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-20 17:47:33 +00:00

IremM62: add second tilemap for all, except Lot Lot

This commit is contained in:
Gyorgy Szombathelyi 2020-03-13 16:26:49 +01:00
parent 6984dcc5a0
commit 33078f6ce8
6 changed files with 208 additions and 68 deletions

View File

@ -5,7 +5,7 @@
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>7</part></rom>
<rom index="0" zip="kidniki.zip" md5="e4dd9d396dd574a11189c2183cf4cead" type="merged|nonmerged">
<rom index="0" zip="kidniki.zip" md5="63cf7764a51bae694ce95dfe518a96f3" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="ky_a-4e-g.bin"/>
<part name="dr03.4cd"/>
@ -54,10 +54,10 @@
<!-- GFX3, 64k -->
<group width="32">
<part name="dr08.4l"/>
<part name="dr10.4n"/>
<part name="dr09.4m"/>
<part name="dr10.4n"/>
<part name="dr10.4n"/>
<part name="dr08.4l"/>
<part name="dr08.4l"/>
</group>
<!-- spr_color_proms, 3*256b -->
@ -70,8 +70,10 @@
<part name="dr26.3h"/>
<part name="dr27.3j"/>
<!-- fg_color_proms, 3*256b br-c-1j -->
<part repeat="0x300">FF</part>
<!-- fg_color_proms, 3*256b -->
<part name="dr25.3f"/>
<part name="dr26.3h"/>
<part name="dr27.3j"/>
<!-- spr_height_prom -->
<part name="dr32.5p"/>

View File

@ -5,7 +5,7 @@
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>0A</part></rom>
<rom index="0" zip="spelunk2.zip" md5="4cf89df14a6987d1418ffe1fcb397d8e" type="merged|nonmerged">
<rom index="0" zip="spelunk2.zip" md5="5052a1aaf3f39b0a40babfcc00e9652d" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="sp2-a.4e"/>
<part name="sp2-a.4d"/>
@ -57,10 +57,10 @@
<!-- GFX3, 64k -->
<group width="32">
<part name="sp2-r.4l"/>
<part name="sp2-r.4p"/>
<part name="sp2-r.4m"/>
<part name="sp2-r.4p"/>
<part name="sp2-r.4p"/>
<part name="sp2-r.4l"/>
<part name="sp2-r.4l"/>
</group>
<!-- spr_color_proms, 3*256b -->
@ -71,7 +71,6 @@
<!-- chr_color_proms, 3*256b -->
<part name="sp2-r.1k"/>
<part name="sp2-r.2k"/>
<!--part name="sp2-r.2j"/-->
<!-- fg_color_proms, 3*256b -->
<part name="sp2-r.2j"/>

View File

@ -5,7 +5,7 @@
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>9</part></rom>
<rom index="0" zip="spelunkr.zip" md5="dbd20cd8f5d2555911090e62e4621920" type="merged|nonmerged">
<rom index="0" zip="spelunkr.zip" md5="ec64e30638077a75ff9f6698494057fc" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="spra.4e"/>
<part name="spra.4d"/>
@ -61,10 +61,10 @@
<!-- GFX3, 64k -->
<group width="32">
<part name="sprm.4p"/>
<part name="sprm.4m"/>
<part name="sprm.4l"/>
<part name="sprm.4m"/>
<part name="sprm.4m"/>
<part name="sprm.4p"/>
<part name="sprm.4p"/>
</group>
<!-- spr_color_proms, 3*256b -->
@ -78,7 +78,9 @@
<part name="sprm.2h"/>
<!-- fg_color_proms, 3*256b -->
<part repeat="0x300">FF</part>
<part name="sprm.2k"/>
<part name="sprm.2j"/>
<part name="sprm.2h"/>
<!-- spr_height_prom -->
<part name="sprb.5p"/>

View File

@ -5,7 +5,7 @@
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>0B</part></rom>
<rom index="0" zip="youjyudn.zip" md5="065dce1c43e588ff6319a2c2ac0951a8" type="merged|nonmerged">
<rom index="0" zip="youjyudn.zip" md5="88142ed9adb6ffff9643cc7fa6bae82b" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="yju_a4eb.bin"/>
<part name="yju_a4db.bin"/>
@ -55,10 +55,10 @@
<!-- GFX3, 64k -->
<group width="32">
<part name="yju_p4lb.2"/>
<part name="yju_p4pb.0"/>
<part name="yju_p4mb.1"/>
<part name="yju_p4pb.0"/>
<part name="yju_p4pb.0"/>
<part name="yju_p4lb.2"/>
<part name="yju_p4lb.2"/>
</group>
<!-- spr_color_proms, 3*256b -->
@ -72,7 +72,9 @@
<part name="yju_p2hb.bpr"/>
<!-- fg_color_proms, 3*256b -->
<part repeat="0x300">FF</part>
<part name="yju_p2jb.bpr"/>
<part name="yju_p2kb.bpr"/>
<part name="yju_p2hb.bpr"/>
<!-- spr_height_prom -->
<part name="yju_b-5p.bpr"/>

View File

@ -137,7 +137,11 @@ architecture SYN of platform is
signal pal_b_q : std_logic_vector(7 downto 0);
signal pal2_r_wr : std_logic;
signal pal2_g_wr : std_logic;
signal pal2_b_wr : std_logic;
signal pal2_r_q : std_logic_vector(7 downto 0);
signal pal2_g_q : std_logic_vector(7 downto 0);
signal pal2_b_q : std_logic_vector(7 downto 0);
signal tilemap2_pal_a : std_logic_vector(7 downto 0);
-- other signals
@ -546,6 +550,7 @@ begin
end process;
graphics_o.bit16(0) <= scrollram_d_o when hwsel = HW_HORIZON else m62_hscroll;
graphics_o.bit16(1) <= m62_vscroll;
graphics_o.bit16(2) <= m62_vscroll2;
end block BLK_SCROLL;
@ -634,7 +639,7 @@ begin
alias cram_a : std_logic_vector(11 downto 0) is vram_a;
begin
textram_a <= '0' & cpu_a(10 downto 0) when hwsel = HW_BATTROAD else cpu_a(11 downto 0);
textram_a <= '0' & cpu_a(10 downto 0) when hwsel = HW_BATTROAD or hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 or hwsel = HW_YOUJYUDN else cpu_a(11 downto 0);
vram_a <= '0' & cpu_a(10 downto 0) when hwsel = HW_KUNGFUM else
cpu_a(12 downto 1) when hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 else
@ -731,7 +736,8 @@ begin
-- tilemap 1 palette address
tilemap1_pal_a <= spelunkr_palbank & tilemap_i(1).pal_a(6 downto 0) when hwsel = HW_SPELUNKR else
spelunk2_palbank(0) & tilemap_i(1).pal_a(6 downto 0) when hwsel = HW_SPELUNK2 else
spelunk2_palbank(0) & tilemap_i(1).pal_a(6 downto 0) when hwsel = HW_SPELUNK2 and tilemap_i(2).set = '0' else
spelunk2_palbank(0) & tilemap_i(2).pal_a(6 downto 0) when hwsel = HW_SPELUNK2 and tilemap_i(2).set = '1' else
'0' & tilemap_i(1).pal_a(6 downto 0) when hwsel = HW_BATTROAD else
tilemap_i(1).pal_a(7 downto 0);
@ -820,11 +826,18 @@ begin
-- tilemap 2 palette address
-- Use this for Spelunk2's second blue ROM, too
tilemap2_pal_a <= spelunk2_palbank(0) & tilemap_i(1).pal_a(6 downto 0) when hwsel = HW_SPELUNK2 else
'1' & tilemap_i(2).pal_a(6 downto 0) when hwsel = HW_YOUJYUDN else
tilemap_i(2).pal_a(7 downto 0);
tilemap_o(2).rgb.r(9 downto 2) <= pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6);
tilemap_o(2).rgb.g(9 downto 2) <= pal2_r_q(5 downto 3) & pal2_r_q(5 downto 3) & pal2_r_q(5 downto 4);
tilemap_o(2).rgb.b(9 downto 2) <= pal2_r_q(2 downto 0) & pal2_r_q(2 downto 0) & pal2_r_q(2 downto 1);
tilemap_o(2).rgb.r(9 downto 2) <= pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6) & pal2_r_q(7 downto 6) when hwsel = HW_BATTROAD else
tilemap_o(1).rgb.r(9 downto 2) when hwsel = HW_SPELUNK2 else
pal2_r_q(3 downto 0) & pal2_r_q(3 downto 0);
tilemap_o(2).rgb.g(9 downto 2) <= pal2_r_q(5 downto 3) & pal2_r_q(5 downto 3) & pal2_r_q(5 downto 4) when hwsel = HW_BATTROAD else
tilemap_o(1).rgb.g(9 downto 2) when hwsel = HW_SPELUNK2 else
pal2_g_q(3 downto 0) & pal2_g_q(3 downto 0);
tilemap_o(2).rgb.b(9 downto 2) <= pal2_r_q(2 downto 0) & pal2_r_q(2 downto 0) & pal2_r_q(2 downto 1) when hwsel = HW_BATTROAD else
tilemap_o(1).rgb.b(9 downto 2) when hwsel = HW_SPELUNK2 else
pal2_b_q(3 downto 0) & pal2_b_q(3 downto 0);
-- tilemap 2 palettes
pal2_r : entity work.dpram
@ -850,6 +863,52 @@ begin
);
pal2_r_wr <= '1' when dl_wr = '1' and dl_addr(11 downto 8) = x"6" else '0'; -- 600-6FF
pal2_g : entity work.dpram
generic map
(
init_file => "",
widthad_a => 8,
widthad_b => 8
)
port map
(
clock_b => clk_sys,
address_b => dl_addr(7 downto 0),
wren_b => pal2_g_wr,
data_b => dl_data,
q_b => open,
clock_a => not clk_video,
address_a => tilemap2_pal_a,
wren_a => '0',
data_a => (others => 'X'),
q_a => pal2_g_q
);
pal2_g_wr <= '1' when dl_wr = '1' and dl_addr(11 downto 8) = x"7" else '0'; -- 700-7FF
pal2_b : entity work.dpram
generic map
(
init_file => "",
widthad_a => 8,
widthad_b => 8
)
port map
(
clock_b => clk_sys,
address_b => dl_addr(7 downto 0),
wren_b => pal2_b_wr,
data_b => dl_data,
q_b => open,
clock_a => not clk_video,
address_a => tilemap2_pal_a,
wren_a => '0',
data_a => (others => 'X'),
q_a => pal2_b_q
);
pal2_b_wr <= '1' when dl_wr = '1' and dl_addr(11 downto 8) = x"8" else '0'; -- 800-8FF
-- sprite palette address
sprite_pal_a <= '0' & sprite_i.pal_a(6 downto 0) when
hwsel = HW_LDRUN or

View File

@ -205,10 +205,12 @@ architecture TILEMAP_2 of tilemapCtl is
signal x : std_logic_vector(video_ctl.x'range);
signal y : std_logic_vector(video_ctl.y'range);
signal x12 : unsigned(3 downto 0);
signal xtile : unsigned(4 downto 0);
alias rot_en : std_logic is graphics_i.bit8(0)(0);
alias hscroll : std_logic_vector(15 downto 0) is graphics_i.bit16(0);
alias vscroll : std_logic_vector(15 downto 0) is graphics_i.bit16(1);
alias vscroll : std_logic_vector(15 downto 0) is graphics_i.bit16(2);
begin
@ -216,14 +218,15 @@ begin
--ctl_o.rgb.r <= x"aa"&"10";
-- not used
ctl_o.map_a(ctl_o.map_a'left downto 10) <= (others => '0');
ctl_o.attr_a(ctl_o.attr_a'left downto 10) <= (others => '0');
ctl_o.map_a(ctl_o.map_a'left downto 11) <= (others => '0');
ctl_o.attr_a(ctl_o.attr_a'left downto 11) <= (others => '0');
ctl_o.tile_a(ctl_o.tile_a'left downto 15) <= (others => '0');
-- tilemap scroll
x <= std_logic_vector(unsigned(video_ctl.x) - 256 + 64 + 8) when hires = '1' else
std_logic_vector(unsigned(video_ctl.x) - 256 + 8);
y <= std_logic_vector(unsigned(video_ctl.y) - 256 + 128) when hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 else
y <= std_logic_vector(unsigned(video_ctl.y) - 256) when hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 else
std_logic_vector(unsigned(video_ctl.y) - 256 + 128 + unsigned(vscroll(8 downto 0))) when hwsel = HW_KIDNIKI else
std_logic_vector(unsigned(video_ctl.y) - 256);
-- generate pixel
@ -235,52 +238,125 @@ begin
variable pel : std_logic_vector(2 downto 0);
begin
if rising_edge(clk) then
if clk_ena = '1' then
-- 1st stage of pipeline
-- - set tilemap, attribute address
if x(2 downto 0) = "000" then
ctl_o.tile_a(14) <= '0';
if hwsel = HW_BATTROAD then
-- 8x8 tiles, 32x32 tilemap
ctl_o.map_a(9 downto 5) <= y(7 downto 3);
ctl_o.attr_a(9 downto 5) <= y(7 downto 3);
ctl_o.map_a(4 downto 0) <= x(7 downto 3);
ctl_o.attr_a(4 downto 0) <= x(7 downto 3);
end if;
-- 2nd stage of pipeline
-- - set tile address
if x(2 downto 0) = "001" then
ctl_o.tile_a(14) <= '0';
ctl_o.tile_a(13) <= '0';
ctl_o.tile_a(12 downto 11) <= ctl_i.attr_d(6) & ctl_i.attr_d(4);
ctl_o.tile_a(10 downto 3) <= ctl_i.map_d(7 downto 0);
ctl_o.tile_a(2 downto 0) <= y(2 downto 0);
end if;
-- 1st stage of pipeline
-- - set tilemap, attribute address
if x(2 downto 0) = "000" then
ctl_o.map_a(10 downto 5) <= '0' & y(7 downto 3);
ctl_o.attr_a(10 downto 5) <= '0' & y(7 downto 3);
ctl_o.map_a(4 downto 0) <= x(7 downto 3);
ctl_o.attr_a(4 downto 0) <= x(7 downto 3);
end if;
-- 3rd stage of pipeline
-- - read tile, attribute data from ROM
if x(2 downto 0) = "111" then
attr_d_r := ctl_i.attr_d(7 downto 0);
tile_d_r := ctl_i.tile_d(tile_d_r'range);
elsif stb = '1' then
tile_d_r := tile_d_r(tile_d_r'left-1 downto 0) & '0';
end if;
-- 2nd stage of pipeline
-- - set tile address
if x(2 downto 0) = "001" then
ctl_o.tile_a(13 downto 11) <= '0' & ctl_i.attr_d(6) & ctl_i.attr_d(4);
ctl_o.tile_a(10 downto 3) <= ctl_i.map_d(7 downto 0);
ctl_o.tile_a(2 downto 0) <= y(2 downto 0);
end if;
-- extract R,G,B from colour palette
pel := tile_d_r(tile_d_r'left-16) & tile_d_r(tile_d_r'left-8) & tile_d_r(tile_d_r'left);
-- 3rd stage of pipeline
-- - read tile, attribute data from ROM
if x(2 downto 0) = "111" then
attr_d_r := ctl_i.attr_d(7 downto 0);
tile_d_r := ctl_i.tile_d(tile_d_r'range);
elsif stb = '1' then
tile_d_r := tile_d_r(tile_d_r'left-1 downto 0) & '0';
end if;
ctl_o.pal_a <= "00" & attr_d_r(3 downto 0) & pel(1 downto 0);
ctl_o.set <= '0'; -- default
if hwsel = HW_BATTROAD and pel /= "000" then
-- pal_rgb(0)(7 downto 5) /= "000" or
-- pal_rgb(1)(7 downto 5) /= "000" or
-- pal_rgb(2)(7 downto 5) /= "000" then
-- if graphics_i.bit8(0)(3) = '1' then
-- extract R,G,B from colour palette
pel := tile_d_r(tile_d_r'left-16) & tile_d_r(tile_d_r'left-8) & tile_d_r(tile_d_r'left);
ctl_o.pal_a <= "00" & attr_d_r(3 downto 0) & pel(1 downto 0);
ctl_o.set <= '0'; -- default
if pel /= "000" then
ctl_o.set <= '1';
end if;
elsif hwsel = HW_KIDNIKI or hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 or hwsel = HW_YOUJYUDN then
-- 12x8 tiles, 32x32(64) tilemap
-- 1st stage of pipeline
-- - set tilemap, attribute address
if x12 = "0000" then
if hwsel = HW_KIDNIKI then
ctl_o.map_a(10 downto 5) <= y(8 downto 3);
ctl_o.attr_a(10 downto 5) <= y(8 downto 3);
else
ctl_o.map_a(10 downto 5) <= '0' & y(7 downto 3);
ctl_o.attr_a(10 downto 5) <= '0' & y(7 downto 3);
end if;
ctl_o.map_a(4 downto 0) <= std_logic_vector(xtile);
ctl_o.attr_a(4 downto 0) <= std_logic_vector(xtile);
end if;
-- 2nd stage of pipeline
-- - set tile address
if x12 = "0001" then
if hwsel = HW_KIDNIKI or hwsel = HW_YOUJYUDN then
ctl_o.tile_a(13 downto 12) <= ctl_i.attr_d(7 downto 6);
ctl_o.tile_a(11 downto 4) <= ctl_i.map_d(7 downto 0);
ctl_o.tile_a(3) <= '0';
else
ctl_o.tile_a(13) <= '0';
ctl_o.tile_a(12) <= ctl_i.attr_d(4);
ctl_o.tile_a(11) <= '0';
ctl_o.tile_a(10 downto 3) <= ctl_i.map_d(7 downto 0);
end if;
ctl_o.tile_a(2 downto 0) <= y(2 downto 0);
end if;
if x12 = "0100" then
-- switch to second 8 pixels of the tile
if hwsel = HW_KIDNIKI or hwsel = HW_YOUJYUDN then
ctl_o.tile_a(3) <= '1';
else
ctl_o.tile_a(11) <= '1';
end if;
end if;
-- 3rd stage of pipeline
-- - read tile, attribute data from ROM
if x12 = "0100" or x12 = "1000" then
attr_d_r := ctl_i.attr_d(7 downto 0);
tile_d_r := ctl_i.tile_d(tile_d_r'range);
elsif stb = '1' then
tile_d_r := tile_d_r(tile_d_r'left-1 downto 0) & '0';
end if;
-- extract R,G,B from colour palette
pel := tile_d_r(tile_d_r'left-16) & tile_d_r(tile_d_r'left-8) & tile_d_r(tile_d_r'left);
ctl_o.pal_a <= attr_d_r(4 downto 0) & pel(2 downto 0);
ctl_o.set <= '0'; -- default
if pel /= "000" then
ctl_o.set <= '1';
end if;
-- advance pixel/tile counters
if (hwsel = HW_KIDNIKI and video_ctl.x = "000"&x"FF") or
(hwsel = HW_YOUJYUDN and video_ctl.x = "000"&x"BB") or
(hwsel /= HW_KIDNIKI and hwsel /= HW_YOUJYUDN and video_ctl.x = "000"&x"F7")
then
xtile <= (others => '0');
x12 <= (others => '0');
elsif x12 = x"B" then
xtile <= xtile + 1;
x12 <= "0000";
else
x12 <= x12 + 1;
end if;
end if;
-- end if;
end if; -- clk_ena
end if; -- rising_edge_clk