1
0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-20 17:47:33 +00:00

Spy Hunter: update CTC, use common inputs

This commit is contained in:
Gyorgy Szombathelyi 2020-01-07 09:43:10 +01:00
parent 0f982bbfc6
commit 45697c5ce6
7 changed files with 95 additions and 443 deletions

View File

@ -13,9 +13,9 @@ down down : Decelerate
left left : Left
right right : Right
ESC : Coin
start TAB : VAN
Y Z : Shift
X shift left : Oil
start TAB,LShift : VAN
Y X : Shift
X Z : Oil
C ctrl left : Smoke
B alt left : Missle
A Space : Gun

View File

@ -41,7 +41,7 @@
# ========================
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
# Pin & Location Assignments
@ -225,8 +225,6 @@ set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF
set_global_assignment -name SYSTEMVERILOG_FILE rtl/SpyHunter_MiST.sv
set_global_assignment -name VHDL_FILE rtl/spy_hunter.vhd
set_global_assignment -name VHDL_FILE rtl/ctc_counter.vhd
set_global_assignment -name VHDL_FILE rtl/ctc_controler.vhd
set_global_assignment -name VHDL_FILE rtl/spy_hunter_sound_board.vhd
set_global_assignment -name VHDL_FILE rtl/spy_hunter_control.vhd
set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
@ -239,6 +237,7 @@ set_global_assignment -name VHDL_FILE rtl/rom/midssio_82s123.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
set_global_assignment -name VHDL_FILE rtl/cheap_squeak_deluxe.vhd
set_global_assignment -name QIP_FILE ../../../common/IO/Z80CTC/z80ctc.qip
set_global_assignment -name VHDL_FILE ../../../common/IO/pia6821.vhd
set_global_assignment -name QIP_FILE ../../../common/CPU/68000/FX68k/fx68k.qip
set_global_assignment -name QIP_FILE ../../../common/CPU/T80/T80.qip

View File

@ -58,6 +58,12 @@ localparam CONF_STR = {
"V,v1.1.",`BUILD_DATE
};
wire rotate = status[2];
wire blend = status[5];
wire service = status[6];
wire demosnd = status[8];
wire lamps = status[9];
assign LED = ~ioctl_downl;
assign SDRAM_CLK = clk_mem;
assign SDRAM_CKE = 1;
@ -84,6 +90,10 @@ wire [9:0] csd_audio;
wire hs, vs, cs;
wire blankn;
wire [2:0] g, r, b;
wire key_pressed;
wire [7:0] key_code;
wire key_strobe;
wire [15:0] rom_addr;
wire [15:0] rom_do;
wire [12:0] snd_addr;
@ -97,8 +107,6 @@ wire [7:0] ioctl_index;
wire ioctl_wr;
wire [24:0] ioctl_addr;
wire [7:0] ioctl_dout;
wire [7:0] steering;
wire [7:0] gas;
data_io data_io(
.clk_sys ( clk_sys ),
@ -217,24 +225,24 @@ spy_hunter spy_hunter(
.video_vs(vs),
.video_csync(cs),
.tv15Khz_mode(scandoublerD),
.separate_audio(1'b0),
.separate_audio(1'b1),
.audio_out_l(audio_l),
.audio_out_r(audio_r),
.csd_audio_out(csd_audio),
.coin1(btn_coin),
.coin2(1'b0),
.shift(m_shift),
.oil(m_fire4),
.missile(m_fire2),
.van(m_van),
.smoke(m_fire3),
.gun(m_fire1),
.coin1(m_coin1),
.coin2(m_coin2),
.shift(shift),
.oil(oil),
.missile(missile),
.van(van),
.smoke(smoke),
.gun(gun),
.steering(steering),
.gas(gas),
.timer(1),
.show_lamps(status[9]),
.demo_sound(status[8]),
.service(status[6]),
.show_lamps(lamps),
.demo_sound(demosnd),
.service(service),
.cpu_rom_addr ( rom_addr ),
.cpu_rom_do ( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ),
.snd_rom_addr ( snd_addr ),
@ -265,9 +273,9 @@ mist_video #(.COLOR_DEPTH(3), .SD_HCNT_WIDTH(10)) mist_video(
.VGA_B ( VGA_B ),
.VGA_VS ( vs_out ),
.VGA_HS ( hs_out ),
.rotate ( {1'b1,status[2]} ),
.rotate ( { 1'b1, rotate } ),
.ce_divider ( 1 ),
.blend ( status[5] ),
.blend ( blend ),
.scandoubler_disable(1),//scandoublerD ),
.no_csync ( 1'b1 ),
.ypbpr ( ypbpr )
@ -312,47 +320,40 @@ dac_r(
.dac_o(AUDIO_R)
);
// Rotated Normal
wire m_up = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
wire m_down = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
wire m_left = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
wire m_right = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
wire m_fire1 = btn_fire1 | joystick_0[4] | joystick_1[4]; // A
wire m_fire2 = btn_fire2 | joystick_0[5] | joystick_1[5]; // B
wire m_fire3 = btn_fire3 | joystick_0[6] | joystick_1[6]; // C (Select)
wire m_fire4 = btn_fire4 | joystick_0[8] | joystick_1[8]; // X
wire m_van = btn_van | joystick_0[7] | joystick_1[7]; // Start
wire m_shift = btn_shift | joystick_0[9] | joystick_1[9]; // Y
wire [7:0] steering;
wire [7:0] gas;
wire gun = m_fireA;
wire missile = m_fireB;
wire smoke = m_fireC;
wire van = m_fireD | btn_van;
wire oil = m_fireE;
wire shift = m_fireF;
wire m_up, m_down, m_left, m_right, m_fireA, m_fireB, m_fireC, m_fireD, m_fireE, m_fireF;
wire m_up2, m_down2, m_left2, m_right2, m_fire2A, m_fire2B, m_fire2C, m_fire2D, m_fire2E, m_fire2F;
wire m_tilt, m_coin1, m_coin2, m_coin3, m_coin4, m_one_player, m_two_players, m_three_players, m_four_players;
arcade_inputs inputs (
.clk ( clk_sys ),
.key_strobe ( key_strobe ),
.key_pressed ( key_pressed ),
.key_code ( key_code ),
.joystick_0 ( joystick_0 ),
.joystick_1 ( joystick_1 ),
.rotate ( rotate ),
.orientation ( 2'b11 ),
.joyswap ( 1'b0 ),
.oneplayer ( 1'b1 ),
.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),
.player1 ( {m_fireF, m_fireE, m_fireD, m_fireC, m_fireB, m_fireA, m_up, m_down, m_left, m_right} ),
.player2 ( {m_fire2F, m_fire2E, m_fire2D, m_fire2C, m_fire2B, m_fire2A, m_up2, m_down2, m_left2, m_right2} )
);
reg btn_shift = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_van = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_fire3 = 0;
reg btn_fire4 = 0;
reg btn_coin = 0;
wire key_pressed;
wire [7:0] key_code;
wire key_strobe;
always @(posedge clk_sys) begin
if(key_strobe) begin
case(key_code)
'h75: btn_up <= key_pressed; // up
'h72: btn_down <= key_pressed; // down
'h6B: btn_left <= key_pressed; // left
'h74: btn_right <= key_pressed; // right
'h76: btn_coin <= key_pressed; // ESC
'h0D: btn_van <= key_pressed; // TAB
'h1A: btn_shift <= key_pressed; // Y 35
'h12: btn_fire4 <= key_pressed; // shift left
'h14: btn_fire3 <= key_pressed; // ctrl left
'h11: btn_fire2 <= key_pressed; // alt left
'h29: btn_fire1 <= key_pressed; // Space
endcase
end
end

View File

@ -1,106 +0,0 @@
---------------------------------------------------------------------------------
-- Z80-CTC controler by Dar (darfpga@aol.fr) (19/10/2019)
-- http://darfpga.blogspot.fr
---------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity ctc_controler is
port(
clock : in std_logic;
clock_ena : in std_logic;
reset : in std_logic;
d_in : in std_logic_vector( 7 downto 0);
load_data : in std_logic;
int_ack : in std_logic;
int_pulse_0 : in std_logic;
int_pulse_1 : in std_logic;
int_pulse_2 : in std_logic;
int_pulse_3 : in std_logic;
d_out : out std_logic_vector( 7 downto 0);
int_n : out std_logic
);
end ctc_controler;
architecture struct of ctc_controler is
signal int_vector : std_logic_vector(4 downto 0);
signal wait_for_time_constant : std_logic;
signal load_data_r : std_logic; -- make sure load_data toggles to get one new data
signal int_reg_0 : std_logic;
signal int_reg_1 : std_logic;
signal int_reg_2 : std_logic;
signal int_reg_3 : std_logic;
signal int_ack_r : std_logic;
begin
int_n <= '0' when (int_reg_0 or int_reg_1 or int_reg_2 or int_reg_3) = '1' else '1';
d_out <= int_vector & "000" when int_reg_0 = '1' else
int_vector & "010" when int_reg_1 = '1' else
int_vector & "100" when int_reg_2 = '1' else
int_vector & "110" when int_reg_3 = '1' else (others => '0');
process (reset, clock)
begin
if reset = '1' then -- hardware and software reset
wait_for_time_constant <= '0';
int_reg_0 <= '0';
int_reg_1 <= '0';
int_reg_2 <= '0';
int_reg_3 <= '0';
load_data_r <= load_data;
int_vector <= (others => '0');
else
if rising_edge(clock) then
if clock_ena = '1' then
load_data_r <= load_data;
int_ack_r <= int_ack;
if load_data = '1' and load_data_r = '0' then
if wait_for_time_constant = '1' then
wait_for_time_constant <= '0';
else
if d_in(0) = '1' then -- check if its a control world
wait_for_time_constant <= d_in(2);
-- if d_in(1) = '1' then -- software reset
-- wait_for_time_constant <= '0';
-- end if;
else -- its an interrupt vector
int_vector <= d_in(7 downto 3);
end if;
end if;
end if;
if int_pulse_0 = '1' then int_reg_0 <= '1'; end if;
if int_pulse_1 = '1' then int_reg_1 <= '1'; end if;
if int_pulse_2 = '1' then int_reg_2 <= '1'; end if;
if int_pulse_3 = '1' then int_reg_3 <= '1'; end if;
if int_ack_r = '1' and int_ack = '0' then
if int_reg_0 = '1' then int_reg_0 <= '0';
elsif int_reg_1 = '1' then int_reg_1 <= '0';
elsif int_reg_2 = '1' then int_reg_2 <= '0';
elsif int_reg_3 = '1' then int_reg_3 <= '0'; end if;
end if;
end if;
end if;
end if;
end process;
end struct;

View File

@ -1,152 +0,0 @@
---------------------------------------------------------------------------------
-- Z80-CTC counter by Dar (darfpga@aol.fr) (19/10/2019)
-- http://darfpga.blogspot.fr
---------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity ctc_counter is
port(
clock : in std_logic;
clock_ena : in std_logic;
reset : in std_logic;
d_in : in std_logic_vector( 7 downto 0);
load_data : in std_logic;
clk_trg : in std_logic;
d_out : out std_logic_vector(7 downto 0);
zc_to : out std_logic;
int_pulse : out std_logic
);
end ctc_counter;
architecture struct of ctc_counter is
signal control_word : std_logic_vector(7 downto 0);
signal wait_for_time_constant : std_logic;
signal time_constant_loaded : std_logic;
signal restart_on_next_clock : std_logic;
signal restart_on_next_trigger : std_logic;
signal prescale_max : std_logic_vector(7 downto 0);
signal prescale_in : std_logic_vector(7 downto 0) := (others => '0');
signal count_max : std_logic_vector(8 downto 0);
signal count_in : std_logic_vector(8 downto 0) := (others => '0');
signal zc_to_in : std_logic;
signal clk_trg_r : std_logic;
signal trigger : std_logic;
signal count_ena : std_logic;
signal load_data_r : std_logic; -- make sure load_data toggles to get one new data
begin
prescale_max <=
(others => '0') when control_word(6) = '1' else -- counter mode (prescale max = 0)
X"0F" when control_word(6 downto 5) = "00" else -- timer mode prescale 16
X"FF"; -- timer mode prescale 256
trigger <=
'1' when (clk_trg = '0' and clk_trg_r = '1' and control_word(4) = '0') or -- falling edge
(clk_trg = '1' and clk_trg_r = '0' and control_word(4) = '1') else '0'; -- rising edge
d_out <= count_in(7 downto 0);
zc_to <= zc_to_in;
int_pulse <= zc_to_in when control_word(7) = '1' else '0';
process (reset, clock)
begin
if reset = '1' then -- hardware reset
count_ena <= '0';
wait_for_time_constant <= '0';
time_constant_loaded <= '0';
restart_on_next_clock <= '0';
restart_on_next_trigger <= '0';
count_in <= (others=> '0');
zc_to_in <= '0';
clk_trg_r <= clk_trg;
else
if rising_edge(clock) then
if clock_ena = '1' then
clk_trg_r <= clk_trg;
load_data_r <= load_data;
if (restart_on_next_trigger = '1' and trigger = '1') or (restart_on_next_clock = '1') then
restart_on_next_clock <= '0';
restart_on_next_trigger <= '0';
count_ena <= '1';
count_in <= count_max;
prescale_in <= prescale_max;
end if;
if load_data = '1' and load_data_r = '0' then
if wait_for_time_constant = '1' then
wait_for_time_constant <= '0';
time_constant_loaded <= '1';
if d_in = X"00" then
count_max <= '1'&X"00";
else
count_max <= '0'&d_in;
end if;
if control_word(6) = '0' and count_ena = '0' then -- in timer mode, if count was stooped
if control_word(3) = '0' then -- auto start when time_constant loaded
restart_on_next_clock <= '1';
else -- wait for trigger to start
restart_on_next_trigger <= '1';
end if;
end if;
else -- not waiting for time constant
if d_in(0) = '1' then -- check if its a control world
control_word <= d_in;
wait_for_time_constant <= d_in(2);
restart_on_next_clock <= '0';
restart_on_next_trigger <= '0';
if d_in(1) = '1' then -- software reset
count_ena <= '0';
time_constant_loaded <= '0';
zc_to_in <= '0';
-- zc_to_in_r <= '0';
clk_trg_r <= clk_trg;
end if;
end if;
end if;
end if; -- end load data
-- counter
zc_to_in <= '0';
if ((control_word(6) = '1' and trigger = '1' ) or
(control_word(6) = '0' and count_ena = '1') ) and time_constant_loaded = '1' then
if prescale_in = 0 then
prescale_in <= '0'&prescale_max(7 downto 1); -- test divide by 2 !
if count_in = 0 then
zc_to_in <= '1';
count_in <= count_max;
else
count_in <= count_in - '1';
end if;
else
prescale_in <= prescale_in - '1';
end if;
end if;
end if;
end if;
end if;
end process;
end struct;

View File

@ -213,34 +213,17 @@ architecture struct of spy_hunter is
signal cpu_ioreq_n : std_logic;
signal cpu_irq_n : std_logic;
signal cpu_m1_n : std_logic;
signal ctc_controler_we : std_logic;
signal ctc_controler_do : std_logic_vector(7 downto 0);
signal ctc_int_ack : std_logic;
signal cpu_int_ack_n : std_logic;
signal ctc_counter_0_we : std_logic;
-- signal ctc_counter_0_trg : std_logic;
signal ctc_counter_0_do : std_logic_vector(7 downto 0);
signal ctc_counter_0_int : std_logic;
signal ctc_ce : std_logic;
signal ctc_do : std_logic_vector(7 downto 0);
signal ctc_counter_1_we : std_logic;
-- signal ctc_counter_1_trg : std_logic;
signal ctc_counter_1_do : std_logic_vector(7 downto 0);
signal ctc_counter_1_int : std_logic;
signal ctc_counter_2_we : std_logic;
-- signal ctc_counter_2_trg : std_logic;
signal ctc_counter_2_do : std_logic_vector(7 downto 0);
signal ctc_counter_2_int : std_logic;
signal ctc_counter_3_we : std_logic;
signal ctc_counter_1_trg : std_logic;
signal ctc_counter_2_trg : std_logic;
signal ctc_counter_3_trg : std_logic;
signal ctc_counter_3_do : std_logic_vector(7 downto 0);
signal ctc_counter_3_int : std_logic;
-- signal cpu_rom_addr: std_logic_vector(15 downto 0);
-- signal cpu_rom_do : std_logic_vector( 7 downto 0);
signal wram_we : std_logic;
signal wram_do : std_logic_vector( 7 downto 0);
@ -464,8 +447,8 @@ begin
if hcnt >= 2+16+16 and hcnt < 514+16-1 and
vcnt >= 1 and vcnt < 241 then video_blankn <= '1';end if;
if hs_cnt = 0 then hsync0 <= '0';
elsif hs_cnt = 47 then hsync0 <= '1';
if hs_cnt = 0 then hsync0 <= '0'; video_hs <= '0';
elsif hs_cnt = 47 then hsync0 <= '1'; video_hs <= '1';
end if;
if hs_cnt = 0 then hsync1 <= '0';
@ -566,13 +549,8 @@ cpu_di <= cpu_rom_do when cpu_mreq_n = '0' and cpu_addr(15 downto 12) < X"E
ch_ram_do_r when cpu_mreq_n = '0' and (cpu_addr and x"FC00") = x"E800" else -- char ram E800-EBFF 1Ko + mirroring 0400
wram_do when cpu_mreq_n = '0' and (cpu_addr and X"F800") = x"F000" else -- work ram F000-F7FF 2Ko
sp_ram_cache_do_r when cpu_mreq_n = '0' and (cpu_addr and x"FE00") = x"F800" else -- sprite ram F800-F9FF 512o
ctc_controler_do when cpu_ioreq_n = '0' and cpu_m1_n = '0' else -- ctc ctrl (interrupt vector)
ctc_do when cpu_int_ack_n = '0' or ctc_ce = '1' else -- ctc (interrupt vector or counter data)
ssio_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 5) = "000" else -- 0x00-0x1F
ctc_counter_3_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else
ctc_counter_2_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else
ctc_counter_1_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else
ctc_counter_0_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else
X"FF";
cpu_rom_addr <= cpu_addr when cpu_addr < x"A000" else cpu_addr xor x"6000"; -- last rom has upper/lower part swapped
@ -591,14 +569,10 @@ ssio_iowe <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' else '0';
------------------------------------------------------------------------
-- Misc registers : ctc write enable / interrupt acknowledge
------------------------------------------------------------------------
ctc_counter_3_trg <= '1' when (vcnt = 246 and tv15Khz_mode = '1') or (vcnt = 493 and tv15Khz_mode = '0')else '0';
ctc_counter_3_we <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else '0';
ctc_counter_2_we <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else '0';
ctc_counter_1_we <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else '0';
ctc_counter_0_we <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else '0';
ctc_controler_we <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else '0'; -- only channel 0 receive int vector
ctc_int_ack <= '1' when cpu_ioreq_n = '0' and cpu_m1_n = '0' else '0';
cpu_int_ack_n <= cpu_ioreq_n or cpu_m1_n;
ctc_ce <= '1' when cpu_ioreq_n = '0' and cpu_addr(7 downto 4) = x"F" else '0';
ctc_counter_2_trg <= '1' when (vcnt >= 240 and vcnt <= 262 and tv15Khz_mode = '1') or (vcnt >= 480 and tv15Khz_mode = '0') else '0';
ctc_counter_3_trg <= '1' when top_frame = '1' and ((vcnt = 246 and tv15Khz_mode = '1') or (vcnt = 493 and tv15Khz_mode = '0')) else '0';
process (clock_vid)
begin
@ -664,7 +638,7 @@ begin
sp_byte_cnt <= (others => '0');
when "000001" =>
sp_attr <= sp_ram_do;
when "000010" =>
when "000010" =>
sp_code <= sp_ram_do;
sp_addr <= sp_ram_do(7 downto 0) & (sp_line xor sp_vflip) & (sp_byte_cnt xor sp_hflip); -- graphics rom addr
when "000011" =>
@ -673,7 +647,7 @@ when "000010" =>
sp_graphx32_do_r <= sp_graphx32_do; -- latch incoming sprite data
sp_addr <= sp_code(7 downto 0) & (sp_line xor sp_vflip) & (sp_byte_cnt+1 xor sp_hflip); -- advance graphics rom addr
sp_on_line <= '1';
when "010010"|"011010"|"100010" => -- 18,26,34
when "010010"|"011010"|"100010" => -- 18,26,34
sp_graphx32_do_r <= sp_graphx32_do; -- latch incoming sprite data
sp_addr <= sp_code(7 downto 0) & (sp_line xor sp_vflip) & (sp_byte_cnt+2 xor sp_hflip); -- advance graphics rom addr
sp_byte_cnt <= sp_byte_cnt + 1;
@ -922,92 +896,28 @@ port map(
DO => cpu_do
);
-- CTC interrupt controler Z80-CTC (MK3882)
ctc_controler : entity work.ctc_controler
port map(
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
d_in => cpu_do,
load_data => ctc_controler_we,
int_ack => ctc_int_ack,
int_pulse_0 => ctc_counter_0_int,
int_pulse_1 => ctc_counter_1_int,
int_pulse_2 => ctc_counter_2_int,
int_pulse_3 => ctc_counter_3_int,
d_out => ctc_controler_do,
int_n => cpu_irq_n
);
ctc_counter_0 : entity work.ctc_counter
port map(
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
d_in => cpu_do,
load_data => ctc_counter_0_we,
clk_trg => '0',
d_out => ctc_counter_0_do,
zc_to => open, -- zc/to #0 (pin 7) connected to clk_trg #1 (pin 22) on schematics (seems to be not used)
int_pulse => ctc_counter_0_int
);
ctc_counter_1 : entity work.ctc_counter
port map(
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
d_in => cpu_do,
load_data => ctc_counter_1_we,
clk_trg => '0',
d_out => ctc_counter_1_do,
zc_to => open,
int_pulse => ctc_counter_1_int
);
ctc_counter_2 : entity work.ctc_counter
port map(
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
d_in => cpu_do,
load_data => ctc_counter_2_we,
clk_trg => '0',
d_out => ctc_counter_2_do,
zc_to => open,
int_pulse => ctc_counter_2_int
);
ctc_counter_3 : entity work.ctc_counter
port map(
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
d_in => cpu_do,
load_data => ctc_counter_3_we,
clk_trg => ctc_counter_3_trg,
d_out => ctc_counter_3_do,
zc_to => open,
int_pulse => ctc_counter_3_int
-- Z80-CTC (MK3882)
z80ctc : entity work.z80ctc_top
port map (
clock => clock_vid,
clock_ena => cpu_ena,
reset => reset,
din => cpu_do,
cpu_din => cpu_di,
dout => ctc_do,
ce_n => not ctc_ce,
cs => cpu_addr(1 downto 0),
m1_n => cpu_m1_n,
iorq_n => cpu_ioreq_n,
rd_n => cpu_rd_n,
int_n => cpu_irq_n,
trg0 => '0',
to0 => ctc_counter_1_trg,
trg1 => ctc_counter_1_trg,
to1 => open,
trg2 => '0',
to2 => open,
trg3 => ctc_counter_3_trg
);
-- cpu program ROM 0x0000-0xDFFF

View File

@ -75,7 +75,7 @@ architecture struct of spy_hunter_control is
gas <= gas_r;
steering <= steering_r;
process (clock_40)
process (clock_40, reset)
begin
if reset = '1' then
gas_r <= x"39";