github.com/Gehstock.Mist_FPGA
1
0
Fork 0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-19 01:16:58 +00:00
Code Issues Releases Wiki Activity

OSD: fix for very low pixel clocks

Browse Source
This commit is contained in:
Gyorgy Szombathelyi 2019-07-07 13:52:13 +02:00
parent e0142f5483
commit 55dead73a5
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
common/mist/osd.v
View File

@ -96,7 +96,7 @@ wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
wire doublescan = (dsp_height>350);
reg ce_pix;
always @(negedge clk_sys) begin
always @(posedge clk_sys) begin
integer cnt = 0;
integer pixsz, pixcnt;
reg hs;
@ -110,7 +110,8 @@ always @(negedge clk_sys) begin
if(hs && ~HSync) begin
cnt <= 0;
pixsz <= (cnt >> 9) - 1;
if (cnt <= 512) pixsz = 0;
else pixsz <= (cnt >> 9) - 1;
pixcnt <= 0;
ce_pix <= 1;
end