mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-01-21 01:57:28 +00:00
Scramble HW: add more games
This commit is contained in:
parent
dd73e5ce11
commit
56ca4e3137
@ -3,6 +3,14 @@
|
||||
-- Arcade: Scramble port to MiST by Gehstock
|
||||
-- 10 November 2017
|
||||
--
|
||||
-- Usage:
|
||||
-- Copy the RBF and the ARC files to the same folder.
|
||||
-- Create ROM files from MAME ROM zip files using the mra utility and the MRA files.
|
||||
-- Example: mra -z /path/to/mame/roms scramble.mra
|
||||
-- Copy the ROM files to the root of the SD Card.
|
||||
--
|
||||
-- MRA utilty: https://github.com/sebdel/mra-tools-c
|
||||
--
|
||||
---------------------------------------------------------------------------------
|
||||
-- A simulation model of Scramble hardware
|
||||
-- Copyright (c) MikeJ - Feb 2007
|
||||
|
||||
@ -211,5 +211,7 @@ set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/spinner.vhd
|
||||
set_global_assignment -name SIGNALTAP_FILE output_files/scr.stp
|
||||
set_global_assignment -name SIGNALTAP_FILE output_files/vid.stp
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
@ -0,0 +1,4 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=13
|
||||
CONF=O7,Lives,3,5
|
||||
@ -0,0 +1,4 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=9
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=11
|
||||
CONF=O78,Lives,3,5,Free Play,Invuln.
|
||||
CONF=OA,Demo Sounds,Off,On
|
||||
|
||||
@ -0,0 +1,4 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=12
|
||||
CONF=O7,Lives,3,Unl
|
||||
@ -0,0 +1,5 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=18
|
||||
CONF=O78,Lives,3,4,5,6
|
||||
CONF=O9,Infinite Lives,Off,On
|
||||
@ -0,0 +1,7 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=16
|
||||
CONF=O7,Lives,3,5
|
||||
CONF=O89,Difficulty,Easy,Medium,Hard,Hardest
|
||||
CONF=OB,Start Level,1,3
|
||||
CONF=OA,Demo Sounds,Off,On
|
||||
@ -0,0 +1,7 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=17
|
||||
CONF=O7,Lives,3,5
|
||||
CONF=O8,Difficulty,Easy,Hard
|
||||
CONF=O9,Start Level,1,3
|
||||
CONF=OA,Demo Sounds,Off,On
|
||||
@ -0,0 +1,4 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=14
|
||||
CONF=O78,Lives,3,4,5,Unl
|
||||
@ -0,0 +1,4 @@
|
||||
[ARC]
|
||||
RBF=SCRAMBLE
|
||||
MOD=15
|
||||
CONF=O78,Lives,3,4,5,Unl
|
||||
@ -0,0 +1,27 @@
|
||||
<misterromdescription>
|
||||
<name>Amidar (Scramble hardware)</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="amidar.zip" md5="33b3ea63f123eb052e3ca852c2bc9181" type="merged">
|
||||
<part name="amidars/am2d"/>
|
||||
<part name="amidars/am2e"/>
|
||||
<part name="amidars/am2f"/>
|
||||
<part name="amidars/am2h"/>
|
||||
<part name="amidars/am2j"/>
|
||||
<part name="amidars/am2l"/>
|
||||
<part name="amidars/am2m"/>
|
||||
<part name="amidars/am2p"/>
|
||||
<part name="amidars/am2d"/>
|
||||
<part name="amidars/am2e"/>
|
||||
<part name="amidars/am2f"/>
|
||||
<part name="amidars/am2h"/>
|
||||
<part name="amidars/am2j"/>
|
||||
<part name="amidars/am2l"/>
|
||||
<part name="amidars/am2m"/>
|
||||
<part name="amidars/am2p"/>
|
||||
<part name="s1.5c"/>
|
||||
<part name="s2.5d"/>
|
||||
<part name="amidarb/6.5h"/>
|
||||
<part name="amidarb/5.5f"/>
|
||||
<part name="amidar.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,24 @@
|
||||
<misterromdescription>
|
||||
<name>Ant Eater</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="anteater.zip" md5="595cb84d7b7be1fab93958caaa9d593b" type="merged">
|
||||
<part name="ra1-2c"/>
|
||||
<part name="ra1-2e"/>
|
||||
<part name="ra1-2f"/>
|
||||
<part name="ra1-2h"/>
|
||||
<part name="ra1-2c"/>
|
||||
<part name="ra1-2e"/>
|
||||
<part name="ra1-2f"/>
|
||||
<part name="ra1-2h"/>
|
||||
|
||||
<part name="ra4-5c"/>
|
||||
<part name="ra4-5d"/>
|
||||
<part name="ra4-5c"/>
|
||||
<part name="ra4-5d"/>
|
||||
|
||||
<part name="ra6-5h"/>
|
||||
<part name="ra6-5f"/>
|
||||
|
||||
<part name="colr6f.cpu"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Armored Car</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="armorcar.zip" md5="0b2be19a5fa28e44cf65e157ee0d880c" type="merged|nonmerged">
|
||||
<part name="cpu.2c"/>
|
||||
<part name="cpu.2e"/>
|
||||
<part name="cpu.2f"/>
|
||||
<part name="cpu.2h"/>
|
||||
<part name="cpu.2j"/>
|
||||
<part name="cpu.2j"/>
|
||||
<part name="cpu.2j"/>
|
||||
<part name="cpu.2j"/>
|
||||
|
||||
<part name="sound.5c"/>
|
||||
<part name="sound.5d"/>
|
||||
<part name="sound.5c"/>
|
||||
<part name="sound.5d"/>
|
||||
|
||||
<part name="cpu.5h"/>
|
||||
<part name="cpu.5f"/>
|
||||
<part name="82s123.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,31 @@
|
||||
<misterromdescription>
|
||||
<name>Battle of Atlantis</name>
|
||||
<rbf>scramble</rbf>
|
||||
<rom index="0" zip="atlantis.zip" md5="91c419f9b09b9552c798526306f81b01" type="merged|nonmerged">
|
||||
<part name="2c"/>
|
||||
<part name="2e"/>
|
||||
<part name="2f"/>
|
||||
<part name="2h"/>
|
||||
<part name="2j"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
<part name="2c"/>
|
||||
<part name="2e"/>
|
||||
<part name="2f"/>
|
||||
<part name="2h"/>
|
||||
<part name="2j"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
|
||||
<part name="ot1.5c"/>
|
||||
<part name="ot2.5d"/>
|
||||
<part name="ot3.5e"/>
|
||||
<part name="ot3.5e"/>
|
||||
|
||||
<part name="5h"/>
|
||||
<part name="5f"/>
|
||||
<part name="c01s.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Calipso</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="calipso.zip" md5="7a459dee19c889190e2f570119d0d77b" type="merged">
|
||||
<part name="calipso.2c"/>
|
||||
<part name="calipso.2e"/>
|
||||
<part name="calipso.2f"/>
|
||||
<part name="calipso.2h"/>
|
||||
<part name="calipso.2j"/>
|
||||
<part name="calipso.2l"/>
|
||||
<part name="calipso.2l"/>
|
||||
<part name="calipso.2l"/>
|
||||
|
||||
<part name="calipso.5c"/>
|
||||
<part name="calipso.5d"/>
|
||||
<part name="calipso.5c"/>
|
||||
<part name="calipso.5d"/>
|
||||
|
||||
<part name="calipso.5f"/>
|
||||
<part name="calipso.5h"/>
|
||||
<part name="calipso.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,21 @@
|
||||
<misterromdescription>
|
||||
<name>Dark Planet</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="darkplnt.zip" md5="3710f6c8b240aab2f11a065023999497" type="merged">
|
||||
<part name="drkplt2c.dat"/>
|
||||
<part name="drkplt2e.dat"/>
|
||||
<part name="drkplt2g.dat"/>
|
||||
<part name="drkplt2j.dat"/>
|
||||
<part name="drkplt2k.dat"/>
|
||||
<part name="drkplt2l.dat"/>
|
||||
<part name="drkplt2m.dat"/>
|
||||
<part name="drkplt2p.dat"/>
|
||||
|
||||
<part name="5c.snd"/>
|
||||
<part name="5c.snd"/>
|
||||
|
||||
<part name="drkplt5f.dat"/>
|
||||
<part name="drkplt5h.dat"/>
|
||||
<part name="6e.cpu"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,22 @@
|
||||
<misterromdescription>
|
||||
<name>Frogger (Sega set 2)</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="frogger.zip" md5="e4dafd9989624989f0bef5874a7d6b16" type="merged">
|
||||
<part name="froggers2/epr-1012.ic5"/>
|
||||
<part name="froggers2/epr-1013a.ic6"/>
|
||||
<part name="froggers2/epr-1014.ic7"/>
|
||||
<part name="froggers2/epr-1015.ic8"/>
|
||||
<part name="froggers2/epr-1012.ic5"/>
|
||||
<part name="froggers2/epr-1013a.ic6"/>
|
||||
<part name="froggers2/epr-1014.ic7"/>
|
||||
<part name="froggers2/epr-1015.ic8"/>
|
||||
|
||||
<part name="frogger.608"/>
|
||||
<part name="frogger.609"/>
|
||||
<part name="frogger.610"/>
|
||||
<part name="frogger.610"/>
|
||||
<part name="frogger.606"/>
|
||||
<part name="frogger.607"/>
|
||||
<part name="pr-91.6l"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,24 @@
|
||||
<misterromdescription>
|
||||
<name>Lost Tomb</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="losttomb.zip" md5="c62f4d91a165fe79a921e0c6ec85846b" type="merged">
|
||||
<part name="2c"/>
|
||||
<part name="2e"/>
|
||||
<part name="2f"/>
|
||||
<part name="2h-easy"/>
|
||||
<part name="2j"/>
|
||||
<part name="2l"/>
|
||||
<part name="2m"/>
|
||||
<part name="2m"/>
|
||||
|
||||
<part name="5c"/>
|
||||
<part name="5d"/>
|
||||
<part name="5c"/>
|
||||
<part name="5d"/>
|
||||
|
||||
<part name="5h"/>
|
||||
<part name="5f"/>
|
||||
|
||||
<part name="ltprom"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,31 @@
|
||||
<misterromdescription>
|
||||
<name>Mars</name>
|
||||
<rbf>scramble</rbf>
|
||||
<rom index="0" zip="mars.zip" md5="d2f92c40c12e61bb0b906d0daeab8eee" type="merged|nonmerged">
|
||||
<part name="u26.3"/>
|
||||
<part name="u56.4"/>
|
||||
<part name="u69.5"/>
|
||||
<part name="u98.6"/>
|
||||
<part name="u114.7"/>
|
||||
<part name="u133.8"/>
|
||||
<part name="u114.7"/>
|
||||
<part name="u133.8"/>
|
||||
<part name="u26.3"/>
|
||||
<part name="u56.4"/>
|
||||
<part name="u69.5"/>
|
||||
<part name="u98.6"/>
|
||||
<part name="u114.7"/>
|
||||
<part name="u133.8"/>
|
||||
<part name="u114.7"/>
|
||||
<part name="u133.8"/>
|
||||
|
||||
<part name="u39.9"/>
|
||||
<part name="u51.10"/>
|
||||
<part name="u78.11"/>
|
||||
<part name="u78.11"/>
|
||||
|
||||
<part name="u101.2"/>
|
||||
<part name="u72.1"/>
|
||||
<part name="c01s.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,24 @@
|
||||
<misterromdescription>
|
||||
<name>Mighty Monkey</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="mimonkey.zip" md5="21de700d16c4f72771621924f0207533" type="merged">
|
||||
<part name="mimonscr/mm1"/>
|
||||
<part name="mimonscr/mm2"/>
|
||||
<part name="mimonscr/mm3"/>
|
||||
<part name="mimonscr/mm4"/>
|
||||
<part name="mimonscr/mm5"/>
|
||||
<part name="mimonscr/mm6"/>
|
||||
<part name="mimonscr/mm7"/>
|
||||
<part name="mimonscr/mm8"/>
|
||||
|
||||
<part name="mm13.11d"/>
|
||||
<part name="mm14.10d"/>
|
||||
|
||||
<part name="mm11.5f"/>
|
||||
<part name="mm9.5f"/>
|
||||
<part name="mm12.5h"/>
|
||||
<part name="mm10.5h"/>
|
||||
|
||||
<part name="82s123.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Minefield</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="minefld.zip" md5="8bc2f7bf551354bb767b4996c91a6e32" type="merged|nonmerged">
|
||||
<part name="ma22c"/>
|
||||
<part name="ma22e"/>
|
||||
<part name="ma22f"/>
|
||||
<part name="ma22h"/>
|
||||
<part name="ma22j"/>
|
||||
<part name="ma22l"/>
|
||||
<part name="ma22l"/>
|
||||
<part name="ma22l"/>
|
||||
|
||||
<part name="ma15c"/>
|
||||
<part name="ma15d"/>
|
||||
<part name="ma15c"/>
|
||||
<part name="ma15d"/>
|
||||
|
||||
<part name="ma15h"/>
|
||||
<part name="ma15f"/>
|
||||
<part name="minefld.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Moonwar</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="moonwar.zip" md5="85ac1993a065a59063bc915270972402" type="merged">
|
||||
<part name="mw2.2c"/>
|
||||
<part name="mw2.2e"/>
|
||||
<part name="mw2.2f"/>
|
||||
<part name="mw2.2h"/>
|
||||
<part name="mw2.2c"/>
|
||||
<part name="mw2.2e"/>
|
||||
<part name="mw2.2f"/>
|
||||
<part name="mw2.2h"/>
|
||||
|
||||
<part name="moon_war_ii_ra20_5c.5c"/>
|
||||
<part name="moon_war_ii_ra20_5d.5d"/>
|
||||
<part name="moon_war_ii_ra20_5c.5c"/>
|
||||
<part name="moon_war_ii_ra20_5d.5d"/>
|
||||
|
||||
<part name="moon_war_ii_ra20_5f.5f"/>
|
||||
<part name="moon_war_ii_ra20_5h.5h"/>
|
||||
<part name="moonwar_ii_color_6ea1.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Rescue</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="rescue.zip" md5="b12c059c5c50f4e7043b10ee3b021b6d" type="merged|nonmerged">
|
||||
<part name="rb15acpu.bin"/>
|
||||
<part name="rb15bcpu.bin"/>
|
||||
<part name="rb15ccpu.bin"/>
|
||||
<part name="rb15dcpu.bin"/>
|
||||
<part name="rb15ecpu.bin"/>
|
||||
<part name="rb15ecpu.bin"/>
|
||||
<part name="rb15ecpu.bin"/>
|
||||
<part name="rb15ecpu.bin"/>
|
||||
|
||||
<part name="rb15csnd.bin"/>
|
||||
<part name="rb15dsnd.bin"/>
|
||||
<part name="rb15csnd.bin"/>
|
||||
<part name="rb15dsnd.bin"/>
|
||||
|
||||
<part name="rb15hcpu.bin"/>
|
||||
<part name="rb15fcpu.bin"/>
|
||||
<part name="rescue.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Super Cobra</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="scobra.zip" md5="0f07fad30514fea4b483d933590ff482" type="merged">
|
||||
<part name="epr1265.2c"/>
|
||||
<part name="2e"/>
|
||||
<part name="epr1267.2f"/>
|
||||
<part name="2h"/>
|
||||
<part name="epr1269.2j"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
<part name="2l"/>
|
||||
|
||||
<part name="5c"/>
|
||||
<part name="5d"/>
|
||||
<part name="5e"/>
|
||||
<part name="5e"/>
|
||||
|
||||
<part name="epr1273.5f"/>
|
||||
<part name="epr1274.5h"/>
|
||||
<part name="82s123.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,31 @@
|
||||
<misterromdescription>
|
||||
<name>Scramble (Stern Electronics set 1)</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="scramble.zip" md5="cefab5afb2ce5edd0170e96f68759c73" type="merged">
|
||||
<part name="scrambles/2d"/>
|
||||
<part name="scrambles/2e"/>
|
||||
<part name="scrambles/2f"/>
|
||||
<part name="scrambles/2h"/>
|
||||
<part name="scrambles/2j"/>
|
||||
<part name="scrambles/2l"/>
|
||||
<part name="scrambles/2m"/>
|
||||
<part name="scrambles/2p"/>
|
||||
<part name="scrambles/2d"/>
|
||||
<part name="scrambles/2e"/>
|
||||
<part name="scrambles/2f"/>
|
||||
<part name="scrambles/2h"/>
|
||||
<part name="scrambles/2j"/>
|
||||
<part name="scrambles/2l"/>
|
||||
<part name="scrambles/2m"/>
|
||||
<part name="scrambles/2p"/>
|
||||
|
||||
<part name="ot1.5c"/>
|
||||
<part name="ot2.5d"/>
|
||||
<part name="ot3.5e"/>
|
||||
<part name="ot3.5e"/>
|
||||
|
||||
<part name="scrambles/5h"/>
|
||||
<part name="scrambles/5f"/>
|
||||
<part name="c01s.6e"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Speed Coin</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="spdcoin.zip" md5="ec50d25a33e7eb34bd53e66648cd65a6" type="merged">
|
||||
<part name="spdcoin.2c"/>
|
||||
<part name="spdcoin.2e"/>
|
||||
<part name="spdcoin.2c"/>
|
||||
<part name="spdcoin.2e"/>
|
||||
<part name="spdcoin.2c"/>
|
||||
<part name="spdcoin.2e"/>
|
||||
<part name="spdcoin.2c"/>
|
||||
<part name="spdcoin.2e"/>
|
||||
|
||||
<part name="spdcoin.5c"/>
|
||||
<part name="spdcoin.5d"/>
|
||||
<part name="spdcoin.5c"/>
|
||||
<part name="spdcoin.5d"/>
|
||||
|
||||
<part name="spdcoin.5f"/>
|
||||
<part name="spdcoin.5h"/>
|
||||
<part name="spdcoin.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Strategy X</name>
|
||||
<rbf>scramble</rbf>
|
||||
<rom index="0" zip="stratgyx.zip" md5="a9f3ca5ff435d48951108c3d469ac695" type="merged|nonmerged">
|
||||
<part name="2c_1.bin"/>
|
||||
<part name="2e_2.bin"/>
|
||||
<part name="2f_3.bin"/>
|
||||
<part name="2h_4.bin"/>
|
||||
<part name="2j_5.bin"/>
|
||||
<part name="2l_6.bin"/>
|
||||
<part name="2l_6.bin"/>
|
||||
<part name="2l_6.bin"/>
|
||||
|
||||
<part name="s1.bin"/>
|
||||
<part name="s2.bin"/>
|
||||
|
||||
<part name="5h_c1.bin"/>
|
||||
<part name="5f_c2.bin"/>
|
||||
|
||||
<part name="strategy.6e"/>
|
||||
<part name="strategy.10k"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,23 @@
|
||||
<misterromdescription>
|
||||
<name>Tazmania</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="tazmania.zip" md5="843f8ffcc008407fd77958d854c3afba" type="merged|nonmerged">
|
||||
<part name="2c.cpu"/>
|
||||
<part name="2e.cpu"/>
|
||||
<part name="2f.cpu"/>
|
||||
<part name="2h.cpu"/>
|
||||
<part name="2j.cpu"/>
|
||||
<part name="2k.cpu"/>
|
||||
<part name="2k.cpu"/>
|
||||
<part name="2k.cpu"/>
|
||||
|
||||
<part name="rom0.snd"/>
|
||||
<part name="rom0.snd"/>
|
||||
<part name="rom0.snd"/>
|
||||
<part name="rom0.snd"/>
|
||||
|
||||
<part name="5h.cpu"/>
|
||||
<part name="5f.cpu"/>
|
||||
<part name="colr6f.cpu"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -0,0 +1,21 @@
|
||||
<misterromdescription>
|
||||
<name>Turtles</name>
|
||||
<mameversion>0209</mameversion>
|
||||
<rom index="0" zip="turtles.zip" md5="f0331f77098da57363e1fe323829c875" type="merged|nonmerged">
|
||||
<part name="turt_vid.2c"/>
|
||||
<part name="turt_vid.2e"/>
|
||||
<part name="turt_vid.2f"/>
|
||||
<part name="turt_vid.2h"/>
|
||||
<part name="turt_vid.2j"/>
|
||||
<part name="turt_vid.2j"/>
|
||||
<part name="turt_vid.2j"/>
|
||||
<part name="turt_vid.2j"/>
|
||||
|
||||
<part name="turt_snd.5c"/>
|
||||
<part name="turt_snd.5d"/>
|
||||
|
||||
<part name="turt_vid.5f"/>
|
||||
<part name="turt_vid.5h"/>
|
||||
<part name="turtles.clr"/>
|
||||
</rom>
|
||||
</misterromdescription>
|
||||
@ -2,6 +2,9 @@
|
||||
// Scramble Arcade HW top-level for MiST
|
||||
//
|
||||
// Scramble/Amidar/Frogger/Super Cobra/Tazzmania/Armored Car
|
||||
// Moon War/Speed Coin/Calipso/Dark Planet/Anteater/Lost Tomb
|
||||
// Mars/Battle Of Attlantis/Strategy X/Turtles/Rescue/Minefield
|
||||
// Mighty Monkey
|
||||
//
|
||||
// This program is free software; you can redistribute it and/or modify it
|
||||
// under the terms of the GNU General Public License as published by the Free
|
||||
@ -68,38 +71,40 @@ reg [8*8-1:0] core_name;
|
||||
reg [7:0] input0;
|
||||
reg [7:0] input1;
|
||||
reg [7:0] input2;
|
||||
reg [1:0] orientation;
|
||||
|
||||
always @(*) begin
|
||||
orientation = 2'b11; // portrait, left
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_fireA, /*service*/1'b0, m_fireB, m_up2 };
|
||||
input1 = ~{ m_one_player, m_two_players, m_left2, m_right2, m_fire2A, m_fire2B, /*lives*/~status[8:7] };
|
||||
input2 = ~{ 1'b1, m_down, 1'b1, m_up, /*cabinet*/1'b1, /*coinage*/2'b11, m_down2 };
|
||||
|
||||
case (core_mod)
|
||||
6'h0:
|
||||
7'h0:
|
||||
begin
|
||||
core_name = "SCRAMBLE";
|
||||
hwsel = 0;
|
||||
end
|
||||
6'h1:
|
||||
7'h1:
|
||||
begin
|
||||
core_name = "AMIDAR ";
|
||||
hwsel = 0;
|
||||
input1[1:0] = ~status[8:7]; // lives345unl
|
||||
//input2[1] = status[10]; // demo sounds - no effect
|
||||
end
|
||||
6'h2:
|
||||
7'h2:
|
||||
begin
|
||||
core_name = "FROGGER ";
|
||||
hwsel = 1;
|
||||
end
|
||||
6'h3:
|
||||
7'h3:
|
||||
begin
|
||||
core_name = "SCOBRA ";
|
||||
hwsel = 2;
|
||||
input1[0] = status[9]; // allow continue
|
||||
input1[1] = status[7]; // lives34
|
||||
end
|
||||
6'h4:
|
||||
7'h4:
|
||||
begin
|
||||
core_name = "TAZMANIA";
|
||||
hwsel = 2;
|
||||
@ -107,14 +112,14 @@ always @(*) begin
|
||||
input1 = ~{ m_fire2A, m_fire2B, m_left2, m_right2, m_up2, m_down2, /*demosnd*/status[10], /*lives35*/status[7] };
|
||||
input2 = ~{ 1'b1, m_two_players, 2'b10, 3'b111, m_one_player }; // unknown, start2, 2xunknown, cabinet, 2xcoinage, start1
|
||||
end
|
||||
6'h5:
|
||||
7'h5:
|
||||
begin
|
||||
core_name = "ARMORCAR";
|
||||
hwsel = 2;
|
||||
input1[0] = ~status[7]; //lives35
|
||||
input1[1] = ~status[10]; // demo sounds
|
||||
end
|
||||
6'h6:
|
||||
7'h6:
|
||||
begin
|
||||
core_name = "MOONWAR ";
|
||||
hwsel = 2;
|
||||
@ -122,7 +127,7 @@ always @(*) begin
|
||||
input1 = ~{ m_fireA, m_fireB, m_fireC, m_fireD, m_two_players, m_one_player, /*live345*/~status[8:7] };
|
||||
input2 = ~{ 4'h0, 1'b1, 2'b11, 1'b0 }; // 4xunused, cabinet, coinage, p2fire(cocktail)
|
||||
end
|
||||
6'h7:
|
||||
7'h7:
|
||||
begin
|
||||
core_name = "SPDCOIN ";
|
||||
hwsel = 2;
|
||||
@ -130,7 +135,7 @@ always @(*) begin
|
||||
input1 = { 4'hf, 2'b00, 1'b0, 1'b0 }; // 6xunused, freeplay, freeze
|
||||
input2 = { 4'hf, ~status[7], status[11], 1'b1, 1'b1}; // 4xunused, lives35, difficulty, unknown, unused
|
||||
end
|
||||
6'h8:
|
||||
7'h8:
|
||||
begin
|
||||
core_name = "CALIPSO ";
|
||||
hwsel = 3;
|
||||
@ -138,31 +143,85 @@ always @(*) begin
|
||||
input1 = ~{ 1'b1, 1'b1, m_left2, m_right2, m_down2, m_up2, status[10], status[7] }; // unused, unused, left, right, down, up, demo sounds, lives 3/5
|
||||
input2 = ~{ 5'b0, 2'b10, m_fireA | m_one_player }; // unused[7:3], coin dip[2:1], start 1p / player1 fire
|
||||
end
|
||||
6'h9:
|
||||
7'h9:
|
||||
begin
|
||||
// buggy
|
||||
core_name = "DARKPLNT";
|
||||
hwsel = 4;
|
||||
input0 = ~{ m_coin1, m_coin2, 3'b000, m_two_players | m_fireB, m_one_player | m_fireA, m_fireC };
|
||||
input1 = 8'h00;
|
||||
input2 = 8'h00;
|
||||
input1 = { darkplnt_dial_scrambled, /*lives*/status[7], /*bonus*/1'b0 };
|
||||
input2 = { /*unk*/4'hf, /*bonus life*/1'b0, /*coinage*/ 2'b10, /*unk*/1'b1 };
|
||||
end
|
||||
6'hA:
|
||||
7'hA:
|
||||
begin
|
||||
core_name = "ANTEATER";
|
||||
hwsel = 5;
|
||||
hwsel = 6;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_down, m_up, m_fireA, m_fireB };
|
||||
input1 = ~{ m_fire2A, m_fire2B, m_left2, m_right2, m_up2, m_down2, /*demosdns*/status[10], /*lives35*/status[7] };
|
||||
input2 = ~{ 1'b1, m_two_players, 2'b10, 3'b111, m_one_player };
|
||||
end
|
||||
6'hB:
|
||||
7'hB:
|
||||
begin
|
||||
core_name = "LOSTTOMB";
|
||||
hwsel = 6;
|
||||
hwsel = 7;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_down, m_up, m_one_player, m_two_players };
|
||||
input1 = ~{ 1'b0, m_fireA, m_left2, m_right2, m_down2, m_up2, 2'b01 };
|
||||
input1 = ~{ 1'b0, m_fireA, m_left2, m_right2, m_down2, m_up2, /*lives35/free play/invulnerability*/~(status[8:7]+1'd1) };
|
||||
input2 = ~{ 4'h0, status[10], 2'b10, 1'b0 }; //4xunused, demo sounds, 2xcoinage, unused
|
||||
end
|
||||
7'hC:
|
||||
begin
|
||||
core_name = "MARS ";
|
||||
hwsel = 10;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_left2 | m_fireA, m_right2 | m_fireB, 1'b0, 1'b0 };
|
||||
input1 = ~{ m_one_player, m_two_players, 4'h0, /*coinage*/2'b11 };
|
||||
input2 = ~{ m_up2 | m_fireC, m_down, m_down2 | m_fireD, m_up, /*lives*/status[7], /*unk*/1'b0, /*cabinet*/1'b1, 1'b0 };
|
||||
end
|
||||
7'hD:
|
||||
begin
|
||||
core_name = "ATLANTIS";
|
||||
hwsel = 0;
|
||||
input1[0] = 1'b0; // upright
|
||||
input1[1] = ~status[7]; // lives35
|
||||
end
|
||||
7'hE:
|
||||
begin
|
||||
core_name = "STRATGYX";
|
||||
hwsel = 5;
|
||||
orientation = 2'b10;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_fireA, 1'b0, m_fireB, m_up2 };
|
||||
input1 = ~{ m_one_player, m_two_players, m_left2, m_right2, m_fire2A, m_fire2B, ~status[8:7] };
|
||||
input2 = ~{ m_fire2C, m_down, m_fireC, m_up, /*upright*/1'b1, /*coinage*/2'b00, m_down2 };
|
||||
end
|
||||
7'hF:
|
||||
begin
|
||||
core_name = "TURTLES ";
|
||||
hwsel = 11;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_fireA, 1'b0, 1'b0, m_up2 };
|
||||
input1 = ~{ m_one_player, m_two_players, m_left2, m_right2, m_fire2A, 1'b0, ~status[8:7] };
|
||||
input2 = ~{ 1'b0, m_down, 1'b0, m_up, /*upright*/1'b1, /*coinage*/2'b00, m_down2 };
|
||||
end
|
||||
7'h10:
|
||||
begin
|
||||
core_name = "MINEFLD ";
|
||||
hwsel = 8;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_down, m_up, /*start level*/status[11], m_fireA };
|
||||
input1 = ~{ /*2xunk*/2'b00, m_left2, m_right2, m_down2, m_up2, /*demosnd*/status[10], /*lives35*/status[7] };
|
||||
input2 = ~{ /*unk*/1'b0, m_two_players, /*2xunk*/2'b00, /*difficulty*/status[9:8], /*coinage*/1'b0, m_one_player };
|
||||
end
|
||||
7'h11:
|
||||
begin
|
||||
core_name = "RESCUE ";
|
||||
hwsel = 9;
|
||||
input0 = ~{ m_coin1, m_coin2, m_left, m_right, m_down, m_up, /*start level*/status[9], m_fireA };
|
||||
input1 = ~{ /*2xunk*/2'b00, m_left2, m_right2, m_down2, m_up2, /*demosnd*/status[10], /*lives35*/status[7] };
|
||||
input2 = ~{ /*unk*/1'b0, m_two_players, /*2xunk*/2'b00, /*difficulty*/~status[8], /*coinage*/2'b11, m_one_player };
|
||||
end
|
||||
7'h12:
|
||||
begin
|
||||
core_name = "MIMONKEY";
|
||||
hwsel = 12;
|
||||
input2[5] = status[9]; // infinite lives
|
||||
end
|
||||
|
||||
default:
|
||||
begin
|
||||
hwsel = 0;
|
||||
@ -190,6 +249,18 @@ pll pll(
|
||||
.locked(pll_locked)
|
||||
);
|
||||
|
||||
// reset generation
|
||||
reg reset = 1;
|
||||
reg rom_loaded = 0;
|
||||
always @(posedge clk_sys) begin
|
||||
reg ioctl_downlD;
|
||||
ioctl_downlD <= ioctl_downl;
|
||||
|
||||
if (ioctl_downlD & ~ioctl_downl) rom_loaded <= 1;
|
||||
reset <= status[0] | buttons[1] | ~rom_loaded | ioctl_downl;
|
||||
end
|
||||
|
||||
// clock enables
|
||||
reg ce_6p, ce_6n, ce_12, ce_1p79;
|
||||
always @(negedge clk_sys) begin
|
||||
reg [1:0] div = 0;
|
||||
@ -207,6 +278,7 @@ always @(negedge clk_sys) begin
|
||||
end
|
||||
end
|
||||
|
||||
// ARM connection
|
||||
wire [31:0] status;
|
||||
wire [1:0] buttons;
|
||||
wire [1:0] switches;
|
||||
@ -250,7 +322,7 @@ A000-A7FF 2k gfx1 5H
|
||||
A800-AFFF 2k gfx2 5F
|
||||
B000-B01F 32b palette LUT
|
||||
|
||||
Calipso:
|
||||
Calipso, Mighty Monkey:
|
||||
A000-BFFF 8k gfx1 5H
|
||||
C000-DFFF 8k gfx2 5F
|
||||
E000-E01F 32b palette LUT
|
||||
@ -312,7 +384,7 @@ wire hs, vs;
|
||||
//wire blankn = ~(hb | vb);
|
||||
wire blankn = ~vb;
|
||||
wire hb, vb;
|
||||
wire [3:0] r,b,g;
|
||||
wire [5:0] r,b,g;
|
||||
|
||||
scramble_top scramble(
|
||||
.O_VIDEO_R(r),
|
||||
@ -327,7 +399,7 @@ scramble_top scramble(
|
||||
.I_PA(input0),
|
||||
.I_PB(input1),
|
||||
.I_PC(input2),
|
||||
.RESET(status[0] | buttons[1] | ioctl_downl),
|
||||
.RESET(reset),
|
||||
.clk(clk_sys),
|
||||
.ena_12(ce_12),
|
||||
.ena_6(ce_6p),
|
||||
@ -342,14 +414,14 @@ scramble_top scramble(
|
||||
.dl_data(ioctl_dout)
|
||||
);
|
||||
|
||||
mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
|
||||
mist_video #(.COLOR_DEPTH(6),.SD_HCNT_WIDTH(10)) mist_video(
|
||||
.clk_sys(clk_sys),
|
||||
.SPI_SCK(SPI_SCK),
|
||||
.SPI_SS3(SPI_SS3),
|
||||
.SPI_DI(SPI_DI),
|
||||
.R(blankn ? r : 0),
|
||||
.G(blankn ? g : 0),
|
||||
.B(blankn ? b : 0),
|
||||
.R(blankn ? r : 6'd0),
|
||||
.G(blankn ? g : 6'd0),
|
||||
.B(blankn ? b : 6'd0),
|
||||
.HSync(~hs),
|
||||
.VSync(~vs),
|
||||
.VGA_R(VGA_R),
|
||||
@ -357,6 +429,7 @@ mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
|
||||
.VGA_B(VGA_B),
|
||||
.VGA_VS(VGA_VS),
|
||||
.VGA_HS(VGA_HS),
|
||||
.no_csync(no_csync),
|
||||
.rotate({1'b1,rotate}),
|
||||
.ce_divider(1'b1),
|
||||
.blend(blend),
|
||||
@ -380,6 +453,23 @@ moonwar_dial moonwar_dial (
|
||||
.dialout(dial)
|
||||
);
|
||||
|
||||
wire [6:0] darkplnt_dial;
|
||||
spinner spinner (
|
||||
.clock(clk_sys),
|
||||
.reset(reset),
|
||||
.btn_left(m_left | m_up),
|
||||
.btn_right(m_right | m_down),
|
||||
.strobe(vs),
|
||||
.spin_angle(darkplnt_dial)
|
||||
);
|
||||
wire [5:0] darkplnt_dial_scrambled = {
|
||||
darkplnt_dial[3],
|
||||
darkplnt_dial[5],
|
||||
darkplnt_dial[6],
|
||||
darkplnt_dial[4],
|
||||
darkplnt_dial[2:1]
|
||||
};
|
||||
|
||||
wire m_up, m_down, m_left, m_right, m_fireA, m_fireB, m_fireC, m_fireD, m_fireE, m_fireF;
|
||||
wire m_up2, m_down2, m_left2, m_right2, m_fire2A, m_fire2B, m_fire2C, m_fire2D, m_fire2E, m_fire2F;
|
||||
wire m_tilt, m_coin1, m_coin2, m_coin3, m_coin4, m_one_player, m_two_players, m_three_players, m_four_players;
|
||||
@ -392,7 +482,7 @@ arcade_inputs inputs (
|
||||
.joystick_0 ( joystick_0 ),
|
||||
.joystick_1 ( joystick_1 ),
|
||||
.rotate ( rotate ),
|
||||
.orientation ( 2'b11 ),
|
||||
.orientation ( orientation ),
|
||||
.joyswap ( joyswap ),
|
||||
.oneplayer ( 1'b0 ),
|
||||
.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),
|
||||
|
||||
@ -50,9 +50,9 @@ entity SCRAMBLE is
|
||||
port (
|
||||
I_HWSEL : in integer;
|
||||
--
|
||||
O_VIDEO_R : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_R : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(5 downto 0);
|
||||
O_HSYNC : out std_logic;
|
||||
O_VSYNC : out std_logic;
|
||||
O_HBLANK : out std_logic;
|
||||
@ -134,10 +134,13 @@ architecture RTL of SCRAMBLE is
|
||||
signal control_reg : std_logic_vector(7 downto 0);
|
||||
signal intst_l : std_logic;
|
||||
signal iopc7 : std_logic;
|
||||
signal pout1 : std_logic;
|
||||
signal bcb : std_logic; -- scramble: pout1
|
||||
signal bcg : std_logic;
|
||||
signal bcr : std_logic;
|
||||
signal starson : std_logic;
|
||||
signal hcma : std_logic;
|
||||
signal vcma : std_logic;
|
||||
signal gfxbank : std_logic_vector(1 downto 0);
|
||||
|
||||
signal pgm_rom_0_wr : std_logic;
|
||||
signal pgm_rom_1_wr : std_logic;
|
||||
@ -257,7 +260,11 @@ begin
|
||||
I_OBJEN_L => objen_l,
|
||||
--
|
||||
I_STARSON => starson,
|
||||
I_POUT1 => pout1,
|
||||
I_BCB => bcb,
|
||||
I_BCG => bcg,
|
||||
I_BCR => bcr,
|
||||
--
|
||||
I_GFXBANK => gfxbank,
|
||||
--
|
||||
O_VIDEO_R => O_VIDEO_R,
|
||||
O_VIDEO_G => O_VIDEO_G,
|
||||
@ -267,7 +274,7 @@ begin
|
||||
ENAB => ENAB,
|
||||
ENA_12 => ENA_12,
|
||||
CLK => CLK,
|
||||
--
|
||||
--
|
||||
dl_addr => dl_addr,
|
||||
dl_wr => dl_wr,
|
||||
dl_data => dl_data
|
||||
@ -383,9 +390,9 @@ begin
|
||||
cpu_busrq_l <= cpu_addr(15);
|
||||
end if;
|
||||
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
if cpu_addr(15) = '1' then page_4to7_l <= '0'; end if;
|
||||
elsif I_HWSEL = I_HWSEL_SCRAMBLE then
|
||||
elsif I_HWSEL = I_HWSEL_SCRAMBLE or I_HWSEL = I_HWSEL_MARS or I_HWSEL = I_HWSEL_MIMONKEY then
|
||||
if (cpu_addr(15 downto 14) = "01") then page_4to7_l <= '0'; end if;
|
||||
else
|
||||
if (cpu_addr(15 downto 14) = "10") then page_4to7_l <= '0'; end if;
|
||||
@ -398,11 +405,16 @@ begin
|
||||
begin
|
||||
waen_l <= '1';
|
||||
objen_l <= '1';
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_TURTLES then
|
||||
if (page_4to7_l = '0') and (cpu_rfsh_l = '1') then
|
||||
if (cpu_addr(13 downto 11) = "010") then waen_l <= '0'; end if;
|
||||
if (cpu_addr(13 downto 11) = "011") then objen_l <= '0'; end if;
|
||||
end if;
|
||||
elsif I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
if (page_4to7_l = '0') and (cpu_rfsh_l = '1') then
|
||||
if (cpu_addr(13 downto 11) = "010") then waen_l <= '0'; end if;
|
||||
if (cpu_addr(13 downto 11) = "001") then objen_l <= '0'; end if; -- error on the schematic, should be Y1, not Y3
|
||||
end if;
|
||||
elsif I_HWSEL /= I_HWSEL_FROGGER then
|
||||
if (page_4to7_l = '0') and (cpu_rfsh_l = '1') then
|
||||
if (cpu_addr(13 downto 11) = "001") then waen_l <= '0'; end if;
|
||||
@ -419,7 +431,7 @@ begin
|
||||
vramrd_l <= '1';
|
||||
objramrd_l <= '1';
|
||||
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX or I_HWSEL = I_HWSEL_TURTLES then
|
||||
if (page_4to7_l = '0') and (cpu_rd_l = '0') then
|
||||
if (cpu_addr(13 downto 11) = "010") then vramrd_l <= '0'; end if;
|
||||
end if;
|
||||
@ -438,7 +450,13 @@ begin
|
||||
objramwr_l <= '1';
|
||||
select_l <= '1';
|
||||
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_TURTLES then
|
||||
if (page_4to7_l = '0') and (cpu_wr_l = '0') and (wren = '1') then
|
||||
if (cpu_addr(13 downto 11) = "010") then vramwr_l <= '0'; end if;
|
||||
if (cpu_addr(13 downto 11) = "011") then objramwr_l <= '0'; end if;
|
||||
if (cpu_addr(13 downto 11) = "100") then select_l <= '0'; end if; -- control reg
|
||||
end if;
|
||||
elsif I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
if (page_4to7_l = '0') and (cpu_wr_l = '0') and (wren = '1') then
|
||||
if (cpu_addr(13 downto 11) = "010") then vramwr_l <= '0'; end if;
|
||||
if (cpu_addr(13 downto 11) = "001") then objramwr_l <= '0'; end if;
|
||||
@ -473,8 +491,12 @@ begin
|
||||
--6805 ? (POUT2)
|
||||
--6806 screen vertical flip
|
||||
--6807 screen horizontal flip
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_TURTLES then
|
||||
addr := cpu_addr(5 downto 3);
|
||||
elsif I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
addr := cpu_addr(3 downto 1);
|
||||
elsif I_HWSEL = I_HWSEL_MARS then
|
||||
addr := cpu_addr(3) & cpu_addr(1 downto 0);
|
||||
elsif I_HWSEL /= I_HWSEL_FROGGER then
|
||||
addr := cpu_addr(2 downto 0);
|
||||
else
|
||||
@ -510,25 +532,51 @@ begin
|
||||
|
||||
p_control_reg_assign : process(control_reg, I_HWSEL)
|
||||
begin
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
intst_l <= control_reg(2);
|
||||
iopc7 <= '0';
|
||||
pout1 <= '0';
|
||||
bcb <= '0';
|
||||
bcg <= '0';
|
||||
bcr <= '0';
|
||||
gfxbank <= "00";
|
||||
|
||||
if I_HWSEL = I_HWSEL_TURTLES then
|
||||
intst_l <= control_reg(1);
|
||||
bcb <= control_reg(5);
|
||||
bcg <= control_reg(4);
|
||||
bcr <= control_reg(0);
|
||||
iopc7 <= control_reg(6);
|
||||
starson <= '0';
|
||||
hcma <= control_reg(7);
|
||||
vcma <= not control_reg(6);
|
||||
hcma <= control_reg(3);
|
||||
vcma <= control_reg(7);
|
||||
elsif I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
intst_l <= control_reg(2);
|
||||
bcg <= control_reg(0);
|
||||
bcb <= control_reg(1);
|
||||
bcr <= control_reg(5);
|
||||
iopc7 <= '0';
|
||||
starson <= '0';
|
||||
hcma <= '0';--control_reg(7);
|
||||
vcma <= '0';--control_reg(6);
|
||||
elsif I_HWSEL = I_HWSEL_MARS then
|
||||
iopc7 <= control_reg(0);
|
||||
starson <= control_reg(1);
|
||||
intst_l <= control_reg(2);
|
||||
hcma <= control_reg(5);
|
||||
vcma <= control_reg(7);
|
||||
elsif I_HWSEL /= I_HWSEL_FROGGER then
|
||||
-- Scramble
|
||||
intst_l <= control_reg(1);
|
||||
iopc7 <= control_reg(2);
|
||||
pout1 <= control_reg(3);
|
||||
bcb <= control_reg(3); -- pout1
|
||||
starson <= control_reg(4);
|
||||
hcma <= control_reg(6);
|
||||
vcma <= control_reg(7);
|
||||
if I_HWSEL = I_HWSEL_MIMONKEY then
|
||||
gfxbank(0) <= control_reg(0);
|
||||
gfxbank(1) <= control_reg(2);
|
||||
end if;
|
||||
else
|
||||
intst_l <= control_reg(2);
|
||||
iopc7 <= control_reg(6);
|
||||
pout1 <= control_reg(7);
|
||||
bcb <= control_reg(7); -- pout1
|
||||
starson <= '0';
|
||||
hcma <= control_reg(4);
|
||||
vcma <= control_reg(3);
|
||||
@ -559,7 +607,7 @@ begin
|
||||
-- when others => null;
|
||||
-- end case;
|
||||
-- end process;
|
||||
rom_addr <= cpu_addr(14 downto 0);
|
||||
rom_addr <= cpu_addr(14 downto 4) & cpu_addr(2) & cpu_addr(0) & cpu_addr(3) & cpu_addr(1) when I_HWSEL = I_HWSEL_MARS else cpu_addr(14 downto 0);
|
||||
|
||||
u_cpu_ram : work.dpram generic map (11,8)
|
||||
port map
|
||||
@ -588,7 +636,7 @@ begin
|
||||
variable ram_addr : std_logic_vector(1 downto 0);
|
||||
begin
|
||||
|
||||
if I_HWSEL = I_HWSEL_SCRAMBLE then
|
||||
if I_HWSEL = I_HWSEL_SCRAMBLE or I_HWSEL = I_HWSEL_MARS or I_HWSEL = I_HWSEL_MIMONKEY then
|
||||
ram_addr := "01";
|
||||
else
|
||||
ram_addr := "10";
|
||||
@ -602,7 +650,9 @@ begin
|
||||
cpu_data_in <= I_DATA;
|
||||
--
|
||||
elsif (cpu_mreq_l = '0') and (cpu_rfsh_l = '1') then
|
||||
if (cpu_addr(15) = '0') and (I_HWSEL /= I_HWSEL_SCRAMBLE or cpu_addr(14) = '0') and (cpu_rd_l = '0') and (cpu_mreq_l = '0') and (cpu_rfsh_l = '1') then
|
||||
if I_HWSEL = I_HWSEL_MIMONKEY and (cpu_addr(15 downto 14) = "11" or cpu_addr(15 downto 14) = "00") and (cpu_rd_l = '0') then
|
||||
cpu_data_in <= rom_dout;
|
||||
elsif (cpu_addr(15) = '0') and I_HWSEL /= I_HWSEL_MIMONKEY and ((I_HWSEL /= I_HWSEL_SCRAMBLE and I_HWSEL /= I_HWSEL_MARS) or cpu_addr(14) = '0') and (cpu_rd_l = '0') then
|
||||
cpu_data_in <= rom_dout;
|
||||
--
|
||||
elsif (cpu_addr(15 downto 14) = ram_addr) then
|
||||
|
||||
@ -398,7 +398,18 @@ begin
|
||||
i8255_1D_cs_l <= '1';
|
||||
i8255_1E_cs_l <= '1';
|
||||
|
||||
if I_HWSEL = I_HWSEL_DARKPLNT then
|
||||
if I_HWSEL = I_HWSEL_TURTLES then
|
||||
-- the interface one
|
||||
if (I_ADDR(13 downto 11) = "111") and (I_ADDR(15) = '1') then
|
||||
i8255_1D_cs_l <= '0';
|
||||
end if;
|
||||
|
||||
-- the button one
|
||||
if (I_ADDR(13 downto 11) = "110") and (I_ADDR(15) = '1') then
|
||||
i8255_1E_cs_l <= '0';
|
||||
end if;
|
||||
i8255_addr <= I_ADDR(5 downto 4);
|
||||
elsif I_HWSEL = I_HWSEL_DARKPLNT or I_HWSEL = I_HWSEL_STRATGYX then
|
||||
-- the interface one
|
||||
if (I_ADDR(13 downto 11) = "101") and (I_ADDR(15) = '1') then
|
||||
i8255_1D_cs_l <= '0';
|
||||
@ -409,7 +420,8 @@ begin
|
||||
i8255_1E_cs_l <= '0';
|
||||
end if;
|
||||
i8255_addr <= I_ADDR(3 downto 2);
|
||||
elsif I_HWSEL = I_HWSEL_SCOBRA or I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_ANTEATER or I_HWSEL = I_HWSEL_LOSTTOMB then
|
||||
elsif I_HWSEL = I_HWSEL_SCOBRA or I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_ANTEATER or I_HWSEL = I_HWSEL_LOSTTOMB or
|
||||
I_HWSEL = I_HWSEL_MINEFLD or I_HWSEL = I_HWSEL_RESCUE then
|
||||
-- the interface one
|
||||
if (I_ADDR(13 downto 11) = "100") and (I_ADDR(15) = '1') then
|
||||
i8255_1D_cs_l <= '0';
|
||||
@ -430,7 +442,18 @@ begin
|
||||
if (I_ADDR(8) = '1') and (I_ADDR(15) = '1') then
|
||||
i8255_1E_cs_l <= '0';
|
||||
end if;
|
||||
i8255_addr <= I_ADDR(1 downto 0);
|
||||
|
||||
if I_HWSEL = I_HWSEL_MIMONKEY and I_ADDR(14) = '1' then
|
||||
-- This is ROM access in mimonkeyscr
|
||||
i8255_1D_cs_l <= '1';
|
||||
i8255_1E_cs_l <= '1';
|
||||
end if;
|
||||
|
||||
if I_HWSEL = I_HWSEL_MARS then
|
||||
i8255_addr <= I_ADDR(3) & I_ADDR(1);
|
||||
else
|
||||
i8255_addr <= I_ADDR(1 downto 0);
|
||||
end if;
|
||||
else
|
||||
-- the interface one
|
||||
if (I_ADDR(12) = '1') and (I_ADDR(15 downto 14) = "11") then
|
||||
@ -503,8 +526,14 @@ begin
|
||||
i8255_1E_pc <= I_PC when I_HWSEL = I_HWSEL_SCOBRA or
|
||||
I_HWSEL = I_HWSEL_CALIPSO or
|
||||
I_HWSEL = I_HWSEL_DARKPLNT or
|
||||
I_HWSEL = I_HWSEL_STRATGYX or
|
||||
I_HWSEL = I_HWSEL_ANTEATER or
|
||||
I_HWSEL = I_HWSEL_LOSTTOMB
|
||||
I_HWSEL = I_HWSEL_LOSTTOMB or
|
||||
I_HWSEL = I_HWSEL_MARS or
|
||||
I_HWSEL = I_HWSEL_TURTLES or
|
||||
I_HWSEL = I_HWSEL_MINEFLD or
|
||||
I_HWSEL = I_HWSEL_RESCUE or
|
||||
I_HWSEL = I_HWSEL_MIMONKEY
|
||||
else I_PC or net_1e10_i&'0'&net_1e12_i&"00000";
|
||||
|
||||
O_COIN_COUNTER <= not I_IOPC7; -- open drain actually
|
||||
|
||||
@ -7,8 +7,14 @@ package scramble_pack is
|
||||
constant I_HWSEL_FROGGER : integer := 1; -- this MUST be set true for frogger
|
||||
constant I_HWSEL_SCOBRA : integer := 2; -- SuperCobra, TazzMania
|
||||
constant I_HWSEL_CALIPSO : integer := 3; -- Calipso
|
||||
constant I_HWSEL_DARKPLNT : integer := 4; -- Dark Planet
|
||||
constant I_HWSEL_ANTEATER : integer := 5; -- Ant Eater (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_LOSTTOMB : integer := 6; -- Lost Tomb (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_DARKPLNT : integer := 4; -- Dark Planet
|
||||
constant I_HWSEL_STRATGYX : integer := 5; -- Strategy X
|
||||
constant I_HWSEL_ANTEATER : integer := 6; -- Ant Eater (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_LOSTTOMB : integer := 7; -- Lost Tomb (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_MINEFLD : integer := 8; -- Minefield (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_RESCUE : integer := 9; -- Rescue (SCOBRA with obj_ram address line obfuscation)
|
||||
constant I_HWSEL_MARS : integer := 10; -- Mars
|
||||
constant I_HWSEL_TURTLES : integer := 11; -- Turtles
|
||||
constant I_HWSEL_MIMONKEY : integer := 12; -- Mighty Monkey (use mimonscr bootleg ROMs to avoid writing the ROM decryptor)
|
||||
|
||||
end;
|
||||
|
||||
@ -48,9 +48,9 @@ library ieee;
|
||||
|
||||
entity SCRAMBLE_TOP is
|
||||
port (
|
||||
O_VIDEO_R : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_R : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(5 downto 0);
|
||||
O_HSYNC : out std_logic;
|
||||
O_VSYNC : out std_logic;
|
||||
O_HBLANK : out std_logic;
|
||||
|
||||
@ -70,11 +70,15 @@ entity SCRAMBLE_VIDEO is
|
||||
I_OBJEN_L : in std_logic;
|
||||
--
|
||||
I_STARSON : in std_logic;
|
||||
I_POUT1 : in std_logic;
|
||||
I_BCB : in std_logic;
|
||||
I_BCG : in std_logic;
|
||||
I_BCR : in std_logic;
|
||||
--
|
||||
O_VIDEO_R : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(3 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(3 downto 0);
|
||||
I_GFXBANK : in std_logic_vector(1 downto 0);
|
||||
--
|
||||
O_VIDEO_R : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_G : out std_logic_vector(5 downto 0);
|
||||
O_VIDEO_B : out std_logic_vector(5 downto 0);
|
||||
--
|
||||
ENA : in std_logic;
|
||||
ENAB : in std_logic;
|
||||
@ -159,6 +163,7 @@ architecture RTL of SCRAMBLE_VIDEO is
|
||||
signal obj_video_out_reg : std_logic_vector(4 downto 0);
|
||||
signal vidout_l : std_logic;
|
||||
signal obj_lut_out : std_logic_vector(7 downto 0);
|
||||
signal obj_lut_out2 : std_logic_vector(7 downto 0);
|
||||
|
||||
signal cntr_addr : std_logic_vector(7 downto 0);
|
||||
signal cntr_addr_xor : std_logic_vector(10 downto 0);
|
||||
@ -184,14 +189,17 @@ architecture RTL of SCRAMBLE_VIDEO is
|
||||
signal frogger_blue_reg : std_logic;
|
||||
signal frogger_blue : std_logic;
|
||||
signal frogger_blue_out_reg : std_logic;
|
||||
-- scramble blue
|
||||
signal pout1_reg : std_logic;
|
||||
-- background color shade
|
||||
signal bcb_reg : std_logic;
|
||||
signal bcg_reg : std_logic;
|
||||
signal bcr_reg : std_logic;
|
||||
|
||||
signal obj_dl_addr : std_logic_vector(12 downto 0);
|
||||
signal obj_rom_0_wr : std_logic;
|
||||
signal obj_rom_1_wr : std_logic;
|
||||
signal col_rom_wr : std_logic;
|
||||
|
||||
signal col_rom2_wr : std_logic;
|
||||
|
||||
begin
|
||||
p_hcnt_decode : process(I_HCNT)
|
||||
begin
|
||||
@ -406,14 +414,14 @@ begin
|
||||
end if;
|
||||
end process;
|
||||
|
||||
p_obj_rom_addr : process(h256, vram_addr_xor, vram_dout, objdata, I_HCNT, I_HWSEL)
|
||||
p_obj_rom_addr : process(h256, vram_addr_xor, vram_dout, objdata, I_HCNT, I_GFXBANK, I_HWSEL)
|
||||
variable obj_rom_addr_base : std_logic_vector(12 downto 0);
|
||||
begin
|
||||
obj_rom_addr_base( 2 downto 0) := vram_addr_xor(2 downto 0);
|
||||
if (h256 = '0') then
|
||||
obj_rom_addr_base(12 downto 3) := "00" & vram_dout; -- background objects
|
||||
obj_rom_addr_base(12 downto 3) := I_GFXBANK & vram_dout; -- background objects
|
||||
else
|
||||
obj_rom_addr_base(12 downto 11) := "00";
|
||||
obj_rom_addr_base(12 downto 11) := I_GFXBANK;
|
||||
if I_HWSEL = I_HWSEL_CALIPSO then
|
||||
obj_rom_addr_base(12 downto 11) := objdata(7 downto 6);
|
||||
end if;
|
||||
@ -432,13 +440,28 @@ begin
|
||||
(obj_rom_addr_base(7) xor (obj_rom_addr_base(1) and (obj_rom_addr_base(7) xor obj_rom_addr_base(10)))) &
|
||||
((obj_rom_addr_base(1) and obj_rom_addr_base(8)) or (not obj_rom_addr_base(1) and obj_rom_addr_base(10))) &
|
||||
obj_rom_addr_base(6 downto 0);
|
||||
elsif I_HWSEL = I_HWSEL_MINEFLD then
|
||||
obj_rom_addr <= "00" & obj_rom_addr_base(10) &
|
||||
(obj_rom_addr_base(0) xor obj_rom_addr_base(5) xor (obj_rom_addr_base(3) and obj_rom_addr_base(7))) &
|
||||
obj_rom_addr_base(8) &
|
||||
(obj_rom_addr_base(2) xor obj_rom_addr_base(9) xor (obj_rom_addr_base(0) and obj_rom_addr_base(5)) xor
|
||||
(obj_rom_addr_base(3) and obj_rom_addr_base(7) and (obj_rom_addr_base(0) xor obj_rom_addr_base(5)))) &
|
||||
obj_rom_addr_base(6) &
|
||||
(obj_rom_addr_base(3) xor obj_rom_addr_base(7)) &
|
||||
obj_rom_addr_base(4 downto 0);
|
||||
elsif I_HWSEL = I_HWSEL_RESCUE then
|
||||
obj_rom_addr <= "00" & (obj_rom_addr_base(0) xor obj_rom_addr_base(8)) &
|
||||
obj_rom_addr_base(9) &
|
||||
(obj_rom_addr_base(1) xor obj_rom_addr_base(7)) &
|
||||
(obj_rom_addr_base(3) xor obj_rom_addr_base(10)) &
|
||||
obj_rom_addr_base(6 downto 0);
|
||||
else
|
||||
obj_rom_addr <= obj_rom_addr_base;
|
||||
end if;
|
||||
|
||||
end process;
|
||||
|
||||
obj_dl_addr <= dl_addr(12 downto 0) when I_HWSEL = I_HWSEL_CALIPSO else "00"&dl_addr(10 downto 0);
|
||||
obj_dl_addr <= dl_addr(12 downto 0) when I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_MIMONKEY else "00"&dl_addr(10 downto 0);
|
||||
|
||||
obj_rom0 : work.dpram generic map (13,8) --5H
|
||||
port map
|
||||
@ -455,8 +478,8 @@ begin
|
||||
data_b_o => obj_rom_0_dout
|
||||
);
|
||||
obj_rom_0_wr <= '1' when dl_wr = '1' and
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and dl_addr(15 downto 11) = "10100") or -- A000-A7FF
|
||||
(I_HWSEL = I_HWSEL_CALIPSO and dl_addr(15 downto 13) = "101")) -- A000-BFFF
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and I_HWSEL /= I_HWSEL_MIMONKEY and dl_addr(15 downto 11) = "10100") or -- A000-A7FF
|
||||
((I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_MIMONKEY) and dl_addr(15 downto 13) = "101")) -- A000-BFFF
|
||||
else '0';
|
||||
|
||||
obj_rom1 : work.dpram generic map (13,8) --5F
|
||||
@ -474,8 +497,8 @@ begin
|
||||
data_b_o => obj_rom_1_dout
|
||||
);
|
||||
obj_rom_1_wr <= '1' when dl_wr = '1' and
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and dl_addr(15 downto 11) = "10101") or -- A800-AFFF
|
||||
(I_HWSEL = I_HWSEL_CALIPSO and dl_addr(15 downto 13) = "110")) -- C000-DFFF
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and I_HWSEL /= I_HWSEL_MIMONKEY and dl_addr(15 downto 11) = "10101") or -- A800-AFFF
|
||||
((I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_MIMONKEY) and dl_addr(15 downto 13) = "110")) -- C000-DFFF
|
||||
else '0';
|
||||
|
||||
-- obj_rom0 : entity work.ROM_OBJ_0 -- 5H
|
||||
@ -665,7 +688,9 @@ begin
|
||||
shell_reg <= '0';
|
||||
frogger_blue_out_reg <= '0';
|
||||
star_out_reg <= '0';
|
||||
pout1_reg <= '0';
|
||||
bcb_reg <= '0';
|
||||
bcg_reg <= '0';
|
||||
bcr_reg <= '0';
|
||||
else
|
||||
|
||||
obj_video_out_reg(4 downto 2) <= col(2 downto 0);
|
||||
@ -680,7 +705,9 @@ begin
|
||||
star_out_reg <= (vcnt_f(0) xor hcnt_f(3)) and (not star_shift(16));
|
||||
end if;
|
||||
|
||||
pout1_reg <= I_POUT1;
|
||||
bcb_reg <= I_BCB;
|
||||
bcg_reg <= I_BCG;
|
||||
bcr_reg <= I_BCR;
|
||||
|
||||
end if;
|
||||
end if;
|
||||
@ -709,8 +736,8 @@ begin
|
||||
data_b_o => obj_lut_out
|
||||
);
|
||||
col_rom_wr <= '1' when dl_wr = '1' and
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and dl_addr(15 downto 5) = x"B0"&"000") or -- B000-B01F
|
||||
(I_HWSEL = I_HWSEL_CALIPSO and dl_addr(15 downto 5) = x"E0"&"000")) -- E000-E01F
|
||||
((I_HWSEL /= I_HWSEL_CALIPSO and I_HWSEL /= I_HWSEL_MIMONKEY and dl_addr(15 downto 5) = x"B0"&"000") or -- B000-B01F
|
||||
((I_HWSEL = I_HWSEL_CALIPSO or I_HWSEL = I_HWSEL_MIMONKEY) and dl_addr(15 downto 5) = x"E0"&"000")) -- E000-E01F
|
||||
else '0';
|
||||
|
||||
-- col_rom : entity work.ROM_LUT
|
||||
@ -720,8 +747,29 @@ begin
|
||||
-- DATA => obj_lut_out
|
||||
-- );
|
||||
|
||||
-- 10K
|
||||
col_rom2 : work.dpram generic map (5,8)
|
||||
port map
|
||||
(
|
||||
clk_a_i => clk,
|
||||
en_a_i => '1',
|
||||
we_i => col_rom2_wr,
|
||||
|
||||
addr_a_i => dl_addr(4 downto 0),
|
||||
data_a_i => dl_data,
|
||||
|
||||
clk_b_i => clk,
|
||||
addr_b_i => cntr_addr_xor(7 downto 3),
|
||||
data_b_o => obj_lut_out2
|
||||
);
|
||||
col_rom2_wr <= '1' when dl_wr = '1' and
|
||||
(I_HWSEL /= I_HWSEL_CALIPSO and I_HWSEL /= I_HWSEL_MIMONKEY and dl_addr(15 downto 5) = x"B0"&"001") -- B020-B03F
|
||||
else '0';
|
||||
|
||||
p_col_rom_ce : process
|
||||
variable video : array_3x5;
|
||||
variable bgc_dis: std_logic_vector(2 downto 0);
|
||||
variable i_hcnt_adj: std_logic_vector(8 downto 0);
|
||||
begin
|
||||
wait until rising_edge(CLK);
|
||||
if (ENA = '1') then
|
||||
@ -763,11 +811,28 @@ begin
|
||||
video(1) := video(1) + ( '0' & star_shift_t1(11 downto 10) & "00");
|
||||
video(2) := video(2) + ( '0' & star_shift_t1( 9 downto 8) & "00");
|
||||
end if;
|
||||
|
||||
if (pout1_reg = '1') and (vidout_l = '1') then
|
||||
video(0) := video(0) + ("00011");
|
||||
end if;
|
||||
end if;
|
||||
|
||||
if I_HWSEL = I_HWSEL_STRATGYX then
|
||||
-- bit 1 and 0 from the second LUT ROM disables bcX_regs
|
||||
bgc_dis := obj_lut_out2(1) & obj_lut_out2(1 downto 0);
|
||||
elsif I_HWSEL = I_HWSEL_MINEFLD or I_HWSEL = I_HWSEL_RESCUE or I_HWSEL = I_HWSEL_FROGGER then
|
||||
-- these are handling the bg registers differently
|
||||
bgc_dis := "111";
|
||||
else
|
||||
bgc_dis := "000";
|
||||
end if;
|
||||
|
||||
if (bcb_reg = '1') and (vidout_l = '1') and (bgc_dis(0) = '0') then
|
||||
video(0) := video(0) + ("00011");
|
||||
end if;
|
||||
if (bcg_reg = '1') and (vidout_l = '1') and (bgc_dis(1) = '0') then
|
||||
video(1) := video(1) + ("00011");
|
||||
end if;
|
||||
if (bcr_reg = '1') and (vidout_l = '1') and (bgc_dis(2) = '0') then
|
||||
video(2) := video(2) + ("00011");
|
||||
end if;
|
||||
|
||||
-- check for clip
|
||||
for i in 0 to 2 loop
|
||||
if video(i)(4) = '1' or video(i)(3) = '1' then
|
||||
@ -775,9 +840,28 @@ begin
|
||||
end if;
|
||||
end loop;
|
||||
|
||||
O_VIDEO_B <= video(0)(2 downto 0) & video(0)(2);
|
||||
O_VIDEO_G <= video(1)(2 downto 0) & video(1)(2);
|
||||
O_VIDEO_R <= video(2)(2 downto 0) & video(2)(2);
|
||||
i_hcnt_adj := I_HCNT - "1001";
|
||||
if (I_HWSEL = I_HWSEL_RESCUE or (I_HWSEL = I_HWSEL_MINEFLD and i_hcnt_adj(7) = '0')) and
|
||||
bcb_reg = '1' and I_HCNT(8) = '1' and
|
||||
video(0) = "0000" and video(1) = "0000" and video(2) = "0000"
|
||||
then
|
||||
-- Rescue and Minefield blue graduated background, no schematics, just guessing
|
||||
O_VIDEO_B <= i_hcnt_adj(6 downto 1);
|
||||
O_VIDEO_G <= '0' & i_hcnt_adj(6 downto 2);
|
||||
O_VIDEO_R <= (others => '0');
|
||||
elsif I_HWSEL = I_HWSEL_MINEFLD and i_hcnt_adj(7) = '1' and
|
||||
bcb_reg = '1' and I_HCNT(8) = '1' and
|
||||
video(0) = "0000" and video(1) = "0000" and video(2) = "0000"
|
||||
then
|
||||
-- Minefield brown graduated background
|
||||
O_VIDEO_B <= (others => '0');
|
||||
O_VIDEO_G <= '0' & i_hcnt_adj(6 downto 2);
|
||||
O_VIDEO_R <= i_hcnt_adj(6 downto 1);
|
||||
else
|
||||
O_VIDEO_B <= video(0)(2 downto 0) & video(0)(2 downto 0);
|
||||
O_VIDEO_G <= video(1)(2 downto 0) & video(1)(2 downto 0);
|
||||
O_VIDEO_R <= video(2)(2 downto 0) & video(2)(2 downto 0);
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
use ieee.std_logic_unsigned.all;
|
||||
use ieee.numeric_std.all;
|
||||
|
||||
entity spinner is
|
||||
port(
|
||||
clock : in std_logic;
|
||||
reset : in std_logic;
|
||||
btn_left : in std_logic;
|
||||
btn_right : in std_logic;
|
||||
btn_acc : in std_logic; -- speed up button
|
||||
strobe : in std_logic;
|
||||
spin_angle : out std_logic_vector(6 downto 0)
|
||||
);
|
||||
end spinner;
|
||||
|
||||
architecture rtl of spinner is
|
||||
|
||||
signal strobe_r : std_logic;
|
||||
signal spin_count : std_logic_vector(9 downto 0);
|
||||
|
||||
begin
|
||||
|
||||
spin_angle <= spin_count(9 downto 3);
|
||||
|
||||
process (clock, reset)
|
||||
begin
|
||||
if reset = '1' then
|
||||
spin_count <= (others => '0');
|
||||
elsif rising_edge(clock) then
|
||||
strobe_r <= strobe;
|
||||
|
||||
if strobe_r ='0' and strobe = '1' then
|
||||
if btn_acc = '0' then -- space -- speed up
|
||||
if btn_left = '1' then spin_count <= spin_count - 8; end if; -- left
|
||||
if btn_right = '1' then spin_count <= spin_count + 8; end if; -- right
|
||||
else
|
||||
if btn_left = '1' then spin_count <= spin_count - 55; end if;
|
||||
if btn_right = '1' then spin_count <= spin_count + 55; end if;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
end rtl;
|
||||
Loading…
x
Reference in New Issue
Block a user