Druaga: add Grobda

Arcade_MiST/Namco Super Pacman Hardware/meta/Grobda.mra

@@ -5,7 +5,7 @@
 	<mratimestamp>20210307</mratimestamp>
 	<rbf>druaga</rbf>
 	<rom index="1">
-		<part>05</part>
+		<part>06</part>
 	</rom>
 	<rom index="0" zip="grobda.zip" md5="None">
 		<!-- main CPU -->

Arcade_MiST/Namco Super Pacman Hardware/rtl/TheTowerofDruaga_mist.sv

@@ -91,7 +91,7 @@ always @(*) begin
 	DSW2 = 0;
 
 	case (core_mod)
-	7'h0, 7'h1, 7'h3: // DRUAGA, DIGDUG2
+	7'h0, 7'h1, 7'h3, 7'h6: // DRUAGA, DIGDUG2, GROBDA
 	begin
 		DSW0 = status[15:8];
 		DSW1 = status[23:16];

Arcade_MiST/Namco Super Pacman Hardware/rtl/druaga_sprite.v

@@ -29,6 +29,7 @@ module DRUAGA_SPRITE
 );
 
 parameter [2:0] SUPERPAC=3'd5;
+parameter [2:0] GROBDA=3'd6;
 
 reg  [9:0]  CLT1_A;
 wire [3:0]  CLT1_D;
@@ -91,7 +92,7 @@ always @(*) begin
              (ox[1:0]==2'b01) ? { pn, SPCO[14], SPCO[10], SPCO[6], SPCO[2] } :
              (ox[1:0]==2'b10) ? { pn, SPCO[13], SPCO[ 9], SPCO[5], SPCO[1] } :
                                 { pn, SPCO[12], SPCO[ 8], SPCO[4], SPCO[0] } ;
-    if( MODEL == SUPERPAC ) begin  // 2bpp
+    if( MODEL == SUPERPAC || MODEL == GROBDA) begin  // 2bpp
         CLT1_A[9:2]= { 2'd0, CLT1_A[9:4] };
     end
 end

Arcade_MiST/Namco Super Pacman Hardware/rtl/druaga_video.v

@@ -36,6 +36,7 @@ module DRUAGA_VIDEO
 );
 
 parameter [2:0] SUPERPAC=3'd5;
+parameter [2:0] GROBDA=3'd6;
 
 wire [8:0] HPOS = PH-8'd16;
 wire [8:0] VPOS = PV;
@@ -90,11 +91,11 @@ always @ ( posedge VCLKx8 ) begin
 end
 
 
-assign CLT0_A = BGPN ^ ( MODEL==SUPERPAC ? 8'h0 : 8'h03 );
-assign VRAM_A = VRAMADRS & ( MODEL==SUPERPAC ? 11'h3FF : 11'h7FF );
+assign CLT0_A = BGPN ^ ( (MODEL==SUPERPAC || MODEL==GROBDA) ? 8'h0 : 8'h03 );
+assign VRAM_A = VRAMADRS & ( (MODEL==SUPERPAC || MODEL==GROBDA) ? 11'h3FF : 11'h7FF );
 
 wire            BGHI  = BGH & (CLT0_D!=4'd15);
-wire    [4:0]   BGCOL = { 1'b1, (MODEL==SUPERPAC ? ~CLT0_D :CLT0_D) };
+wire    [4:0]   BGCOL = { 1'b1, ((MODEL==SUPERPAC || MODEL==GROBDA) ? ~CLT0_D :CLT0_D) };
 
 always @(*) begin
     COL  = HPOS[8:3] ^ {5{FLIP_SCREEN}};
@@ -102,7 +103,7 @@ always @(*) begin
     // rather than the original circuit count.
     ROW = (VPOS[8:3] + 6'h2) ^ {5{FLIP_SCREEN}};
 
-    if( MODEL==SUPERPAC ) begin
+    if( MODEL==SUPERPAC  || MODEL==GROBDA ) begin
         VRAMADRS = { 1'b0,
                       COL[5] ? {COL[4:0], ROW[4:0]} :
                                {ROW[4:0], COL[4:0]}

Arcade_MiST/Namco Super Pacman Hardware/rtl/fpga_druaga.v

@@ -242,6 +242,7 @@ module MEMS
 );
 
 parameter [2:0] SUPERPAC=3'd5;
+parameter [2:0] GROBDA=3'd6;
 
 wire [7:0] mrom_d, srom_d;
 //DLROM #(15,8) mcpui( CPUCLKx2, MCPU_ADRS[14:0], mrom_d, ROMCL,ROMAD[14:0],ROMDT,ROMEN & (ROMAD[16:15]==2'b0_0));
@@ -265,7 +266,7 @@ wire mrom_cs  = ( MCPU_ADRS[15] ) & MCPU_VMA;    // $8000-$FFFF
 
 always @(*) begin
     cram_ad = mram_ad;
-    if( MODEL == SUPERPAC ) begin
+    if( MODEL == SUPERPAC || MODEL == GROBDA) begin
         mram_cs0 = ( MCPU_ADRS[15:10] == 6'b000000 ) && MCPU_VMA;    // $0000-$03FF
         mram_cs1 = ( MCPU_ADRS[15:10] == 6'b000001 ) && MCPU_VMA;    // $0400-$07FF
         mram_cs2 = ( MCPU_ADRS[15:11] == 5'b00001  ) && MCPU_VMA;    // $1000-$17FF
@@ -352,6 +353,7 @@ module REGS
 );
 
 parameter [2:0] SUPERPAC=3'd5;
+parameter [2:0] GROBDA=3'd6;
 
 // BG Scroll Register
 wire    MCPU_SCRWE = ( ( MCPU_ADRS[15:11] == 5'b00111 ) & MCPU_VMA & MCPU_WE );
@@ -359,7 +361,7 @@ wire    MCPU_SCRWE = ( ( MCPU_ADRS[15:11] == 5'b00111 ) & MCPU_VMA & MCPU_WE );
 always @ ( negedge MCPU_CLK or posedge RESET ) begin
     if ( RESET ) SCROLL <= 8'h0;
     else begin
-        if( MODEL==SUPERPAC )
+        if( MODEL==SUPERPAC || MODEL==GROBDA)
             SCROLL <= 8'd0;
         else if ( MCPU_SCRWE )
             SCROLL <= MCPU_ADRS[10:3];

Arcade_MiST/Namco Super Pacman Hardware/rtl/ioctrl.v

@@ -46,6 +46,7 @@ reg             bIOMode;
 
 parameter [2:0] SUPERPAC=3'd5;
 
+
 assign  OUT = { 4'b1111, outr };
 assign  IsMOTOS = bIOMode;