Scramble HW updates

- Add Blending option to OSD
- Fix MoonWar's controls
- AmoredCar -> ArmoredCar

Arcade_MiST/Konami Scramble Hardware/Amidar_MiST/Amidar.qsf

@@ -40,7 +40,7 @@
 # Project-Wide Assignments
 # ========================
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017"
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
@@ -142,6 +142,8 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 
 # end ENTITY(Amidar)
 # ------------------
+set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
+set_global_assignment -name SMART_RECOMPILE ON
 set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
 set_global_assignment -name SYSTEMVERILOG_FILE rtl/Amidar.sv
 set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
@@ -166,7 +168,4 @@ set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
 set_global_assignment -name QIP_FILE rtl/pll.qip
 set_global_assignment -name VHDL_FILE rtl/dpram.vhd
 set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
-set_global_assignment -name SMART_RECOMPILE ON
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

Arcade_MiST/Konami Scramble Hardware/Amidar_MiST/rtl/Amidar.sv

@@ -45,6 +45,7 @@ localparam CONF_STR = {
 //	"O1,Service ,On,Off;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.20.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble(
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -155,7 +158,7 @@ user_io(
 	.status         (status         )
 	);
 
-dac dac(
+dac #(10) dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),

Arcade_MiST/Konami Scramble Hardware/Amidar_MiST/rtl/dac.vhd

@@ -1,48 +0,0 @@
--------------------------------------------------------------------------------
---
--- Delta-Sigma DAC
---
--- Refer to Xilinx Application Note XAPP154.
---
--- This DAC requires an external RC low-pass filter:
---
---   dac_o 0---XXXXX---+---0 analog audio
---              3k3    |
---                    === 4n7
---                     |
---                    GND
---
--------------------------------------------------------------------------------
-
-library ieee;
-	use ieee.std_logic_1164.all;
-	use ieee.numeric_std.all;
-
-entity dac is
-	generic (
-		C_bits  : integer := 10
-	);
-	port (
-		clk_i   : in  std_logic;
-		res_n_i : in  std_logic;
-		dac_i   : in  std_logic_vector(C_bits-1 downto 0);
-		dac_o   : out std_logic
-	);
-end dac;
-
-architecture rtl of dac is
-	signal sig_in: unsigned(C_bits downto 0);
-begin
-	seq: process(clk_i, res_n_i)
-	begin
-		if res_n_i = '0' then
-			sig_in <= to_unsigned(2**C_bits, sig_in'length);
-			dac_o  <= '0';
-		elsif rising_edge(clk_i) then
-		        -- not dac_i(C_bits-1) effectively adds 0x8..0 to dac_i
-			--sig_in <= sig_in + unsigned(sig_in(C_bits) & (not dac_i(C_bits-1)) & dac_i(C_bits-2 downto 0));
-			sig_in <= sig_in + unsigned(sig_in(C_bits) & dac_i);
-			dac_o  <= sig_in(C_bits);
-		end if;
-	end process seq;
-end rtl;

Arcade_MiST/Konami Scramble Hardware/AmoredCar_MiST/AmoredCar.srf

@@ -1,52 +0,0 @@
-{ "" "" "" "Variable or input pin \"data_b\" is defined but never used." {  } {  } 0 287013 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Found combinational loop of 47 nodes" {  } {  } 0 332125 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "LOCKED port on the PLL is not properly connected on instance \"pll_hdmi:pll_hdmi\|pll_hdmi_0002:pll_hdmi_inst\|altera_pll:altera_pll_i\|general\[0\].gpll\". The LOCKED port on the PLL should be connected when the FBOUTCLK port is connected. Although it is unnecessary to connect the LOCKED signal, any logic driven off of an output clock of the PLL will not know when the PLL is locked and ready." {  } {  } 0 21300 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Net \"soc_system:soc_system\|soc_system_Video_Output:video_output\|alt_vip_cvo_core:cvo_core\|genlock_enable_sync1\[1\]\" is missing source, defaulting to GND" {  } {  } 0 12110 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Inferred RAM node \"zxspectrum:emu\|mist_io:mist_io\|ps2_kbd_fifo_rtl_0\" from synchronous design logic.  Pass-through logic has been added to match the read-during-write behavior of the original design." {  } {  } 0 276020 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Inferred RAM node \"zxspectrum:emu\|mist_io:mist_io\|ps2_mouse_fifo_rtl_0\" from synchronous design logic.  Pass-through logic has been added to match the read-during-write behavior of the original design." {  } {  } 0 276020 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "No destination clock period was found satisfying the set_net_delay assignment from \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|h_sync_polarity_reg\}\]\" to \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|vid_h_sync_polarity\}\]\". This assignment will be ignored." {  } {  } 0 17897 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "No destination clock period was found satisfying the set_net_delay assignment from \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|v_sync_polarity_reg\}\]\" to \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|vid_v_sync_polarity\}\]\". This assignment will be ignored." {  } {  } 0 17897 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "No destination clock period was found satisfying the set_net_delay assignment from \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|interlaced_field_reg\[*\]\}\]\" to \"\[get_keepers \{soc_system\|video_output\|cvo_core\|mode_banks\|vid_interlaced_field\[*\]\}\]\". This assignment will be ignored." {  } {  } 0 17897 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "55 hierarchies have connectivity warnings - see the Connectivity Checks report folder" {  } {  } 0 12241 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Inferred RAM node \"emu:emu\|mister_io:mister_io\|ps2_kbd_fifo_rtl_0\" from synchronous design logic.  Pass-through logic has been added to match the read-during-write behavior of the original design." {  } {  } 0 276020 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Inferred RAM node \"emu:emu\|mister_io:mister_io\|ps2_mouse_fifo_rtl_0\" from synchronous design logic.  Pass-through logic has been added to match the read-during-write behavior of the original design." {  } {  } 0 276020 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Verilog HDL or VHDL warning at de10_top.v(97): object \"io_win\" assigned a value but never read" {  } {  } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Verilog HDL or VHDL warning at de10_top.v(102): object \"io_sdd\" assigned a value but never read" {  } {  } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Overwriting existing clock: vip\|hps\|fpga_interfaces\|clocks_resets\|h2f_user0_clk" {  } {  } 0 332043 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "Variable or input pin \"data_a\" is defined but never used." {  } {  } 0 287013 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 169085 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 174073 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 332174 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 13009 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 21300 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "*" {  } {  } 0 332060 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_cvo_mode_banks" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "hps_sdram_pll.sv" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_common_frame_counter.v" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "hps_sdram_p0_acv_hard_memphy.v" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "hps_sdram_p0_acv_ldc.v" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "hps_sdram_p0_acv_hard_io_pads.v" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "altera_mem_if_hard_memory_controller_top_cyclonev.sv" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "genlock_enable_sync" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "u_calculate_mode" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "genlock_enable" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "reset_value" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system:soc_system\|soc_system_pll_video:pll_video\|altera_pll:altera_pll_i\|general\[0\].gpll" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_cvo_core.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_packet_transfer.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "hps_sdram_p0.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_common_dc_mixed_widths_fifo.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "altera_mem_if_hhp_qseq_synth_top" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system:soc_system\|soc_system_vip_vout:vip_vout\|alt_vip_cvo_core:cvo_core\|genlock_enable_sync1" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system:soc_system\|soc_system_vip_fb:vip_fb\|alt_vip_packet_transfer:pkt_trans_rd\|alt_vip_packet_transfer_read_proc:READ_BLOCK.read_proc_instance\|alt_vip_common_fifo2:output_msg_queue\|scfifo:scfifo_component\|scfifo_scd1:auto_generated\|a_dpfifo_e471:dpfifo\|altsyncram_ums1:FIFOram\|q_b" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system:soc_system\|soc_system_Video_Input:video_input\|alt_vip_cvi_core:cvi_core\|alt_vip_cvi_write_fifo_buffer:write_fifo_buffer" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system:soc_system\|soc_system_Frame_Buffer:frame_buffer\|alt_vip_packet_transfer:pkt_trans_rd" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system_hps_fpga_interfaces.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "soc_system_HPS_fpga_interfaces.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "RST" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_scaler_alg_core" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "cvo_core" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "vip_HPS_fpga_interfaces.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_dil_vof_scheduler.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}
-{ "" "" "" "alt_vip_dil_scheduler.sdc" {  } {  } 0 9999 "" 0 0 "Quartus II" 0 -1 0 ""}

Arcade_MiST/Konami Scramble Hardware/ArmoredCar_MiST/ArmoredCar.qpf

@@ -28,4 +28,4 @@ DATE = "04:04:47  October 16, 2017"
 
 # Revisions
 
-PROJECT_REVISION = "AmoredCar"
+PROJECT_REVISION = "ArmoredCar"

Arcade_MiST/Konami Scramble Hardware/ArmoredCar_MiST/ArmoredCar.qsf

@@ -25,7 +25,7 @@
 # Notes:
 #
 # 1) The default values for assignments are stored in the file:
-#		AmoredCar_assignment_defaults.qdf
+#		ArmoredCar_assignment_defaults.qdf
 #    If this file doesn't exist, see file:
 #		assignment_defaults.qdf
 #
@@ -40,12 +40,12 @@
 # Project-Wide Assignments
 # ========================
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017"
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/AmoredCar_Mist.sv
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/ArmoredCar_Mist.sv
 set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
 set_global_assignment -name VHDL_FILE rtl/scramble.vhd
 set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
@@ -113,7 +113,7 @@ set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
 set_global_assignment -name FAMILY "Cyclone III"
 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
-set_global_assignment -name TOP_LEVEL_ENTITY AmoredCar_Mist
+set_global_assignment -name TOP_LEVEL_ENTITY ArmoredCar_Mist
 set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
 
 # Fitter Assignments
@@ -150,20 +150,20 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
 
 # ----------------------------
-# start ENTITY(AmoredCar_Mist)
+# start ENTITY(ArmoredCar_Mist)
 
 	# start DESIGN_PARTITION(Top)
 	# ---------------------------
 
 		# Incremental Compilation Assignments
 		# ===================================
-		set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-		set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-		set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-		set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
 
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
-# end ENTITY(AmoredCar_Mist)
-# --------------------------
+# end ENTITY(ArmoredCar_Mist)
+# --------------------------
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

Arcade_MiST/Konami Scramble Hardware/ArmoredCar_MiST/README.txt

@@ -1,6 +1,6 @@
 ---------------------------------------------------------------------------------
 -- 
--- Arcade: Amored Car port to MiST by Gehstock
+-- Arcade: Armored Car port to MiST by Gehstock
 -- 10 November 2017
 -- 
 ---------------------------------------------------------------------------------

Arcade_MiST/Konami Scramble Hardware/ArmoredCar_MiST/rtl/ArmoredCar_Mist.sv

@@ -1,5 +1,5 @@
 //============================================================================
-//  Arcade: Amored Car
+//  Arcade: Armored Car
 //
 //  Port to MiSTer
 //  Copyright (C) 2017 Sorgelig
@@ -19,7 +19,7 @@
 //  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 //============================================================================
 
-module AmoredCar_Mist
+module ArmoredCar_Mist
 (
 	output        LED,						
 	output  [5:0] VGA_R,
@@ -41,9 +41,10 @@ module AmoredCar_Mist
 `include "rtl\build_id.v"
 
 localparam CONF_STR = {
-	"Amored Car;;",
+	"ArmCar;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)

Arcade_MiST/Konami Scramble Hardware/Calipso_MiST/Calipso.sdc

@@ -0,0 +1,126 @@
+## Generated SDC file "vectrex_MiST.out.sdc"
+
+## Copyright (C) 1991-2013 Altera Corporation
+## Your use of Altera Corporation's design tools, logic functions 
+## and other software and tools, and its AMPP partner logic 
+## functions, and any output files from any of the foregoing 
+## (including device programming or simulation files), and any 
+## associated documentation or information are expressly subject 
+## to the terms and conditions of the Altera Program License 
+## Subscription Agreement, Altera MegaCore Function License 
+## Agreement, or other applicable license agreement, including, 
+## without limitation, that your use is for the sole purpose of 
+## programming logic devices manufactured by Altera and sold by 
+## Altera or its authorized distributors.  Please refer to the 
+## applicable agreement for further details.
+
+
+## VENDOR  "Altera"
+## PROGRAM "Quartus II"
+## VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition"
+
+## DATE    "Sun Jun 24 12:53:00 2018"
+
+##
+## DEVICE  "EP3C25E144C8"
+##
+
+# Clock constraints
+
+# Automatically constrain PLL and other generated clocks
+derive_pll_clocks -create_base_clocks
+
+# Automatically calculate clock uncertainty to jitter and other effects.
+derive_clock_uncertainty
+
+# tsu/th constraints
+
+# tco constraints
+
+# tpd constraints
+
+#**************************************************************
+# Time Information
+#**************************************************************
+
+set_time_format -unit ns -decimal_places 3
+
+
+
+#**************************************************************
+# Create Clock
+#**************************************************************
+
+create_clock -name {SPI_SCK}  -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}]
+
+#**************************************************************
+# Create Generated Clock
+#**************************************************************
+
+
+#**************************************************************
+# Set Clock Latency
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Uncertainty
+#**************************************************************
+
+#**************************************************************
+# Set Input Delay
+#**************************************************************
+
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {CLOCK_27}]  1.000 [get_ports {CLOCK_27}]
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {CONF_DATA0}]
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {SPI_DI}]
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {SPI_SCK}]
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {SPI_SS2}]
+set_input_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {SPI_SS3}]
+
+#**************************************************************
+# Set Output Delay
+#**************************************************************
+
+set_output_delay -add_delay  -clock_fall -clock [get_clocks {SPI_SCK}]  1.000 [get_ports {SPI_DO}]
+set_output_delay -add_delay  -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}]  1.000 [get_ports {AUDIO_L}]
+set_output_delay -add_delay  -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}]  1.000 [get_ports {AUDIO_R}]
+set_output_delay -add_delay  -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}]  1.000 [get_ports {LED}]
+set_output_delay -add_delay  -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}]  1.000 [get_ports {VGA_*}]
+
+#**************************************************************
+# Set Clock Groups
+#**************************************************************
+
+set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks {pll|altpll_component|auto_generated|pll1|clk[*]}]
+
+#**************************************************************
+# Set False Path
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Multicycle Path
+#**************************************************************
+
+set_multicycle_path -to {VGA_*[*]} -setup 2
+set_multicycle_path -to {VGA_*[*]} -hold 1
+
+#**************************************************************
+# Set Maximum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Minimum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Input Transition
+#**************************************************************
+

Arcade_MiST/Konami Scramble Hardware/Calipso_MiST/rtl/Calipso_Mist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Calipso;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O1,Blending,Off,On;",
 //	"O5,Service,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
@@ -114,7 +115,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -130,6 +131,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[1]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -156,10 +159,10 @@ user_io(
 	.status         (status         )
 	);
 
-dac #(16)dac(
+dac #(10)dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
-	.dac_i({audio, audio[9:5]}),
+	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
 //											Rotated														Normal

Arcade_MiST/Konami Scramble Hardware/Frogger_MiST/Frogger.qsf

@@ -40,7 +40,7 @@
 # Project-Wide Assignments
 # ========================
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017"
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
@@ -167,5 +167,4 @@ set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
 set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
 set_global_assignment -name QIP_FILE rtl/pll.qip
 set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

Arcade_MiST/Konami Scramble Hardware/Frogger_MiST/rtl/FroggerMist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Frogger;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.20.",`BUILD_DATE
 };
@@ -108,7 +109,7 @@ scramble_top scramble(
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4), .SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -124,6 +125,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -150,7 +153,7 @@ user_io(
 	.status         (status         )
 	);
 
-dac dac(
+dac #(10) dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),

Arcade_MiST/Konami Scramble Hardware/Frogger_MiST/rtl/dac.vhd

@@ -1,48 +0,0 @@
--------------------------------------------------------------------------------
---
--- Delta-Sigma DAC
---
--- Refer to Xilinx Application Note XAPP154.
---
--- This DAC requires an external RC low-pass filter:
---
---   dac_o 0---XXXXX---+---0 analog audio
---              3k3    |
---                    === 4n7
---                     |
---                    GND
---
--------------------------------------------------------------------------------
-
-library ieee;
-	use ieee.std_logic_1164.all;
-	use ieee.numeric_std.all;
-
-entity dac is
-	generic (
-		C_bits  : integer := 10
-	);
-	port (
-		clk_i   : in  std_logic;
-		res_n_i : in  std_logic;
-		dac_i   : in  std_logic_vector(C_bits-1 downto 0);
-		dac_o   : out std_logic
-	);
-end dac;
-
-architecture rtl of dac is
-	signal sig_in: unsigned(C_bits downto 0);
-begin
-	seq: process(clk_i, res_n_i)
-	begin
-		if res_n_i = '0' then
-			sig_in <= to_unsigned(2**C_bits, sig_in'length);
-			dac_o  <= '0';
-		elsif rising_edge(clk_i) then
-		        -- not dac_i(C_bits-1) effectively adds 0x8..0 to dac_i
-			--sig_in <= sig_in + unsigned(sig_in(C_bits) & (not dac_i(C_bits-1)) & dac_i(C_bits-2 downto 0));
-			sig_in <= sig_in + unsigned(sig_in(C_bits) & dac_i);
-			dac_o  <= sig_in(C_bits);
-		end if;
-	end process seq;
-end rtl;

Arcade_MiST/Konami Scramble Hardware/MoonWar_MiST/rtl/MoonWar_Mist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Moon War;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -164,8 +167,8 @@ dac #(10)dac(
 //											Rotated														Normal
 //wire m_up1     = ~status[2] ? btn_left | joystick_0[1] : btn_up | joystick_0[3];
 //wire m_down1   = ~status[2] ? btn_right | joystick_0[0] : btn_down | joystick_0[2];
-wire m_left1   = ~status[2] ? btn_down | joystick_0[2] : btn_left | joystick_0[1];
-wire m_right1  = ~status[2] ? btn_up | joystick_0[3] : btn_right | joystick_0[0];
+wire m_left1   = btn_left | joystick_0[1];
+wire m_right1  = btn_right | joystick_0[0];
 
 wire m_fire11   = btn_fire1 | joystick_0[4];
 wire m_fire12   = btn_fire2 | joystick_0[5];

Arcade_MiST/Konami Scramble Hardware/MoonWar_MiST/rtl/moonwar_dail.vhd

@@ -1,33 +1,3 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_unsigned.all;
-
-entity binary_counter is
-port(
-	C : in std_logic; 
-	CLR : in std_logic;
-	Q : out std_logic_vector(4 downto 0)
-);
-end binary_counter;
-
-architecture struct of binary_counter is
-
-signal tmp: std_logic_vector(4 downto 0);
-
-begin
-
-process (C, CLR)begin
-	if (CLR = '1') then
-		tmp <= "00000";
-	elsif (C'event and C='1') then
-		tmp <= tmp + 1;
-	end if;
-end process;
-
-Q <= tmp;
-
-end struct;
-
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.std_logic_unsigned.all;
@@ -37,34 +7,25 @@ entity moonwar_dail is
 port(
 	clk      		: in std_logic;
 	moveleft      	: in std_logic;
-	moveright      : in std_logic;
-	btn      		: in std_logic_vector(3 downto 0);
+	moveright       : in std_logic;
 	dailout      	: out std_logic_vector(4 downto 0)
 );
 end moonwar_dail;
 
-architecture struct of moonwar_dail is
+architecture rtl of moonwar_dail is
+
+signal count  		: std_logic_vector(8 downto 0);
 
-signal direction  : std_logic_vector(4 downto 0);
-signal count  		: std_logic_vector(4 downto 0);
-signal count2  		: std_logic_vector(4 downto 0);
 begin
 
-process (clk, moveleft, moveright)begin
-	if (moveleft = '1') then
-		direction <= "00000";
-	elsif (moveright = '1') then
-		direction <= "11111";
+process (clk) begin
+	if rising_edge(clk) then
+		if moveleft = '1' or moveright = '1' then
+			count <= count + 1;
+		end if;
 	end if;
 end process;
 
-video_gen : entity work.binary_counter
-port map (
-	C     	=> clk,
-	CLR     	=> not moveleft or not moveright,
-	Q     	=> count
-);
+dailout <= moveleft & count(8 downto 5);
 
---count2 <= count +
-dailout <= direction or count or btn; 
-end struct;
+end rtl;

Arcade_MiST/Konami Scramble Hardware/MoonWar_MiST/rtl/scramble_audio.vhd

@@ -412,23 +412,21 @@ begin
   end process;
   
   dail1 : entity work.moonwar_dail
-port map(
-	clk      		=> CLK,
-	moveleft      	=> I_1P_CTRL(1),
-	moveright      => I_1P_CTRL(0),
-	btn      		=> I_1P_CTRL(3) & I_1P_CTRL(2) & I_1P_CTRL(1) & I_1P_CTRL(0),
-	dailout      	=> I_1P_DAIL
+  port map(
+    clk             => CLK,
+    moveleft        => not I_1P_CTRL(1),
+    moveright       => not I_1P_CTRL(0),
+    dailout      	=> I_1P_DAIL
 );
 
   dail2 : entity work.moonwar_dail
-port map(
-	clk      		=> CLK,
-	moveleft      	=> I_2P_CTRL(1),
-	moveright      => I_2P_CTRL(0),
-	btn      		=> I_2P_CTRL(3) & I_2P_CTRL(2) & I_2P_CTRL(1) & I_2P_CTRL(0),
-	dailout      	=> I_2P_DAIL
-);
-  
+  port map(
+    clk      		=> CLK,
+    moveleft        => not I_2P_CTRL(1),
+    moveright       => not I_2P_CTRL(0),
+    dailout      	=> I_2P_DAIL
+  );
+
   i8255_1E_pa(7) <= I_COIN1;--coin1
   i8255_1E_pa(6) <= I_COIN2;--coin2
   i8255_1E_pa(5) <= I_2P_CTRL(4); -- button 3 shield

Arcade_MiST/Konami Scramble Hardware/Scramble_MiST/Scramble.qsf

@@ -40,7 +40,7 @@
 # Project-Wide Assignments
 # ========================
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017"
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
@@ -137,6 +137,7 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
 set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
 set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
 set_global_assignment -name SYSTEMVERILOG_FILE rtl/ScrambleMist.sv
 set_global_assignment -name VHDL_FILE rtl/scramble.vhd
@@ -160,6 +161,4 @@ set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
 set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
 set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
 set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name VHDL_FILE rtl/dpram.vhd

Arcade_MiST/Konami Scramble Hardware/Scramble_MiST/rtl/ScrambleMist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Scramble;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.20.",`BUILD_DATE
 };
@@ -108,7 +109,7 @@ scramble_top scramble(
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -124,6 +125,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -150,7 +153,7 @@ user_io(
 	.status         (status         )
 	);
 
-dac dac(
+dac #(10) dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),

Arcade_MiST/Konami Scramble Hardware/SpeedCoin_MiST/rtl/SpeedCoin_Mist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Speed Coin;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)

Arcade_MiST/Konami Scramble Hardware/SuperCobra_MiST/rtl/SCobra_Mist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"SCobra;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -155,10 +158,10 @@ user_io(
 	.status         (status         )
 	);
 
-dac #(16)dac(
+dac #(10)dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
-	.dac_i({audio, audio[9:5]}),
+	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
 //											Rotated														Normal

Arcade_MiST/Konami Scramble Hardware/TazzMania_MiST/rtl/TazzMania_Mist.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"Tazzmania;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.00.",`BUILD_DATE
 };
@@ -113,7 +114,7 @@ scramble_top scramble (
 	.ena_1_79(ce_1p79)
 	);
 
-mist_video #(.COLOR_DEPTH(4)) mist_video(
+mist_video #(.COLOR_DEPTH(4),.SD_HCNT_WIDTH(10)) mist_video(
 	.clk_sys(clk_sys),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
@@ -129,6 +130,8 @@ mist_video #(.COLOR_DEPTH(4)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)

Arcade_MiST/Konami Scramble Hardware/TheEnd_MiST/TheEnd.qsf

@@ -40,35 +40,11 @@
 # Project-Wide Assignments
 # ========================
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017"
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
 set_global_assignment -name SMART_RECOMPILE ON
-set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/TheEnd.sv
-set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
-set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
-set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
-set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
 
 # Pin & Location Assignments
 # ==========================
@@ -158,13 +134,36 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 
 		# Incremental Compilation Assignments
 		# ===================================
-		set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-		set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-		set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
 # end ENTITY(TheEnd)
 # ------------------
+set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/TheEnd.sv
+set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
+set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
+set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
+set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
+set_global_assignment -name QIP_FILE rtl/pll.qip
+set_global_assignment -name VHDL_FILE rtl/dpram.vhd
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

Arcade_MiST/Konami Scramble Hardware/TheEnd_MiST/rtl/TheEnd.sv

@@ -44,6 +44,7 @@ localparam CONF_STR = {
 	"TheEnd;;",
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scanlines,Off,25%,50%,75%;",
+	"O5,Blending,Off,On;",
 	"T6,Reset;",
 	"V,v1.20.",`BUILD_DATE
 };
@@ -61,19 +62,21 @@ pll pll(
 	);
 
 reg ce_6p, ce_star, ce_1p79;
+
 always @(negedge clk_sys) begin
-reg [2:0] div = 0;
-reg [4:0] div179 = 0;	
+	reg [1:0] div = 0;
+	reg [3:0] div179 = 0;
+
 	div <= div + 1'd1;
-	if(div == 5) div <= 0;
-	ce_6p    <= (div == 0);
-	ce_star <= ((div == 3) | (div == 5));
-   ce_1p79 <= 0;
-   div179 <= div179 + 1'd1;
-   if(div179 == 19) begin
-		div179 <= 0;
+	ce_star <= div[0];
+	ce_6p <= div[0] & ~div[1];
+
+	ce_1p79 <= 0;
+	div179 <= div179 - 1'd1;
+	if(!div179) begin
+		div179 <= 13;
 		ce_1p79 <= 1;
-   end
+	end
 end
 
 wire [31:0] status;
@@ -124,6 +127,8 @@ mist_video #(.COLOR_DEPTH(3), .SD_HCNT_WIDTH(10)) mist_video(
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
 	.rotate({1'b1,status[2]}),
+	.ce_divider(1'b1),
+	.blend(status[5]),
 	.scandoubler_disable(scandoublerD),
 	.scanlines(status[4:3]),
 	.ypbpr(ypbpr)
@@ -150,7 +155,7 @@ user_io(
 	.status         (status         )
 	);
 
-dac dac(
+dac #(10) dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),

Arcade_MiST/Konami Scramble Hardware/TheEnd_MiST/rtl/dac.vhd

@@ -1,48 +0,0 @@
--------------------------------------------------------------------------------
---
--- Delta-Sigma DAC
---
--- Refer to Xilinx Application Note XAPP154.
---
--- This DAC requires an external RC low-pass filter:
---
---   dac_o 0---XXXXX---+---0 analog audio
---              3k3    |
---                    === 4n7
---                     |
---                    GND
---
--------------------------------------------------------------------------------
-
-library ieee;
-	use ieee.std_logic_1164.all;
-	use ieee.numeric_std.all;
-
-entity dac is
-	generic (
-		C_bits  : integer := 10
-	);
-	port (
-		clk_i   : in  std_logic;
-		res_n_i : in  std_logic;
-		dac_i   : in  std_logic_vector(C_bits-1 downto 0);
-		dac_o   : out std_logic
-	);
-end dac;
-
-architecture rtl of dac is
-	signal sig_in: unsigned(C_bits downto 0);
-begin
-	seq: process(clk_i, res_n_i)
-	begin
-		if res_n_i = '0' then
-			sig_in <= to_unsigned(2**C_bits, sig_in'length);
-			dac_o  <= '0';
-		elsif rising_edge(clk_i) then
-		        -- not dac_i(C_bits-1) effectively adds 0x8..0 to dac_i
-			--sig_in <= sig_in + unsigned(sig_in(C_bits) & (not dac_i(C_bits-1)) & dac_i(C_bits-2 downto 0));
-			sig_in <= sig_in + unsigned(sig_in(C_bits) & dac_i);
-			dac_o  <= sig_in(C_bits);
-		end if;
-	end process seq;
-end rtl;

Arcade_MiST/Konami Scramble Hardware/TheEnd_MiST/rtl/pll.v

@@ -14,11 +14,11 @@
 // ************************************************************
 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
 //
-// 13.1.0 Build 162 10/23/2013 SJ Web Edition
+// 13.1.4 Build 182 03/12/2014 Patches 4.26 SJ Web Edition
 // ************************************************************
 
 
-//Copyright (C) 1991-2013 Altera Corporation
+//Copyright (C) 1991-2014 Altera Corporation
 //Your use of Altera Corporation's design tools, logic functions 
 //and other software and tools, and its AMPP partner logic 
 //functions, and any output files from any of the foregoing 
@@ -103,9 +103,9 @@ module pll (
 				.vcounderrange ());
 	defparam
 		altpll_component.bandwidth_type = "AUTO",
-		altpll_component.clk0_divide_by = 3,
+		altpll_component.clk0_divide_by = 9,
 		altpll_component.clk0_duty_cycle = 50,
-		altpll_component.clk0_multiply_by = 4,
+		altpll_component.clk0_multiply_by = 8,
 		altpll_component.clk0_phase_shift = "0",
 		altpll_component.compensate_clock = "CLK0",
 		altpll_component.inclk0_input_frequency = 37037,
@@ -180,9 +180,9 @@ endmodule
 // Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
 // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
 // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
-// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "3"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "9"
 // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "36.000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "24.000000"
 // Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
 // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
 // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -205,9 +205,9 @@ endmodule
 // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
 // Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
 // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "4"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "8"
 // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "36.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "24.00000000"
 // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
 // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
 // Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
@@ -246,9 +246,9 @@ endmodule
 // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
 // Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
-// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "3"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "9"
 // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "8"
 // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
 // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
 // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"