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Still WIP
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@ -17,19 +17,19 @@ assign VPOS = vcnt;
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always @(posedge PCLK) begin
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case (hcnt)
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293: begin HBLK <= 1; HSYN <= 0; hcnt <= hcnt+1; end//289
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311: begin HSYN <= 1; hcnt <= hcnt+1; end
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383: begin
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HBLK <= 0; HSYN <= 1; hcnt <= 0;
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288: begin HBLK <= 1; hcnt <= hcnt+1'b1; end
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311: begin HSYN <= 0; hcnt <= hcnt+1'b1; end
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342: begin HSYN <= 1; hcnt <= 471; end
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511: begin HBLK <= 0; hcnt <= 0;
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case (vcnt)
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225: begin VBLK <= 1; vcnt <= vcnt+1; end
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226: begin VSYN <= 0; vcnt <= vcnt+1; end
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233: begin VSYN <= 1; vcnt <= vcnt+1; end
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262: begin VBLK <= 0; vcnt <= 0; end//262
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default: vcnt <= vcnt+1;
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223: begin VBLK <= 1; vcnt <= vcnt+1'b1; end
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226: begin VSYN <= 0; vcnt <= vcnt+1'b1; end
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233: begin VSYN <= 1; vcnt <= 483; end
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511: begin VBLK <= 0; vcnt <= 0; end
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default: vcnt <= vcnt+1'b1;
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endcase
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end
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default: hcnt <= hcnt+1;
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default: hcnt <= hcnt+1'b1;
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endcase
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end
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@ -222,6 +222,13 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
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set_global_assignment -name VHDL_FILE rtl/T80/T80se.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80a.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_Reg.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_Pack.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_MCode.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_ALU.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/SkySkipper_MiST.sv
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set_global_assignment -name VHDL_FILE rtl/SkySkipper.vhd
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set_global_assignment -name VHDL_FILE rtl/rom/skyskip_sp_bits_4.vhd
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@ -233,13 +240,6 @@ set_global_assignment -name VHDL_FILE rtl/rom/skyskip_palette_gb.vhd
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set_global_assignment -name VHDL_FILE rtl/rom/skyskip_ch_palette_rgb.vhd
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set_global_assignment -name VHDL_FILE rtl/rom/skyskip_ch_bits.vhd
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set_global_assignment -name VHDL_FILE rtl/rom/skyskip_bg_palette_rgb.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80se.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80a.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_Reg.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_Pack.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_MCode.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80_ALU.vhd
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set_global_assignment -name VHDL_FILE rtl/T80/T80.vhd
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set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
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set_global_assignment -name VHDL_FILE rtl/gen_ram.vhd
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@ -113,8 +113,7 @@ architecture struct of SkySkipper is
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signal hs_cnt, vs_cnt :std_logic_vector(9 downto 0) ;
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signal hsync0, hsync1, hsync2, hsync3, hsync4 : std_logic;
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signal top_frame : std_logic := '0';
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signal init_eo : std_logic;
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signal pix_ena : std_logic;
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signal cpu_ena : std_logic;
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@ -128,6 +127,7 @@ architecture struct of SkySkipper is
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signal cpu_ioreq_n : std_logic;
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signal cpu_nmi_n : std_logic;
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signal cpu_m1_n : std_logic;
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signal cpu_rfsh_n : std_logic;
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signal cpu_I : std_logic_vector(7 downto 0);
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-- signal cpu_rom_addr : std_logic_vector(14 downto 0);
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-- signal cpu_rom_do : std_logic_vector( 7 downto 0);
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@ -152,7 +152,7 @@ architecture struct of SkySkipper is
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signal ch_vid : std_logic;
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signal ch_color : std_logic_vector( 4 downto 0);
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signal hoffset : std_logic_vector( 7 downto 0);
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signal hoffset : std_logic_vector( 8 downto 0);
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signal hshift : std_logic_vector( 9 downto 0);
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signal voffset : std_logic_vector( 7 downto 0);
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signal vshift : std_logic_vector( 9 downto 0);
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@ -475,7 +475,7 @@ begin
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end if;
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if move_buf = '1' and pix_ena = '1' and hcnt(0) = '1' then
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if sp_ram_addr >= 688 then
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if sp_ram_addr >= 640 then
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move_buf <= '0';
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else
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sp_ram_addr <= sp_ram_addr + 1;
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@ -483,7 +483,7 @@ begin
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end if;
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if read_buf = '1' and pix_ena = '1' and hcnt(0) = '1' then
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if sp_ram_addr >= 688 then
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if sp_ram_addr >= 640 then
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read_buf <= '0';
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else
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sp_ram_addr <= sp_ram_addr + 4;
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@ -502,19 +502,19 @@ begin
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if rising_edge(clock_vid) then
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cpu_wr_n_r <= cpu_wr_n;
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if cpu_mreq_n = '0' and cpu_wr_n = '0' then
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if (cpu_addr = x"8C00") then hoffset <= cpu_do; end if;
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if (cpu_addr = x"8C00") then hoffset(7 downto 0) <= cpu_do; end if;
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if (cpu_addr = x"8C01") then voffset <= cpu_do; end if;
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if (cpu_addr = x"8C02") then hoffset(8) <= cpu_do(0); end if;
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if (cpu_addr = x"8C03") then
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sp_palette_addr(7 downto 5) <= cpu_do(2 downto 0);
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bg_palette_addr(4) <= cpu_do(3);
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end if;
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end if;
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if (cpu_addr = x"E000") then protection_shift <= cpu_do(2 downto 0); end if;
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if (cpu_addr = x"E001") and cpu_wr_n_r = '1' then
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protection_data0 <= protection_data1;
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protection_data1 <= cpu_do;
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end if;
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end if;
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end if;
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end if;
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end process;
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@ -655,35 +655,28 @@ begin
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if pix_ena = '1' then
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if hcnt = 540 then -- tune background h pos w.r.t char (use odd value to keep hshift(0) = hcnt(0))
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hshift <= '0' & hoffset & '0';
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hshift <= hoffset & '0';
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else
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hshift <= hshift + 1 ;
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end if;
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end if;
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if hcnt = 540 then
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if tv15Khz_mode = '0' then
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-- vshift <= ('0' & voffset & '0') + vflip + ("01" & x"01"); -- tune background v pos w.r.t char
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vshift <= ('0' & voffset & '0') + vflip + ("00" & x"21"); -- tune background v pos w.r.t char
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vshift <= ('0' & voffset & '0') + vflip + ("00" & x"01"); -- tune background v pos w.r.t char
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else
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-- vshift <= ('0' & voffset & '0') + vflip + ("01" & x"02"); -- tune background v pos w.r.t char
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vshift <= ('0' & voffset & '0') + vflip + ("00" & x"22"); -- tune background v pos w.r.t char
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end if;
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end if;
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if hcnt(0) = '1' then
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vshift <= ('0' & voffset & '0') + vflip + ("00" & x"02"); -- tune background v pos w.r.t char
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end if;
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end if;
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if hcnt(0) = '1' then
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if hcnt(1) = '1' then
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if vshift(8) = '1' then
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bg_color <= bg_ram_do;
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else
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bg_color <= bg_ram_do;
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if vshift(9) = '1' then
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bg_color <= bg_ram_do;
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else
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bg_color <= (others => '0');
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end if;
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end if;
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end if;
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end if;
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bg_palette_addr(3 downto 0) <= bg_color;
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end if;
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end if;
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end process;
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@ -694,7 +687,7 @@ process (clock_vid)
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begin
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if rising_edge(clock_vid) then
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if hoffset = x"00" then
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if voffset = x"00" then
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video_r <= "000";
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video_g <= "000";
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video_b <= "00";
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@ -739,7 +732,7 @@ port map(
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IORQ_n => cpu_ioreq_n,
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RD_n => cpu_rd_n,
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WR_n => cpu_wr_n,
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RFSH_n => open,
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RFSH_n => cpu_rfsh_n,
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HALT_n => open,
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BUSAK_n => open,
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A => cpu_addr,
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@ -789,7 +782,7 @@ port map(
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q => ch_ram_color_do
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);
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-- video RAM C000-CFFF 4K x 8bits
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-- video RAM C000-CFFF 4K x 4bits
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video_ram : entity work.gen_ram
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generic map( dWidth => 4, aWidth => 13)
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port map(
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