mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-01-18 00:52:09 +00:00
Boots
This commit is contained in:
parent
7f99bc6b99
commit
7dc4fe654e
@ -40,7 +40,7 @@
|
||||
# Project-Wide Assignments
|
||||
# ========================
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.0.2
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:48:06 MAY 24,2017"
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
|
||||
@ -235,10 +235,11 @@ assign srom_d = snd_data;
|
||||
// .clk_b(MCLK), .addr_b(ROMAD[12:0]), .we_b(ROMEN & (ROMAD[16:13]==4'b1_000)), .d_b(ROMDT));
|
||||
|
||||
wire mram_cs0 = ( MCPU_ADRS[15:11] == 5'b00000 ) & MCPU_VMA; // $0000-$07FF
|
||||
wire mram_cs1 = ( MCPU_ADRS[15:11] == 5'b00001 ) & MCPU_VMA; // $0800-$0FFF
|
||||
wire mram_cs2 = ( MCPU_ADRS[15:11] == 5'b00010 ) & MCPU_VMA; // $1000-$17FF
|
||||
wire mram_cs3 = ( MCPU_ADRS[15:11] == 5'b00011 ) & MCPU_VMA; // $1800-$1FFF
|
||||
wire mram_cs4 = ( MCPU_ADRS[15:11] == 5'b00100 ) & MCPU_VMA; // $2000-$27FF
|
||||
//wire mram_cs1 = ( MCPU_ADRS[15:11] == 5'b00001 ) & MCPU_VMA; // $0800-$0FFF
|
||||
wire mram_cs1=0;
|
||||
wire mram_cs2 = ( MCPU_ADRS[15:11] == 5'b00001 ) & MCPU_VMA; // $1000-$17FF
|
||||
wire mram_cs3 = ( MCPU_ADRS[15:11] == 5'b00010 ) & MCPU_VMA; // $1800-$1FFF
|
||||
wire mram_cs4 = ( MCPU_ADRS[15:11] == 5'b00011 ) & MCPU_VMA; // $2000-$27FF
|
||||
wire mram_cs5 = ( MCPU_ADRS[15:10] == 6'b010000 ) & MCPU_VMA; // $4000-$43FF
|
||||
assign IO_CS = ( MCPU_ADRS[15:11] == 5'b01001 ) & MCPU_VMA; // $4800-$4FFF
|
||||
wire mrom_cs = ( MCPU_ADRS[15] ) & MCPU_VMA; // $8000-$FFFF
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user