github.com/Gehstock.Mist_FPGA
1
0
Fork 0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-04-11 06:37:45 +00:00
Code Issues Releases Wiki Activity

Feedback pia_a_out to pia_a_in externally

Browse Source
This commit is contained in:
Gyorgy Szombathelyi
2023-03-30 23:43:24 +02:00
parent 08c7a79e8b
commit 89b5e8c56d
5 changed files with 10 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Arcade_MiST/Midway MCR 3/rtl/sounds_good.vhd
View File

@@ -218,7 +218,7 @@ cpu_data_in <= rom_do when cs_rom = '1' else
audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6);
pia_pb_in <= "1100"&sndsel;
pia_ca1_in <= not sint;
pia_pa_in <= (others => '0');
pia_pa_in <= pia_pa_out;
pia_cb1_in <= '0'; -- spare
stat <= pia_pb_out(5 downto 4);

2
Arcade_MiST/Midway MCR 3/rtl/turbo_cheap_squeak.vhd
View File

@@ -137,7 +137,7 @@ cpu_irq <= pia_irqa or pia_irqb;
audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6);
pia_pb_in(5 downto 0) <= "00"&input(4 downto 1); -- stat1-stat0, sr3-sr0
pia_ca1_in <= not input(0); -- sirq
pia_pa_in <= (others => '0');
pia_pa_in <= pia_pa_out;
pia_cb1_in <= '0'; -- spare
end rtl;

2
Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/cheap_squeak_deluxe.vhd
View File

@@ -212,7 +212,7 @@ rom_addr <= rom_addr_out;
audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6);
pia_pb_in(5 downto 0) <= "00"&input(3 downto 0); -- stat1-stat0, sr3-sr0
pia_ca1_in <= not input(4); -- sirq
pia_pa_in <= (others => '0');
pia_pa_in <= pia_pa_out;
pia_cb1_in <= '0'; -- spare

2
Arcade_MiST/Midway MCR Scroll/TurboTag_MiST/rtl/cheap_squeak_deluxe.vhd
View File

@@ -212,7 +212,7 @@ rom_addr <= rom_addr_out;
audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6);
pia_pb_in(5 downto 0) <= "00"&input(3 downto 0); -- stat1-stat0, sr3-sr0
pia_ca1_in <= not input(4); -- sirq
pia_pa_in <= (others => '0');
pia_pa_in <= pia_pa_out;
pia_cb1_in <= '0'; -- spare

9
Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams_cvsd_board.vhd
View File

@@ -172,7 +172,8 @@ end component mc6809is;
-- signal pia_pa_o : std_logic_vector( 7 downto 0);
signal pia_irqa : std_logic;
signal pia_irqb : std_logic;
signal pia_a_o : std_logic_vector( 7 downto 0);
signal ym2151_irq_n : std_logic := '0';
signal ym2151_cs_n : std_logic;
signal ym2151_do : std_logic_vector( 7 downto 0);
@@ -404,8 +405,8 @@ port map
data_out => pia_do,
irqa => pia_irqa, -- active high
irqb => pia_irqb, -- active high
pa_i => x"00",
pa_o => pia_audio,
pa_i => pia_a_o,
pa_o => pia_a_o,
pa_oe => open,
ca1 => ym2151_irq_n,
ca2_i => '0',
@@ -420,6 +421,8 @@ port map
cb2_oe => open
);
pia_audio <= pia_a_o;
-- CVSD speech decoder
cvsd : entity work.HC55564
port map(