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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-19 01:16:58 +00:00

Druaga: add a flip screen switch

This commit is contained in:
Gyorgy Szombathelyi 2021-04-24 21:09:55 +02:00
parent 0dc4a6077a
commit 9800ceb446
4 changed files with 31 additions and 23 deletions

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@ -38,6 +38,7 @@ localparam CONF_STR = {
"O2,Rotate Controls,Off,On;",
"O34,Scanlines,Off,25%,50%,75%;",
"O5,Blend,Off,On;",
"O7,Flip Screen,Off,On;",
"DIP;",
"OU,Service Mode,Off,On;",
"OT,Freeze,Off,On;",
@ -48,6 +49,7 @@ localparam CONF_STR = {
wire rotate = status[2];
wire [1:0] scanlines = status[4:3];
wire blend = status[5];
wire flip = status[7];
wire dcFreeze = status[29];
wire dcService = status[30];
@ -293,7 +295,8 @@ fpga_druaga fpga_druaga(
.ROMAD(ioctl_addr[16:0]),
.ROMDT(ioctl_dout),
.ROMEN(ioctl_wr),
.MODEL(core_mod[2:0])
.MODEL(core_mod[2:0]),
.FLIP_SCREEN(flip)
);
hvgen hvgen(
@ -323,7 +326,7 @@ mist_video #(.COLOR_DEPTH(3), .SD_HCNT_WIDTH(10)) mist_video(
.VGA_B ( VGA_B ),
.VGA_VS ( VGA_VS ),
.VGA_HS ( VGA_HS ),
.rotate ( { 1'b1, rotate } ),
.rotate ( { ~flip, rotate } ),
.scandoubler_disable( scandoublerD ),
.scanlines ( scanlines ),
.blend ( blend ),
@ -349,7 +352,7 @@ arcade_inputs inputs (
.joystick_0 ( joystick_0 ),
.joystick_1 ( joystick_1 ),
.rotate ( rotate ),
.orientation ( 2'b11 ),
.orientation ( {~flip, 1'b1} ),
.joyswap ( 1'b0 ),
.oneplayer ( 1'b1 ),
.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),

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@ -24,7 +24,8 @@ module DRUAGA_SPRITE
input [16:0] ROMAD,
input [7:0] ROMDT,
input ROMEN,
input [2:0] MODEL
input [2:0] MODEL,
input FLIP_SCREEN
);
parameter [2:0] SUPERPAC=3'd5;
@ -80,7 +81,7 @@ reg [4:0] _msky = 5'b01111;
reg bKick = 1'b0;
reg [7:0] cno;
wire [4:0] ox = { lpcn ^ xf };
wire [4:0] ox = lpcn ^ xf ^ {FLIP_SCREEN & _sizx, {4{FLIP_SCREEN}}};
assign SPCH_A = { cno[7:2], (cno[1]|sy[4]), (cno[0]|ox[4]), sy[3], ox[3:2], sy[2:0] };
wire [15:0] SPCO = SPCH_D;
@ -121,17 +122,17 @@ always @( posedge VCLKx8 ) begin
bLoad <= 1'b1;
end
else begin
nProc <= nProc+1;
nProc <= nProc+1'd1;
bLoad <= 1'b0;
end
end
else begin
pn <= spriteram[5:0];
sx <= { spriteram_3[0], spriteram_2[7:0] } - 9'h38;
sx <= {{spriteram_3[0], spriteram_2[7:0]} ^ {9{FLIP_SCREEN}}} - 9'h38 + {9'h161 & {9{FLIP_SCREEN}}} - {FLIP_SCREEN & _sizx, 4'b0};
sy <= ( sy & _msky ) ^ yf;
loop <= spriteram_3[1] ? 6'h0 : { _sizx, ~_sizx, 4'h0 };
lpcn <= 6'h0;
nProc <= nProc+1;
lpcn <= 5'h0;
nProc <= nProc+1'd1;
bLoad <= 1'b0;
end
end
@ -140,7 +141,7 @@ always @( posedge VCLKx8 ) begin
else begin // Horizontal blanking time
if (bKick) begin
lbufr <= ~VPOS[0];
vposl <= VPOS+1;
vposl <= {VPOS ^ {9{FLIP_SCREEN}}} + 1 + {220 & {9{FLIP_SCREEN}}};
nProc <= 0;
bKick <= 1'b0;
end

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@ -31,7 +31,8 @@ module DRUAGA_VIDEO
input [16:0] ROMAD,
input [ 7:0] ROMDT,
input ROMEN,
input [ 2:0] MODEL
input [ 2:0] MODEL,
input FLIP_SCREEN
);
parameter [2:0] SUPERPAC=3'd5;
@ -56,7 +57,7 @@ wire [7:0] BGCH_D;
// BG scroll registers
//
reg [8:0] BGVSCR;
wire [8:0] BGVPOS = BGVSCR + VPOS;
wire [8:0] BGVPOS = ({8{FLIP_SCREEN}} ^ BGVSCR) + VPOS + (9'h121 & {9{FLIP_SCREEN}});
always @(posedge VCLKx8) if (PH == 290) BGVSCR <= SCROLL;
@ -67,12 +68,13 @@ reg [7:0] BGPN;
reg BGH;
reg [5:0] COL, ROW;
wire ROW4 = {(VPOS[7:5] + FLIP_SCREEN) >> 2} ^ FLIP_SCREEN;
wire [7:0] CHRC = VRAM_D[7:0];
wire [5:0] BGPL = VRAM_D[13:8];
wire [8:0] HP = HPOS;
wire [8:0] VP = COL[5] ? VPOS : BGVPOS;
wire [8:0] HP = HPOS ^ {8{FLIP_SCREEN}};
wire [8:0] VP = {COL[5] ? VPOS : BGVPOS} ^ {8{FLIP_SCREEN}};
wire [11:0] CHRA = { CHRC, ~HP[2], VP[2:0] };
wire [7:0] CHRO = BGCH_D; // Char pixel data
reg [10:0] VRAMADRS;
@ -95,19 +97,18 @@ wire BGHI = BGH & (CLT0_D!=4'd15);
wire [4:0] BGCOL = { 1'b1, (MODEL==SUPERPAC ? ~CLT0_D :CLT0_D) };
always @(*) begin
COL = HPOS[8:3];
ROW = VPOS[8:3];
COL = HPOS[8:3] ^ {5{FLIP_SCREEN}};
// This +2 adjustment is due to using a linear video timing generator
// rather than the original circuit count.
ROW = (VPOS[8:3] + 6'h2) ^ {5{FLIP_SCREEN}};
if( MODEL==SUPERPAC ) begin
// This +2 adjustment is due to using a linear video timing generator
// rather than the original circuit count.
ROW = ROW + 6'h2;
VRAMADRS = { 1'b0,
COL[5] ? {COL[4:0], ROW[4:0]} :
{ROW[4:0], COL[4:0]}
};
end else begin
VRAMADRS = COL[5] ? { 4'b1111, COL[1:0], ROW[4], ROW[3:0]+4'h2 } :
VRAMADRS = COL[5] ? { 4'b1111, COL[1:0], ROW4, ROW[3:0]+4'h2 } :
{ VP[8:3], HP[7:3] };
end
end
@ -124,7 +125,8 @@ DRUAGA_SPRITE #(.SUPERPAC(SUPERPAC)) spr
SPRA_A, SPRA_D,
SPCOL,
ROMAD,ROMDT,ROMEN,
MODEL
MODEL,
FLIP_SCREEN
);
//----------------------------------------

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@ -37,7 +37,8 @@ module fpga_druaga
input [16:0] ROMAD,
input [ 7:0] ROMDT,
input ROMEN,
input [ 2:0] MODEL
input [ 2:0] MODEL,
input FLIP_SCREEN
);
parameter [2:0] SUPERPAC=3'd5;
@ -139,7 +140,8 @@ DRUAGA_VIDEO video
.SPRA_A(spra_a), .SPRA_D(spra_d),
.SCROLL({1'b0,SCROLL}),
.ROMAD(ROMAD),.ROMDT(ROMDT),.ROMEN(ROMEN),
.MODEL(MODEL)
.MODEL(MODEL),
.FLIP_SCREEN(FLIP_SCREEN)
);
// This prevents a glitch in the sprites for the first line