mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-02-21 22:57:35 +00:00
Ladybug Hardware - Sound Repair
This commit is contained in:
@@ -40,67 +40,12 @@
|
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# Project-Wide Assignments
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# ========================
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
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||||
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30 APRIL 20, 2017"
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||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
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||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
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||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
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||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
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||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
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||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
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||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
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||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
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||||
set_global_assignment -name QIP_FILE rtl/pll.qip
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
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set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
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set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
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set_global_assignment -name VHDL_FILE rtl/spram.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/CosmicAvenger.sv
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set_global_assignment -name VHDL_FILE rtl/dpram.vhd
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# Pin & Location Assignments
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||||
# ==========================
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@@ -154,9 +99,6 @@ set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
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set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_global_assignment -name DEVICE EP3C25E144C8
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_NCE_PIN OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
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@@ -203,4 +145,61 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
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# -------------------
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/CosmicAvenger.sv
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set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
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set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
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set_global_assignment -name VERILOG_FILE rtl/osd.v
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set_global_assignment -name VERILOG_FILE rtl/mist_io.v
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set_global_assignment -name VERILOG_FILE rtl/keyboard.v
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
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set_global_assignment -name VHDL_FILE rtl/dac.vhd
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set_global_assignment -name QIP_FILE rtl/pll.qip
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
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set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
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set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
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set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
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||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
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set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
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set_global_assignment -name VHDL_FILE rtl/dpram.vhd
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||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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@@ -22,5 +22,3 @@
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--
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---------------------------------------------------------------------------------
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ToDo : Sound
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Binary file not shown.
@@ -70,8 +70,7 @@ wire [7:0] joystick_1;
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wire scandoubler_disable;
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wire ypbpr;
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wire ps2_kbd_clk, ps2_kbd_data;
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wire signed[7:0] audio_s;
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reg [6:0] audio;
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reg [7:0] audio;
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assign LED = 1;
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wire hblank, vblank;
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@@ -88,9 +87,9 @@ video_mixer #(.LINE_LENGTH(440), .HALF_DEPTH(1)) video_mixer
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.SPI_SCK(SPI_SCK),
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.SPI_SS3(SPI_SS3),
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.SPI_DI(SPI_DI),
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.R(blankn ? {r} : "0"),
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.G(blankn ? {g&g} : "00"),
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.B(blankn ? {b} : "0"),
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.R(blankn ? {r} : "000"),
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.G(blankn ? {g} : "00"),
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.B(blankn ? {b} : "000"),
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.HSync(hs),
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.VSync(vs),
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.VGA_R(VGA_R),
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@@ -165,7 +164,7 @@ ladybugt ladybugt
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.O_VBLANK(vblank),
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.O_HBLANK(hblank),
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.O_AUDIO(audio_s),
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.O_AUDIO(audio),
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.but_coin_s(~{1'b0,m_coin}),
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.but_fire_s(~{1'b0,m_fire}),
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@@ -178,13 +177,11 @@ ladybugt ladybugt
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.but_right_s(~{1'b0,m_right})
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);
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assign audio = audio_s;
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dac dac
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(
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.clk_i(clk_sys),
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.res_n_i(1),
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.dac_i(audio),
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.dac_i({~audio[7], audio[6:0], 8'b00000000}),
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.dac_o(AUDIO_L)
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);
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@@ -1,2 +1,2 @@
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`define BUILD_DATE "171116"
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`define BUILD_TIME "122617"
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`define BUILD_DATE "180911"
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`define BUILD_TIME "130054"
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@@ -22,7 +22,7 @@ use ieee.std_logic_1164.all;
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entity dac is
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generic (
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msbi_g : integer := 6
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msbi_g : integer := 15
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);
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port (
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clk_i : in std_logic;
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@@ -40,67 +40,12 @@
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# Project-Wide Assignments
|
||||
# ========================
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30 APRIL 20, 2017"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Dorodon.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
|
||||
# Pin & Location Assignments
|
||||
# ==========================
|
||||
@@ -154,9 +99,6 @@ set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name DEVICE EP3C25E144C8
|
||||
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
|
||||
set_global_assignment -name ENABLE_NCE_PIN OFF
|
||||
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
|
||||
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
|
||||
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
|
||||
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
|
||||
@@ -203,4 +145,61 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
|
||||
# -------------------
|
||||
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
|
||||
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Dorodon.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
@@ -21,6 +21,3 @@
|
||||
-- Joystick support.
|
||||
--
|
||||
---------------------------------------------------------------------------------
|
||||
|
||||
|
||||
ToDo : Sound
|
||||
|
||||
Binary file not shown.
@@ -70,8 +70,7 @@ wire [7:0] joystick_1;
|
||||
wire scandoubler_disable;
|
||||
wire ypbpr;
|
||||
wire ps2_kbd_clk, ps2_kbd_data;
|
||||
wire signed[7:0] audio_s;
|
||||
reg [6:0] audio;
|
||||
reg [7:0] audio;
|
||||
assign LED = 1;
|
||||
|
||||
wire hblank, vblank;
|
||||
@@ -88,9 +87,9 @@ video_mixer #(.LINE_LENGTH(440), .HALF_DEPTH(1)) video_mixer
|
||||
.SPI_SCK(SPI_SCK),
|
||||
.SPI_SS3(SPI_SS3),
|
||||
.SPI_DI(SPI_DI),
|
||||
.R(blankn ? {r} : "0"),
|
||||
.G(blankn ? {g&g} : "00"),
|
||||
.B(blankn ? {b} : "0"),
|
||||
.R(blankn ? {r} : "000"),
|
||||
.G(blankn ? {g} : "00"),
|
||||
.B(blankn ? {b} : "000"),
|
||||
.HSync(hs),
|
||||
.VSync(vs),
|
||||
.VGA_R(VGA_R),
|
||||
@@ -148,9 +147,6 @@ wire m_coin = kbjoy[3];
|
||||
wire m_bomb = kbjoy[8];
|
||||
wire blankn = ~(hblank | vblank);
|
||||
|
||||
|
||||
|
||||
//condition ? if true : if false
|
||||
ladybugt ladybugt
|
||||
(
|
||||
.CLK_IN(clk_sys),
|
||||
@@ -165,7 +161,7 @@ ladybugt ladybugt
|
||||
.O_VBLANK(vblank),
|
||||
.O_HBLANK(hblank),
|
||||
|
||||
.O_AUDIO(audio_s),
|
||||
.O_AUDIO(audio),
|
||||
|
||||
.but_coin_s(~{1'b0,m_coin}),
|
||||
.but_fire_s(~{1'b0,m_fire}),
|
||||
@@ -178,13 +174,12 @@ ladybugt ladybugt
|
||||
.but_right_s(~{1'b0,m_right})
|
||||
);
|
||||
|
||||
assign audio = audio_s;
|
||||
|
||||
dac dac
|
||||
(
|
||||
.clk_i(clk_sys),
|
||||
.res_n_i(1),
|
||||
.dac_i(audio),
|
||||
.dac_i({~audio[7], audio[6:0], 8'b00000000}),
|
||||
.dac_o(AUDIO_L)
|
||||
);
|
||||
|
||||
|
||||
@@ -1,2 +1,2 @@
|
||||
`define BUILD_DATE "171116"
|
||||
`define BUILD_TIME "123540"
|
||||
`define BUILD_DATE "180911"
|
||||
`define BUILD_TIME "132152"
|
||||
|
||||
@@ -22,7 +22,7 @@ use ieee.std_logic_1164.all;
|
||||
entity dac is
|
||||
|
||||
generic (
|
||||
msbi_g : integer := 7
|
||||
msbi_g : integer := 15
|
||||
);
|
||||
port (
|
||||
clk_i : in std_logic;
|
||||
|
||||
@@ -40,67 +40,12 @@
|
||||
# Project-Wide Assignments
|
||||
# ========================
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30 APRIL 20, 2017"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/LadyBug.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
|
||||
# Pin & Location Assignments
|
||||
# ==========================
|
||||
@@ -155,9 +100,6 @@ set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name DEVICE EP3C25E144C8
|
||||
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
|
||||
set_global_assignment -name ENABLE_NCE_PIN OFF
|
||||
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
|
||||
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
|
||||
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
|
||||
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
|
||||
@@ -202,4 +144,61 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
|
||||
|
||||
# end ENTITY(LadyBug)
|
||||
# -------------------
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/LadyBug.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
@@ -22,5 +22,3 @@
|
||||
--
|
||||
---------------------------------------------------------------------------------
|
||||
|
||||
|
||||
ToDo : Sound
|
||||
|
||||
Binary file not shown.
@@ -70,8 +70,7 @@ wire [7:0] joystick_1;
|
||||
wire scandoubler_disable;
|
||||
wire ypbpr;
|
||||
wire ps2_kbd_clk, ps2_kbd_data;
|
||||
wire signed[7:0] audio_s;
|
||||
reg [6:0] audio;
|
||||
reg [7:0] audio;
|
||||
assign LED = 1;
|
||||
|
||||
wire hblank, vblank;
|
||||
@@ -88,9 +87,9 @@ video_mixer #(.LINE_LENGTH(292), .HALF_DEPTH(1)) video_mixer
|
||||
.SPI_SCK(SPI_SCK),
|
||||
.SPI_SS3(SPI_SS3),
|
||||
.SPI_DI(SPI_DI),
|
||||
.R(blankn ? {r} : "0"),
|
||||
.G(blankn ? {g&g} : "00"),
|
||||
.B(blankn ? {b} : "0"),
|
||||
.R(blankn ? {r} : "000"),
|
||||
.G(blankn ? {g} : "00"),
|
||||
.B(blankn ? {b} : "000"),
|
||||
.HSync(hs),
|
||||
.VSync(vs),
|
||||
.VGA_R(VGA_R),
|
||||
@@ -165,7 +164,7 @@ ladybugt ladybugt
|
||||
.O_VBLANK(vblank),
|
||||
.O_HBLANK(hblank),
|
||||
|
||||
.O_AUDIO(audio_s),
|
||||
.O_AUDIO(audio),
|
||||
|
||||
.but_coin_s(~{1'b0,m_coin}),
|
||||
.but_fire_s(~{1'b0,m_fire}),
|
||||
@@ -178,13 +177,11 @@ ladybugt ladybugt
|
||||
.but_right_s(~{1'b0,m_right})
|
||||
);
|
||||
|
||||
assign audio = audio_s;
|
||||
|
||||
dac dac
|
||||
(
|
||||
.clk_i(clk_sys),
|
||||
.res_n_i(1),
|
||||
.dac_i(audio),
|
||||
.dac_i({~audio[7], audio[6:0], 8'b00000000}),
|
||||
.dac_o(AUDIO_L)
|
||||
);
|
||||
|
||||
|
||||
@@ -1,2 +1,2 @@
|
||||
`define BUILD_DATE "171116"
|
||||
`define BUILD_TIME "111346"
|
||||
`define BUILD_DATE "180911"
|
||||
`define BUILD_TIME "131554"
|
||||
|
||||
@@ -22,7 +22,7 @@ use ieee.std_logic_1164.all;
|
||||
entity dac is
|
||||
|
||||
generic (
|
||||
msbi_g : integer := 6
|
||||
msbi_g : integer := 15
|
||||
);
|
||||
port (
|
||||
clk_i : in std_logic;
|
||||
|
||||
@@ -21,6 +21,3 @@
|
||||
-- Joystick support.
|
||||
--
|
||||
---------------------------------------------------------------------------------
|
||||
|
||||
|
||||
ToDo : Sound
|
||||
|
||||
Binary file not shown.
@@ -40,67 +40,12 @@
|
||||
# Project-Wide Assignments
|
||||
# ========================
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30 APRIL 20, 2017"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
||||
set_global_assignment -name SMART_RECOMPILE ON
|
||||
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Snapjack.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
|
||||
# Pin & Location Assignments
|
||||
# ==========================
|
||||
@@ -154,9 +99,6 @@ set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
|
||||
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name DEVICE EP3C25E144C8
|
||||
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
|
||||
set_global_assignment -name ENABLE_NCE_PIN OFF
|
||||
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
|
||||
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
|
||||
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
|
||||
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
|
||||
@@ -203,4 +145,61 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
|
||||
# -------------------
|
||||
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
|
||||
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Snapjack.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug.vhd
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
|
||||
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/osd.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
|
||||
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
|
||||
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
|
||||
set_global_assignment -name VHDL_FILE rtl/dac.vhd
|
||||
set_global_assignment -name QIP_FILE rtl/pll.qip
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_top.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_tone.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_noise.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_latch_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_clock_div.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/sn76489/sn76489_attenuator.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/sound/ladybug_sound_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_sprite_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_cpu1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_u.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/rom_char_l.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_decrypt.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_3.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_2.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ROM/prom_10_1.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80a.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_393.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ttl_175.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/spram.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_video_timing.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite_ctrl.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_sprite.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rgb.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_res.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_rams.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_machine.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_gpio.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_dip_pack.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_cpu_unit.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_counter.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_clk.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chutes.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_chute.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_char.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/ladybug_addr_dec.vhd
|
||||
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
@@ -42,7 +42,6 @@ module Snapjack
|
||||
|
||||
localparam CONF_STR = {
|
||||
"Snapjack;;",
|
||||
//"O2,Joystick Control,Upright,Normal;",
|
||||
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
|
||||
"T6,Reset;",
|
||||
"V,v1.00.",`BUILD_DATE
|
||||
@@ -70,8 +69,7 @@ wire [7:0] joystick_1;
|
||||
wire scandoubler_disable;
|
||||
wire ypbpr;
|
||||
wire ps2_kbd_clk, ps2_kbd_data;
|
||||
wire signed[7:0] audio_s;
|
||||
reg [6:0] audio;
|
||||
reg [7:0] audio;
|
||||
assign LED = 1;
|
||||
|
||||
wire hblank, vblank;
|
||||
@@ -88,9 +86,9 @@ video_mixer #(.LINE_LENGTH(440), .HALF_DEPTH(1)) video_mixer
|
||||
.SPI_SCK(SPI_SCK),
|
||||
.SPI_SS3(SPI_SS3),
|
||||
.SPI_DI(SPI_DI),
|
||||
.R(blankn ? {r} : "0"),
|
||||
.G(blankn ? {g&g} : "00"),
|
||||
.B(blankn ? {b} : "0"),
|
||||
.R(blankn ? {r} : "000"),
|
||||
.G(blankn ? {g} : "00"),
|
||||
.B(blankn ? {b} : "000"),
|
||||
.HSync(hs),
|
||||
.VSync(vs),
|
||||
.VGA_R(VGA_R),
|
||||
@@ -163,7 +161,7 @@ ladybugt ladybugt
|
||||
.O_VBLANK(vblank),
|
||||
.O_HBLANK(hblank),
|
||||
|
||||
.O_AUDIO(audio_s),
|
||||
.O_AUDIO(audio),
|
||||
|
||||
.but_coin_s(~{1'b0,m_coin}),
|
||||
.but_fire_s(~{m_fire,m_fire}),
|
||||
@@ -176,13 +174,11 @@ ladybugt ladybugt
|
||||
.but_right_s(~{m_right,m_right})
|
||||
);
|
||||
|
||||
assign audio = audio_s;
|
||||
|
||||
dac dac
|
||||
(
|
||||
.clk_i(clk_sys),
|
||||
.res_n_i(1),
|
||||
.dac_i(audio),
|
||||
.dac_i({~audio[7], audio[6:0], 8'b00000000}),
|
||||
.dac_o(AUDIO_L)
|
||||
);
|
||||
|
||||
|
||||
@@ -1,2 +1,2 @@
|
||||
`define BUILD_DATE "180103"
|
||||
`define BUILD_TIME "182358"
|
||||
`define BUILD_DATE "180911"
|
||||
`define BUILD_TIME "132443"
|
||||
|
||||
@@ -22,7 +22,7 @@ use ieee.std_logic_1164.all;
|
||||
entity dac is
|
||||
|
||||
generic (
|
||||
msbi_g : integer := 7
|
||||
msbi_g : integer := 15
|
||||
);
|
||||
port (
|
||||
clk_i : in std_logic;
|
||||
|
||||
Reference in New Issue
Block a user