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Merge pull request #84 from gyurco/m62

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M62 + Robotron fixes
This commit is contained in:
Marcel 2020-03-19 19:28:50 +01:00 committed by GitHub
commit b3f833fe70
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GPG Key ID: 4AEE18F83AFDEB23
39 changed files with 198 additions and 1141 deletions
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4
Arcade_MiST/IremM62 Hardware/IremM62.qsf
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@ -76,6 +76,7 @@ set_location_assignment PIN_88 -to SPI_DI
set_location_assignment PIN_126 -to SPI_SCK
set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_90 -to SPI_SS4
set_location_assignment PIN_13 -to CONF_DATA0
set_location_assignment PIN_49 -to SDRAM_A[0]
set_location_assignment PIN_44 -to SDRAM_A[1]
@ -260,12 +261,11 @@ set_global_assignment -name VHDL_FILE rtl/input_mapper.vhd
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VHDL_FILE rtl/clk_div.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/YM2149.sv
set_global_assignment -name QIP_FILE rtl/jt5205/jt5205.qip
set_global_assignment -name VHDL_FILE rtl/Sound_Board.vhd
set_global_assignment -name QIP_FILE ../../common/Sound/jt5205/jt5205.qip
set_global_assignment -name QIP_FILE ../../common/mist/mist.qip
set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip
set_global_assignment -name VHDL_FILE ../../common/CPU/T80/Z80.vhd

13
Arcade_MiST/IremM62 Hardware/README.txt
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@ -11,3 +11,16 @@ Games supported:
- Spelunker 1-2
- Kid Niki
- Youjyudn
MiST port usage
===============
- Create ROM and ARC files from the MRA files using the MRA utility.
Example: mra -A -z /path/to/mame/roms Horizon.mra
- Copy the ROM files to the root of the SD Card
- Copy the RBF and ARC files to the same folder on the SD Card
MRA utility: https://github.com/sebdel/mra-tools-c/
Note: you need at least firmware version 200311.

5
Arcade_MiST/IremM62 Hardware/meta/Battle Road.mra
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@ -4,6 +4,11 @@
<setname>battroad</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Fuel Decrease" ids="Slow,Medium,Fast,Fastest"/>
<dip bits="10" name="Difficulty" ids="Easy,Hard"/>
</switches>
<rom index="1"><part>6</part></rom>
<rom index="0" zip="battroad.zip" md5="4d5de2720b53b64fb63beed407cbeb19" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/meta/Horizon.mra
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@ -4,6 +4,11 @@
<setname>horizon</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Lives" ids="3,5,4,2"/>
<dip bits="10,11" name="Bonus Life" ids="40k/80k,60k/100k,80k/120k,100k/80k"/>
</switches>
<rom index="1"><part>5</part></rom>
<rom index="0" zip="horizon.zip" md5="573ef5ced961ede734cdde94153fcb7a" type="merged|nonmerged">
<!-- CPU1, 128k -->

6
Arcade_MiST/IremM62 Hardware/meta/Kid Niki.mra
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@ -4,6 +4,12 @@
<setname>kidniki</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Lives" ids="3,2,4,5"/>
<dip bits="10" name="Difficulty" ids="Normal,Hard"/>
<dip bits="11" name="Bonus Life" ids="50000,80000"/>
</switches>
<rom index="1"><part>7</part></rom>
<rom index="0" zip="kidniki.zip" md5="63cf7764a51bae694ce95dfe518a96f3" type="merged|nonmerged">
<!-- CPU1, 128k -->

6
Arcade_MiST/IremM62 Hardware/meta/Kung Fu Master.mra
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@ -4,6 +4,12 @@
<setname>kungfum</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8" name="Difficulty" ids="Easy,Hard"/>
<dip bits="9" name="Energy Loss" ids="Slow,Fast"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>4</part></rom>
<rom index="0" zip="kungfum.zip" md5="e4dd9d396dd574a11189c2183cf4cead" type="merged|nonmerged">
<!-- CPU1, 128k -->

6
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 2.mra
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@ -4,6 +4,12 @@
<setname>ldrun2</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8" name="Timer" ids="Slow,Fast"/>
<dip bits="9" name="Speed" ids="High,Low"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>1</part></rom>
<rom index="0" zip="ldrun2.zip" md5="46dbb2c6765031bd796a2c62b64c4ba2" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 3.mra
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@ -4,6 +4,11 @@
<setname>ldrun3</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Timer" ids="Slow,Medium,Fast,Fastest"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>2</part></rom>
<rom index="0" zip="ldrun3.zip" md5="a32c8e0a4927c70199174dea1600e761" type="merged|nonmerged">
<!-- CPU1, 128k -->

7
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 4.mra
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@ -4,6 +4,13 @@
<setname>ldrun4</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="6" name="Joystick Swap" ids="Off,On"/>
<dip bits="8" name="Timer" ids="Slow,Fast"/>
<dip bits="9" name="2 Players" ids="2 Credits, 1 Credit"/>
<dip bits="10,11" name="1 Player Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>3</part></rom>
<rom index="0" zip="ldrun4.zip" md5="cd633975a81980cefe104543024cc7ee" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/meta/Lode Runner.mra
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@ -4,6 +4,11 @@
<setname>ldrun</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Timer" ids="Slow,Medium,Fast,Fastest"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>0</part></rom>
<rom index="0" zip="ldrun.zip" md5="dbd20cd8f5d2555911090e62e4621920" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/meta/Spelunker 2.mra
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@ -4,6 +4,11 @@
<setname>spelunk2</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Energy Decrease" ids="Slow,Medium,Fast,Fastest"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>0A</part></rom>
<rom index="0" zip="spelunk2.zip" md5="5052a1aaf3f39b0a40babfcc00e9652d" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/meta/Spelunker.mra
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@ -4,6 +4,11 @@
<setname>spelunkr</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Energy Decrease" ids="Slow,Medium,Fast,Fastest"/>
<dip bits="10,11" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>9</part></rom>
<rom index="0" zip="spelunkr.zip" md5="ec64e30638077a75ff9f6698494057fc" type="merged|nonmerged">
<!-- CPU1, 128k -->

4
Arcade_MiST/IremM62 Hardware/meta/Youjyudn.mra
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@ -4,6 +4,10 @@
<setname>youjyudn</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<switches>
<!-- DSW1 -->
<dip bits="8,9" name="Lives" ids="3,2,4,5"/>
</switches>
<rom index="1"><part>0B</part></rom>
<rom index="0" zip="youjyudn.zip" md5="88142ed9adb6ffff9643cc7fa6bae82b" type="merged|nonmerged">
<!-- CPU1, 128k -->

5
Arcade_MiST/IremM62 Hardware/rtl/Graphics.VHD
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@ -28,6 +28,7 @@ entity Graphics is
sprite_ctl_i : in to_SPRITE_CTL_t;
sprite_ctl_o : out from_SPRITE_CTL_t;
spr0_hit : out std_logic;
sprite_pri : in std_logic;
sprite_rgb : in RGB_t;
graphics_i : in to_GRAPHICS_t;
@ -47,8 +48,6 @@ architecture SYN of Graphics is
signal bitmap_ctl_o_s : from_BITMAP_CTL_a(1 to PACE_VIDEO_NUM_BITMAPS);
signal tilemap_ctl_o_s : from_TILEMAP_CTL_a(1 to PACE_VIDEO_NUM_TILEMAPS);
signal sprite_ctl_o_s : from_SPRITE_CTL_t;
signal sprite_pri : std_logic;
signal rgb_data : RGB_t;
-- before OSD is mixed in
@ -229,7 +228,6 @@ begin
GEN_NO_SPRITES : if PACE_VIDEO_NUM_SPRITES = 0 generate
sprite_ctl_o_s <= ((others => '0'), '0', (others => '0'));
sprite_pri <= '0';
spr0_hit <= '0';
end generate GEN_NO_SPRITES;
@ -261,7 +259,6 @@ begin
pal_a => sprite_ctl_o_s.pal_a,
set => sprite_ctl_o_s.set,
pri => sprite_pri,
spr0_set => spr0_hit
);

3
Arcade_MiST/IremM62 Hardware/rtl/Inputs.VHD
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@ -8,8 +8,7 @@ entity inputs is
generic
(
NUM_DIPS : integer := 8;
NUM_INPUTS : integer := 2;
CLK_1US_DIV : natural := 30
NUM_INPUTS : integer := 2
);
port
(

48
Arcade_MiST/IremM62 Hardware/rtl/IremM62_MiST.sv
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@ -8,10 +8,11 @@ module IremM62_MiST(
output AUDIO_L,
output AUDIO_R,
input SPI_SCK,
output SPI_DO,
inout SPI_DO,
input SPI_DI,
input SPI_SS2,
input SPI_SS3,
input SPI_SS4,
input CONF_DATA0,
input CLOCK_27,
@ -39,7 +40,8 @@ localparam CONF_STR = {
"O1,Video Timings,Original,PAL 50Hz;",
"O34,Scanlines,Off,25%,50%,75%;",
"O5,Blending,Off,On;",
"O6,Service,Off,On;",
"DIP;",
"O7,Service,Off,On;",
"T0,Reset;",
"V,v1.0.",`BUILD_DATE
};
@ -48,31 +50,21 @@ wire palmode = status[1];
wire rotate = status[2];
wire [1:0] scanlines = status[4:3];
wire blend = status[5];
wire service = status[6];
wire service = status[7];
wire joyswap = status[6];
reg [1:0] orientation = 2'b10;
reg oneplayer;
wire [7:0] DSW1 = {/*coinage*/4'hf, ~status[11:8]};
always @(*) begin
orientation = 2'b10;
oneplayer = 1;
case (core_mod)
7'h0: ;// LDRUN
7'h1: ;// LDRUN2
7'h2: ;// LDRUN3
7'h3: ;// LDRUN4
7'h4: ;// KUNGFUM
7'h5: ;// HORIZON
7'h6: // BATTROAD
begin
orientation = 2'b11;
end
7'h7: ;// KIDNIKI
7'h8: ;// LOTLOT
7'h9: ;// SPELUNKR
7'hA: ;// SPELUNK2
7'hB: // YOUJYUDN
begin
orientation = 2'b01;
end
7'h3: oneplayer = 0; // LDRUN4
7'h6: orientation = 2'b11; // BATTROAD
7'hB: orientation = 2'b01; // YOUJYUDN
default: ;
endcase
end
@ -106,7 +98,8 @@ wire [7:0] key_code;
wire key_strobe;
user_io #(
.STRLEN(($size(CONF_STR)>>3)))
.STRLEN(($size(CONF_STR)>>3)),
.ROM_DIRECT_UPLOAD(1'b1))
user_io(
.clk_sys (clk_sys ),
.conf_str (CONF_STR ),
@ -162,11 +155,13 @@ wire ioctl_wr;
wire [24:0] ioctl_addr;
wire [7:0] ioctl_dout;
data_io data_io(
data_io #(.ROM_DIRECT_UPLOAD(1'b1)) data_io(
.clk_sys ( clk_sys ),
.SPI_SCK ( SPI_SCK ),
.SPI_SS2 ( SPI_SS2 ),
.SPI_SS4 ( SPI_SS4 ),
.SPI_DI ( SPI_DI ),
.SPI_DO ( SPI_DO ),
.ioctl_download( ioctl_downl ),
.ioctl_index ( ioctl_index ),
.ioctl_wr ( ioctl_wr ),
@ -262,6 +257,7 @@ target_top target_top(
.hwsel(core_mod),
.palmode(palmode),
.audio_out(audio),
.switches_i(DSW1),
.usr_coin1(m_coin1),
.usr_coin2(m_coin2),
.usr_service(service),
@ -317,7 +313,7 @@ mist_video #(.COLOR_DEPTH(4), .SD_HCNT_WIDTH(11)) mist_video(
.VGA_B ( VGA_B ),
.VGA_VS ( VGA_VS ),
.VGA_HS ( VGA_HS ),
.rotate ( { 1'b1, rotate } ),
.rotate ( { orientation[1], rotate } ),
.ce_divider ( 1'b1 ),
.scandoubler_disable( scandoublerD ),
.scanlines ( scanlines ),
@ -352,8 +348,8 @@ arcade_inputs inputs (
.joystick_1 ( joystick_1 ),
.rotate ( rotate ),
.orientation ( orientation ),
.joyswap ( 1'b0 ),
.oneplayer ( 1'b1 ),
.joyswap ( joyswap ),
.oneplayer ( oneplayer ),
.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),
.player1 ( {m_fireF, m_fireE, m_fireD, m_fireC, m_fireB, m_fireA, m_up, m_down, m_left, m_right} ),
.player2 ( {m_fire2F, m_fire2E, m_fire2D, m_fire2C, m_fire2B, m_fire2A, m_up2, m_down2, m_left2, m_right2} )

39
Arcade_MiST/IremM62 Hardware/rtl/clk_div.vhd
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@ -1,39 +0,0 @@
library ieee;
use ieee.std_logic_1164.all;
entity clk_div is
generic
(
DIVISOR : natural
);
port
(
clk : in std_logic;
reset : in std_logic;
clk_en : out std_logic
);
end clk_div;
architecture SYN of clk_div is
begin
process (clk, reset)
variable count : integer range 0 to DIVISOR-1;
begin
if reset = '1' then
count := 0;
clk_en <= '0';
elsif rising_edge(clk) then
clk_en <= '0';
if count = DIVISOR-1 then
clk_en <= '1';
count := 0;
else
count := count + 1;
end if;
end if;
end process;
end SYN;

2
Arcade_MiST/IremM62 Hardware/rtl/input_mapper.vhd
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@ -73,7 +73,7 @@ begin
inputs(0).d <= jamma_v(0).d;
inputs(1).d <= jamma_v(1).d;
inputs(2).d <= jamma_v(2).d;
inputs(3).d <= "11111110"; -- 1C/1C, 10/30/50K, 3 lives
inputs(3).d <= dips(7 downto 0); -- DSW1
inputs(4).d <= jamma.service & "1111100";
-- PORT_START("DSW2")
-- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")

9
Arcade_MiST/IremM62 Hardware/rtl/pace.vhd
View File

@ -61,9 +61,6 @@ architecture SYN of PACE is
alias clk_sys : std_logic is clkrst_i.clk(0);
constant CLK_1US_COUNTS : integer :=
integer(27 * PACE_CLK0_MULTIPLY_BY / PACE_CLK0_DIVIDE_BY);
signal mapped_inputs : from_MAPPED_INPUTS_t(0 to PACE_INPUTS_NUM_BYTES-1);
signal to_tilemap_ctl : to_TILEMAP_CTL_a(1 to PACE_VIDEO_NUM_TILEMAPS);
@ -77,6 +74,7 @@ architecture SYN of PACE is
signal to_sprite_ctl2 : to_SPRITE_CTL_t;
signal from_sprite_ctl : from_SPRITE_CTL_t;
signal spr0_hit : std_logic;
signal sprite_pri : std_logic;
signal to_graphics : to_GRAPHICS_t;
signal from_graphics : from_GRAPHICS_t;
@ -90,8 +88,7 @@ begin
generic map
(
NUM_DIPS => PACE_NUM_SWITCHES,
NUM_INPUTS => PACE_INPUTS_NUM_BYTES,
CLK_1US_DIV => CLK_1US_COUNTS
NUM_INPUTS => PACE_INPUTS_NUM_BYTES
)
port map
(
@ -136,6 +133,7 @@ begin
sprite_o => to_sprite_ctl,
spr0_hit => spr0_hit,
sprite_rgb => sprite_rgb,
sprite_pri => sprite_pri,
graphics_i => from_graphics,
graphics_o => to_graphics,
@ -177,6 +175,7 @@ begin
sprite_ctl_i => to_sprite_ctl,
sprite_ctl_o => from_sprite_ctl,
spr0_hit => spr0_hit,
sprite_pri => sprite_pri,
sprite_rgb => sprite_rgb,
graphics_i => to_graphics,

92
Arcade_MiST/IremM62 Hardware/rtl/platform.vhd
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@ -44,6 +44,7 @@ entity platform is
sprite_i : in from_SPRITE_CTL_t;
sprite_o : out to_SPRITE_CTL_t;
spr0_hit : in std_logic;
sprite_pri : out std_logic;
sprite_rgb : out RGB_t;
-- various graphics information
@ -555,12 +556,6 @@ begin
BLK_GFX_ROMS : block
type gfx_rom_d_a is array(M62_CHAR_ROM'range) of std_logic_vector(7 downto 0);
signal chr_rom_d : gfx_rom_d_a;
type spr_rom_d_a is array(0 to 11) of std_logic_vector(7 downto 0);
signal spr_rom : spr_rom_d_a;
begin
-- external background ROMs
@ -574,64 +569,10 @@ begin
tilemap_o(2).tile_d(23 downto 0) <= gfx3_do(7 downto 0) & gfx3_do(15 downto 8) & gfx3_do(23 downto 16);
-- internal background ROMs
-- GEN_CHAR_ROMS : for i in M62_CHAR_ROM'range generate
-- char_rom_inst : entity work.sprom
-- generic map
-- (
-- init_file => "./roms/" &
-- M62_CHAR_ROM(i) & ".hex",
-- widthad_a => 13
-- )
-- port map
-- (
-- clock => clk_video,
-- address => tilemap_i(1).tile_a(12 downto 0),
-- q => chr_rom_d(i)
-- );
-- end generate GEN_CHAR_ROMS;
--
-- tilemap_o(1).tile_d(23 downto 0) <= chr_rom_d(0) & chr_rom_d(1) & chr_rom_d(2);
-- external sprite ROMs
gfx2_addr <= sprite_i.a(15 downto 0);
sprite_o.d(23 downto 0) <= gfx2_do(7 downto 0) & gfx2_do(15 downto 8) & gfx2_do(23 downto 16);
-- internal sprite ROMs
-- GEN_SPRITE_ROMS : for i in M62_SPRITE_ROM'range generate
-- sprite_rom_inst : entity work.sprom
-- generic map
-- (
-- init_file => "./roms/" &
-- M62_SPRITE_ROM(i) & ".hex",
-- widthad_a => 13
-- )
-- port map
-- (
-- clock => clk_video,
-- address(12 downto 5) => sprite_i.a(12 downto 5),
-- address(4 downto 0) => sprite_i.a(4 downto 0),
-- q => spr_rom(i)
-- );
-- end generate GEN_SPRITE_ROMS;
--
-- sprite_o.d(sprite_o.d'left downto 24) <= (others => '0');
-- sprite_o.d(23 downto 0) <= spr_rom(0) &
-- spr_rom(1) &
-- spr_rom(2)
-- when sprite_i.a(14 downto 13) = "00" else
-- spr_rom(3) &
-- spr_rom(4) &
-- spr_rom(5)
-- when sprite_i.a(14 downto 13) = "01" else
-- spr_rom(6) &
-- spr_rom(7) &
-- spr_rom(8)
-- when sprite_i.a(14 downto 13) = "10" else
-- spr_rom(9) &
-- spr_rom(10) &
-- spr_rom(11);
end block BLK_GFX_ROMS;
BLK_VRAM : block
@ -914,7 +855,6 @@ begin
hwsel = HW_LDRUN or
hwsel = HW_LDRUN2 or
hwsel = HW_LDRUN3 or
hwsel = HW_LDRUN4 or
hwsel = HW_BATTROAD
else sprite_i.pal_a;
@ -988,6 +928,36 @@ begin
);
sp_pal_b_wr <= '1' when dl_wr = '1' and dl_addr(11 downto 8) = x"2" else '0'; -- 200-2FF
-- sprite priority
-- B Board:
-- J1: selects whether bit 4 of obj color code selects or not high priority over tiles
-- J2: selects whether bit 4 of obj color code goes to A7 of obj color PROMS
-- G Board
-- JP1-4 - Tiles with color code >= the value set here have priority over sprites
-- J1: selects whether bit 4 of obj color code selects or not high priority over tiles
process(hwsel, tilemap_i(1).pal_a, sprite_i.pal_a)
variable bg_trans: std_logic;
begin
sprite_pri <= '1';
bg_trans := '0';
if tilemap_i(1).pal_a(2 downto 0) = "000" then
bg_trans := '1';
end if;
if (hwsel = HW_YOUJYUDN or hwsel = HW_HORIZON) and tilemap_i(1).pal_a(7 downto 4) >= x"8" then
sprite_pri <= bg_trans;
end if;
if hwsel = HW_LDRUN and tilemap_i(1).pal_a(7 downto 4) >= x"c" then
sprite_pri <= sprite_i.pal_a(7) or bg_trans;
end if;
if (hwsel = HW_LDRUN2 or hwsel = HW_LDRUN3 or hwsel = HW_BATTROAD) and tilemap_i(1).pal_a(7 downto 4) >= x"4" then
sprite_pri <= sprite_i.pal_a(7) or bg_trans;
end if;
if hwsel = HW_KIDNIKI and tilemap_i(1).tile_a(13 downto 11) = "111" then
sprite_pri <= bg_trans;
end if;
end process;
-- unused outputs
sprite_o.ld <= '0';

47
Arcade_MiST/IremM62 Hardware/rtl/platform_pkg.vhd
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@ -8,61 +8,14 @@ use work.platform_variant_pkg.all;
use work.video_controller_pkg.all;
package platform_pkg is
-- constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_VGA_640x480_60Hz;
-- constant PACE_CLK0_DIVIDE_BY : natural := 3;
-- constant PACE_CLK0_MULTIPLY_BY : natural := 5; -- 24*5/3 = 40MHz
-- constant PACE_CLK1_DIVIDE_BY : natural := 19;
-- constant PACE_CLK1_MULTIPLY_BY : natural := 20; -- 24*20/19 = 25.263158MHz
-- constant PACE_VIDEO_H_SCALE : integer := 1;
-- constant PACE_VIDEO_V_SCALE : integer := 1;
-- constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_ARCADE_STD_336x240_60Hz;
-- constant PACE_CLK0_DIVIDE_BY : natural := 19;
-- constant PACE_CLK0_MULTIPLY_BY : natural := 20; -- 27*20/19 = 24MHz
-- constant PACE_CLK1_DIVIDE_BY : natural := 19;
-- constant PACE_CLK1_MULTIPLY_BY : natural := 5; -- 27*5/19 = 7.157895MHz
-- constant PACE_VIDEO_H_SCALE : integer := 1;
-- constant PACE_VIDEO_V_SCALE : integer := 1;
-- constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '0';
-- constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '0';
constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_IREMM62;
constant PACE_CLK0_DIVIDE_BY : natural := 9;
constant PACE_CLK0_MULTIPLY_BY : natural := 8; -- 27*8/9 = 24MHz
constant PACE_CLK1_DIVIDE_BY : natural := 27;
constant PACE_CLK1_MULTIPLY_BY : natural := 8; -- 27*8/9 = 24MHz
constant PACE_VIDEO_H_SCALE : integer := 1;
constant PACE_VIDEO_V_SCALE : integer := 1;
constant PACE_ENABLE_ADV724 : std_logic := '1';
constant USE_VIDEO_VBLANK_INTERRUPT : boolean := false;
constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '1';
constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '1';
constant PACE_VIDEO_BORDER_RGB : RGB_t := RGB_BLACK;
-- constant M62_VIDEO_H_SIZE : integer := 384;
-- constant M62_VIDEO_H_OFFSET : integer := (512-M62_VIDEO_H_SIZE)/2;
constant M62_VIDEO_V_SIZE : integer := 256;
constant PACE_VIDEO_NUM_BITMAPS : natural := 0;
constant PACE_VIDEO_NUM_TILEMAPS : natural := 2;
constant PACE_VIDEO_NUM_SPRITES : natural := 64;
-- constant PACE_VIDEO_H_SIZE : integer := M62_VIDEO_H_SIZE;
constant PACE_VIDEO_V_SIZE : integer := M62_VIDEO_V_SIZE;
constant PACE_VIDEO_L_CROP : integer := 8;
constant PACE_VIDEO_R_CROP : integer := 8;
constant PACE_VIDEO_PIPELINE_DELAY : integer := 5;
constant PACE_INPUTS_NUM_BYTES : integer := 6;
constant CLK0_FREQ_MHz : natural :=
27 * PACE_CLK0_MULTIPLY_BY / PACE_CLK0_DIVIDE_BY;
constant CPU_FREQ_MHz : natural := 3;
constant M62_CPU_CLK_ENA_DIVIDE_BY : natural := CLK0_FREQ_MHz / CPU_FREQ_MHz;
type from_PLATFORM_IO_t is record
not_used : std_logic;
end record;

438
Arcade_MiST/IremM62 Hardware/rtl/platform_variant_pkg.vhd
View File

@ -25,449 +25,11 @@ package platform_variant_pkg is
subtype HWSEL_t is integer range 0 to 11;
type rom_a is array (natural range <>) of string;
constant M62_ROM : rom_a(0 to 3) :=
(
0 => "lr-a-4e",
1 => "lr-a-4d",
2 => "lr-a-4b",
3 => "lr-a-4a"
);
constant M62_ROM_WIDTHAD : natural := 13;
constant M62_CHAR_ROM : rom_a(0 to 2) :=
(
0 => "lr-e-2d",
1 => "lr-e-2j",
2 => "lr-e-2f"
);
constant M62_SPRITE_ROM : rom_a(0 to 2) :=
(
0 => "lr-b-4k",
1 => "lr-b-3n",
2 => "lr-b-4c"
);
type pal_rgb_t is array (0 to 2) of std_logic_vector(7 downto 0);
type pal_a is array (natural range <>) of pal_rgb_t;
constant tile_pal : pal_a(0 to 255) :=
(
17 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
25 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
33 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
40 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
41 => (0=>"11011100", 1=>"01100010", 2=>"00000011"), -- DC6203
42 => (0=>"00000011", 1=>"11111111", 2=>"11001100"), -- 03FFCC
43 => (0=>"11011100", 1=>"11011100", 2=>"00000011"), -- DCDC03
44 => (0=>"11011100", 1=>"10110111", 2=>"01010000"), -- DCB750
45 => (0=>"10000100", 1=>"10100110", 2=>"10100110"), -- 84A6A6
46 => (0=>"10010100", 1=>"01100010", 2=>"01100010"), -- 946262
49 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
50 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
51 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
52 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
53 => (0=>"11111111", 1=>"00000011", 2=>"11111111"), -- FF03FF
54 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
55 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
56 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
57 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
63 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
72 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
73 => (0=>"11001100", 1=>"00000011", 2=>"11110000"), -- CC03F0
74 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
75 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
76 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
77 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
78 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
79 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
80 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
81 => (0=>"11110000", 1=>"11011100", 2=>"00000011"), -- F0DC03
82 => (0=>"11110000", 1=>"10010100", 2=>"00000011"), -- F09403
83 => (0=>"11111111", 1=>"11111111", 2=>"10100110"), -- FFFFA6
84 => (0=>"10000100", 1=>"10000100", 2=>"11111111"), -- 8484FF
85 => (0=>"11011100", 1=>"10010100", 2=>"00000011"), -- DC9403
86 => (0=>"00000011", 1=>"11011100", 2=>"11011100"), -- 03DCDC
89 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
91 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
93 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
95 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
97 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
98 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
99 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
101 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
102 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
103 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
105 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
106 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
107 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
108 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
109 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
110 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
111 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
113 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
114 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
115 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
116 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
117 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
118 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
119 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
121 => (0=>"11111111", 1=>"11001100", 2=>"00000011"), -- FFCC03
122 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
123 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
124 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
125 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
126 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
127 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
136 => (0=>"10000100", 1=>"10000100", 2=>"10000100"), -- 848484
137 => (0=>"10010100", 1=>"10010100", 2=>"10010100"), -- 949494
138 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
139 => (0=>"11011100", 1=>"10110111", 2=>"10000100"), -- DCB784
140 => (0=>"01100010", 1=>"01100010", 2=>"11001100"), -- 6262CC
141 => (0=>"11001100", 1=>"11001100", 2=>"11001100"), -- CCCCCC
142 => (0=>"10110111", 1=>"11011100", 2=>"11110000"), -- B7DCF0
143 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
145 => (0=>"11110000", 1=>"11001100", 2=>"10010100"), -- F0CC94
146 => (0=>"10000100", 1=>"10000100", 2=>"10000100"), -- 848484
147 => (0=>"10000100", 1=>"10000100", 2=>"10000100"), -- 848484
148 => (0=>"11001100", 1=>"11001100", 2=>"11001100"), -- CCCCCC
149 => (0=>"11001100", 1=>"11001100", 2=>"10100110"), -- CCCCA6
150 => (0=>"10110111", 1=>"10110111", 2=>"10110111"), -- B7B7B7
153 => (0=>"10110111", 1=>"00000011", 2=>"11001100"), -- B703CC
154 => (0=>"00000011", 1=>"10010100", 2=>"00000011"), -- 039403
155 => (0=>"11011100", 1=>"10110111", 2=>"10000100"), -- DCB784
156 => (0=>"01100010", 1=>"01100010", 2=>"11001100"), -- 6262CC
157 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
158 => (0=>"10100110", 1=>"11011100", 2=>"10100110"), -- A6DCA6
159 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
160 => (0=>"10000100", 1=>"10000100", 2=>"10000100"), -- 848484
161 => (0=>"10110111", 1=>"00000011", 2=>"11001100"), -- B703CC
162 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
163 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
164 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
165 => (0=>"11001100", 1=>"10100110", 2=>"11011100"), -- CCA6DC
166 => (0=>"10110111", 1=>"11011100", 2=>"11110000"), -- B7DCF0
167 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
168 => (0=>"10000100", 1=>"10000100", 2=>"10000100"), -- 848484
169 => (0=>"10100110", 1=>"01110000", 2=>"00000011"), -- A67003
170 => (0=>"11001100", 1=>"10100110", 2=>"00000011"), -- CCA603
171 => (0=>"11110000", 1=>"11011100", 2=>"00000011"), -- F0DC03
173 => (0=>"10100110", 1=>"10000100", 2=>"01110000"), -- A68470
174 => (0=>"10110111", 1=>"11011100", 2=>"11110000"), -- B7DCF0
175 => (0=>"10110111", 1=>"10110111", 2=>"10110111"), -- B7B7B7
176 => (0=>"10010100", 1=>"11001100", 2=>"11001100"), -- 94CCCC
177 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
178 => (0=>"01100010", 1=>"10010100", 2=>"00000011"), -- 629403
179 => (0=>"11011100", 1=>"10100110", 2=>"01010000"), -- DCA650
180 => (0=>"00000011", 1=>"01100010", 2=>"01010000"), -- 036250
181 => (0=>"11001100", 1=>"01110000", 2=>"00000011"), -- CC7003
182 => (0=>"10010100", 1=>"11001100", 2=>"11001100"), -- 94CCCC
183 => (0=>"11001100", 1=>"11011100", 2=>"10000100"), -- CCDC84
184 => (0=>"11001100", 1=>"11011100", 2=>"10000100"), -- CCDC84
185 => (0=>"10010100", 1=>"01100010", 2=>"00000011"), -- 946203
186 => (0=>"01100010", 1=>"10010100", 2=>"00000011"), -- 629403
187 => (0=>"11011100", 1=>"10100110", 2=>"01010000"), -- DCA650
188 => (0=>"00000011", 1=>"01100010", 2=>"01010000"), -- 036250
189 => (0=>"11001100", 1=>"01110000", 2=>"00000011"), -- CC7003
190 => (0=>"10110111", 1=>"10000100", 2=>"01010000"), -- B78450
192 => (0=>"11001100", 1=>"11011100", 2=>"10000100"), -- CCDC84
193 => (0=>"01110000", 1=>"01000001", 2=>"00000011"), -- 704103
194 => (0=>"10100110", 1=>"10000100", 2=>"01010000"), -- A68450
195 => (0=>"11011100", 1=>"10100110", 2=>"00000011"), -- DCA603
197 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
198 => (0=>"10010100", 1=>"10000100", 2=>"01110000"), -- 948470
199 => (0=>"10110111", 1=>"10100110", 2=>"10010100"), -- B7A694
200 => (0=>"11011100", 1=>"10100110", 2=>"01010000"), -- DCA650
201 => (0=>"01110000", 1=>"01000001", 2=>"00000011"), -- 704103
202 => (0=>"10100110", 1=>"10000100", 2=>"01010000"), -- A68450
203 => (0=>"11011100", 1=>"10100110", 2=>"00000011"), -- DCA603
204 => (0=>"11001100", 1=>"11011100", 2=>"10000100"), -- CCDC84
205 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
206 => (0=>"10010100", 1=>"10000100", 2=>"01110000"), -- 948470
207 => (0=>"10110111", 1=>"10100110", 2=>"10010100"), -- B7A694
208 => (0=>"11011100", 1=>"10100110", 2=>"01010000"), -- DCA650
209 => (0=>"11110000", 1=>"00000011", 2=>"10000100"), -- F00384
210 => (0=>"11001100", 1=>"11011100", 2=>"10000100"), -- CCDC84
212 => (0=>"00000011", 1=>"00000011", 2=>"11110000"), -- 0303F0
213 => (0=>"11001100", 1=>"10110111", 2=>"11001100"), -- CCB7CC
214 => (0=>"10010100", 1=>"11001100", 2=>"11001100"), -- 94CCCC
215 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
224 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
225 => (0=>"11011100", 1=>"01100010", 2=>"00000011"), -- DC6203
227 => (0=>"11011100", 1=>"11011100", 2=>"00000011"), -- DCDC03
228 => (0=>"00000011", 1=>"10100110", 2=>"11011100"), -- 03A6DC
230 => (0=>"10100110", 1=>"11011100", 2=>"11011100"), -- A6DCDC
232 => (0=>"10100110", 1=>"11011100", 2=>"10100110"), -- A6DCA6
234 => (0=>"10110111", 1=>"01110000", 2=>"01100010"), -- B77062
236 => (0=>"11110000", 1=>"10100110", 2=>"10010100"), -- F0A694
240 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
242 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
243 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
244 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
245 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
247 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
248 => (0=>"10100110", 1=>"10100110", 2=>"11011100"), -- A6A6DC
249 => (0=>"10100110", 1=>"11011100", 2=>"10100110"), -- A6DCA6
250 => (0=>"11001100", 1=>"10010100", 2=>"01110000"), -- CC9470
251 => (0=>"10110111", 1=>"01110000", 2=>"01100010"), -- B77062
252 => (0=>"11001100", 1=>"01110000", 2=>"10000100"), -- CC7084
253 => (0=>"11110000", 1=>"10100110", 2=>"10010100"), -- F0A694
others => (others => "00000011")
);
constant sprite_pal : pal_a(0 to 255) :=
(
1 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
2 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
3 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
4 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
5 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
7 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
9 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
10 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
11 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
12 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
13 => (0=>"11111111", 1=>"00000011", 2=>"11111111"), -- FF03FF
14 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
15 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
17 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
18 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
19 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
20 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
21 => (0=>"11111111", 1=>"00000011", 2=>"11111111"), -- FF03FF
22 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
23 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
25 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
26 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
27 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
28 => (0=>"00000011", 1=>"00110001", 2=>"11111111"), -- 0331FF
29 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
30 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
31 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
33 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
34 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
35 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
36 => (0=>"00000011", 1=>"00110001", 2=>"11111111"), -- 0331FF
37 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
38 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
39 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
41 => (0=>"11011100", 1=>"00000011", 2=>"00000011"), -- DC0303
42 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
43 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
44 => (0=>"00000011", 1=>"10100110", 2=>"11111111"), -- 03A6FF
45 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
46 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
47 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
49 => (0=>"11011100", 1=>"00000011", 2=>"00000011"), -- DC0303
51 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
52 => (0=>"00000011", 1=>"10100110", 2=>"11111111"), -- 03A6FF
53 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
54 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
55 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
57 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
58 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
59 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
60 => (0=>"00000011", 1=>"10000100", 2=>"11111111"), -- 0384FF
61 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
62 => (0=>"10100110", 1=>"11001100", 2=>"11001100"), -- A6CCCC
63 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
65 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
66 => (0=>"00000011", 1=>"11110000", 2=>"01100010"), -- 03F062
67 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
68 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
69 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
71 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
73 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
75 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
76 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
77 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
78 => (0=>"00000011", 1=>"11110000", 2=>"01100010"), -- 03F062
79 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
81 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
82 => (0=>"00000011", 1=>"10100110", 2=>"00000011"), -- 03A603
83 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
84 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
86 => (0=>"00000011", 1=>"11110000", 2=>"11110000"), -- 03F0F0
87 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
89 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
91 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
92 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
94 => (0=>"00000011", 1=>"11110000", 2=>"11110000"), -- 03F0F0
95 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
98 => (0=>"11110000", 1=>"10100110", 2=>"00000011"), -- F0A603
99 => (0=>"11110000", 1=>"10110111", 2=>"10000100"), -- F0B784
100 => (0=>"00000011", 1=>"10010100", 2=>"11011100"), -- 0394DC
101 => (0=>"11111111", 1=>"11001100", 2=>"10100110"), -- FFCCA6
102 => (0=>"11001100", 1=>"11110000", 2=>"11110000"), -- CCF0F0
103 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
105 => (0=>"01110000", 1=>"01000001", 2=>"00000011"), -- 704103
106 => (0=>"10100110", 1=>"10000100", 2=>"01010000"), -- A68450
107 => (0=>"11011100", 1=>"10100110", 2=>"00000011"), -- DCA603
109 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
110 => (0=>"10010100", 1=>"10000100", 2=>"01110000"), -- 948470
111 => (0=>"10110111", 1=>"10100110", 2=>"10010100"), -- B7A694
113 => (0=>"11110000", 1=>"00110001", 2=>"00110001"), -- F03131
114 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
115 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
116 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
117 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
118 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
119 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
121 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
122 => (0=>"10000100", 1=>"11001100", 2=>"00000011"), -- 84CC03
123 => (0=>"11111111", 1=>"10110111", 2=>"00000011"), -- FFB703
124 => (0=>"00000011", 1=>"01000001", 2=>"11011100"), -- 0341DC
125 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
126 => (0=>"00000011", 1=>"10010100", 2=>"00000011"), -- 039403
127 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
129 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
130 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
131 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
132 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
133 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
135 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
137 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
138 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
139 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
140 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
141 => (0=>"11111111", 1=>"00000011", 2=>"11111111"), -- FF03FF
142 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
143 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
145 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
146 => (0=>"01100010", 1=>"01100010", 2=>"01100010"), -- 626262
147 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
148 => (0=>"00000011", 1=>"00000011", 2=>"11111111"), -- 0303FF
149 => (0=>"11111111", 1=>"00000011", 2=>"11111111"), -- FF03FF
150 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
151 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
153 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
154 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
155 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
156 => (0=>"00000011", 1=>"00110001", 2=>"11111111"), -- 0331FF
157 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
158 => (0=>"00000011", 1=>"11111111", 2=>"11111111"), -- 03FFFF
159 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
161 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
162 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
163 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
164 => (0=>"00000011", 1=>"00110001", 2=>"11111111"), -- 0331FF
165 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
166 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
167 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
169 => (0=>"11011100", 1=>"00000011", 2=>"00000011"), -- DC0303
170 => (0=>"00000011", 1=>"11111111", 2=>"00000011"), -- 03FF03
171 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
172 => (0=>"00000011", 1=>"10100110", 2=>"11111111"), -- 03A6FF
173 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
174 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
175 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
177 => (0=>"11011100", 1=>"00000011", 2=>"00000011"), -- DC0303
179 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
180 => (0=>"00000011", 1=>"10100110", 2=>"11111111"), -- 03A6FF
181 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
182 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
183 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
185 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
186 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
187 => (0=>"11111111", 1=>"10100110", 2=>"00000011"), -- FFA603
188 => (0=>"00000011", 1=>"10000100", 2=>"11111111"), -- 0384FF
189 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
190 => (0=>"10100110", 1=>"11001100", 2=>"11001100"), -- A6CCCC
191 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
193 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
194 => (0=>"00000011", 1=>"11110000", 2=>"01100010"), -- 03F062
195 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
196 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
197 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
199 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
201 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
203 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
204 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
205 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
206 => (0=>"00000011", 1=>"11110000", 2=>"01100010"), -- 03F062
207 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
209 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
210 => (0=>"00000011", 1=>"10100110", 2=>"00000011"), -- 03A603
211 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
212 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
214 => (0=>"00000011", 1=>"11110000", 2=>"11110000"), -- 03F0F0
215 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
217 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
219 => (0=>"11111111", 1=>"11111111", 2=>"00000011"), -- FFFF03
220 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
222 => (0=>"00000011", 1=>"11110000", 2=>"11110000"), -- 03F0F0
223 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
226 => (0=>"11110000", 1=>"10100110", 2=>"00000011"), -- F0A603
227 => (0=>"11110000", 1=>"10110111", 2=>"10000100"), -- F0B784
228 => (0=>"00000011", 1=>"10010100", 2=>"11011100"), -- 0394DC
229 => (0=>"11111111", 1=>"11001100", 2=>"10100110"), -- FFCCA6
230 => (0=>"11001100", 1=>"11110000", 2=>"11110000"), -- CCF0F0
231 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
233 => (0=>"01110000", 1=>"01000001", 2=>"00000011"), -- 704103
234 => (0=>"10100110", 1=>"10000100", 2=>"01010000"), -- A68450
235 => (0=>"11011100", 1=>"10100110", 2=>"00000011"), -- DCA603
237 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
238 => (0=>"10010100", 1=>"10000100", 2=>"01110000"), -- 948470
239 => (0=>"10110111", 1=>"10100110", 2=>"10010100"), -- B7A694
241 => (0=>"11110000", 1=>"00110001", 2=>"00110001"), -- F03131
242 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
243 => (0=>"10100110", 1=>"01100010", 2=>"00000011"), -- A66203
244 => (0=>"00000011", 1=>"01000001", 2=>"11111111"), -- 0341FF
245 => (0=>"11111111", 1=>"10100110", 2=>"10000100"), -- FFA684
246 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
247 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
249 => (0=>"11111111", 1=>"00000011", 2=>"00000011"), -- FF0303
250 => (0=>"10000100", 1=>"11001100", 2=>"00000011"), -- 84CC03
251 => (0=>"11111111", 1=>"10110111", 2=>"00000011"), -- FFB703
252 => (0=>"00000011", 1=>"01000001", 2=>"11011100"), -- 0341DC
253 => (0=>"11111111", 1=>"11111111", 2=>"11111111"), -- FFFFFF
254 => (0=>"00000011", 1=>"10010100", 2=>"00000011"), -- 039403
255 => (0=>"11110000", 1=>"11110000", 2=>"11110000"), -- F0F0F0
others => (others => "00000011")
);
-- table of sprite heights
type prom_a is array (natural range <>) of integer range 0 to 3;
-- ldrun
-- constant sprite_prom : prom_a(0 to 31) :=
-- (
-- 4 => 0,
-- 5 => 0,
-- 6 => 0,
-- 7 => 0,
-- 12 => 0,
-- 13 => 0,
-- 14 => 0,
-- 15 => 0,
-- 20 => 0,
-- 21 => 0,
-- 22 => 0,
-- 23 => 0,
-- 28 => 0,
-- 29 => 0,
-- 30 => 0,
-- 31 => 0,
-- others => 1
-- );
-- kungfum
-- constant sprite_prom : prom_a(0 to 31) :=
-- (
-- 0 => 0,
-- 1 => 0,
-- 8 => 0,
-- 9 => 0,
-- 12 => 2,
-- 13 => 2,
-- 14 => 2,
-- 15 => 2,
-- 16 => 0,
-- 21 => 0,
-- 23 => 0,
-- 24 => 0,
-- 27 => 0,
-- others => 1
-- );
end package platform_variant_pkg;

4
Arcade_MiST/IremM62 Hardware/rtl/sprite_array.vhd
View File

@ -41,7 +41,7 @@ entity sprite_array is
-- video data
pal_a : out std_logic_vector(7 downto 0);
set : out std_logic;
pri : out std_logic;
--pri : out std_logic;
spr0_set : out std_logic
);
end entity sprite_array;
@ -141,7 +141,7 @@ begin
end loop;
end if;
set <= spr_on_v;
pri <= spr_pri_v;
--pri <= spr_pri_v;
end process;
-- for NES, and perhaps others

1
Arcade_MiST/IremM62 Hardware/rtl/sprite_pkg.vhd
View File

@ -80,7 +80,6 @@ package sprite_pkg is
-- video data
pal_a : out std_logic_vector(7 downto 0);
set : out std_logic;
pri : out std_logic;
spr0_set : out std_logic
);
end component sprite_array;

2
Arcade_MiST/IremM62 Hardware/rtl/spritectl.vhd
View File

@ -149,7 +149,7 @@ begin
end if;
if video_ctl.stb = '1' then
x := unsigned(reg_i.x) + 256 - 64 + PACE_VIDEO_PIPELINE_DELAY;
x := unsigned(reg_i.x) + 256 - 64 + PACE_VIDEO_PIPELINE_DELAY + 1;
if hwsel /= HW_KIDNIKI then x:=x-8; end if;
if hires = '0' then x := x - 64; end if;

3
Arcade_MiST/IremM62 Hardware/rtl/target_top.vhd
View File

@ -17,6 +17,8 @@ entity target_top is port(
hwsel : in HWSEL_t;
palmode : in std_logic;
audio_out : out std_logic_vector(11 downto 0);
switches_i : from_SWITCHES_t;
usr_coin1 : in std_logic;
usr_coin2 : in std_logic;
usr_service : in std_logic;
@ -64,7 +66,6 @@ architecture SYN of target_top is
signal clkrst_i : from_CLKRST_t;
signal buttons_i : from_BUTTONS_t;
signal switches_i : from_SWITCHES_t;
signal leds_o : to_LEDS_t;
signal inputs_i : from_INPUTS_t;
signal video_i : from_VIDEO_t;

4
Arcade_MiST/IremM62 Hardware/rtl/tilemapctl.vhd
View File

@ -61,7 +61,8 @@ begin
ctl_o.tile_a(ctl_o.tile_a'left downto 15) <= (others => '0');
-- tilemap scroll
x <= std_logic_vector(unsigned(video_ctl.x) - 256 + 128 + 8) when unsigned(y) < 6*8 and HWSEL = HW_KUNGFUM else
x <= std_logic_vector(unsigned(video_ctl.x) - 256 + 128 + 8) when unsigned(y) < 6*8 and hwsel = HW_KUNGFUM else
std_logic_vector(unsigned(video_ctl.x) - 256 + unsigned(hscroll(8 downto 0)) + 64 + 10) when hwsel = HW_LDRUN4 else
std_logic_vector(unsigned(video_ctl.x) - 256 + unsigned(hscroll(8 downto 0)) + 64 + 8) when hires = '1' else
std_logic_vector(unsigned(video_ctl.x) - 256 + unsigned(hscroll(8 downto 0)) + 128 + 8);
y <= std_logic_vector(unsigned(video_ctl.y) - 256 + unsigned(vscroll(8 downto 0)) + 128) when hwsel = HW_SPELUNKR or hwsel = HW_SPELUNK2 else
@ -153,6 +154,7 @@ begin
hwsel = HW_LOTLOT or
hwsel = HW_LDRUN or
hwsel = HW_LDRUN2 or
hwsel = HW_LDRUN3 or
hwsel = HW_BATTROAD
then
flipx := attr_d_r(5);

482
Arcade_MiST/IremM62 Hardware/rtl/video_controller.vhd
View File

@ -1,482 +0,0 @@
library IEEE;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.video_controller_pkg.all;
use ieee.numeric_std.all;
entity pace_video_controller is
generic
(
CONFIG : PACEVideoController_t := PACE_VIDEO_NONE;
DELAY : integer := 1;
V_SIZE : integer;
L_CROP : integer range 0 to 255;
R_CROP : integer range 0 to 255;
H_SCALE : integer;
V_SCALE : integer;
H_SYNC_POL : std_logic := '1';
V_SYNC_POL : std_logic := '1';
BORDER_RGB : RGB_t := RGB_BLACK
);
port
(
-- clocking etc
video_i : in from_VIDEO_t;
H_SIZE : integer;
-- register interface
reg_i : in VIDEO_REG_t;
-- video input data
rgb_i : in RGB_t;
-- control signals (out)
video_ctl_o : out from_VIDEO_CTL_t;
-- video output control & data
video_o : out to_VIDEO_t
);
end pace_video_controller;
architecture SYN of pace_video_controller is
constant SIM_DELAY : time := 2 ns;
signal VIDEO_H_SIZE : integer;
constant VIDEO_V_SIZE : integer := V_SIZE * V_SCALE;
subtype reg_t is integer range 0 to 2047;
alias clk : std_logic is video_i.clk;
alias clk_ena : std_logic is video_i.clk_ena;
alias reset : std_logic is video_i.reset;
-- registers
signal h_front_porch_r : reg_t := 0;
signal h_sync_r : reg_t := 0;
signal h_back_porch_r : reg_t := 0;
signal h_border_r : reg_t := 0;
signal h_video_r : reg_t := 0;
signal v_front_porch_r : reg_t := 0;
signal v_sync_r : reg_t := 0;
signal v_back_porch_r : reg_t := 0;
signal v_border_r : reg_t := 0;
signal v_video_r : reg_t := 0;
signal border_rgb_r : RGB_t := ((others=>'0'), (others=>'0'), (others=>'0'));
-- derived values
signal h_sync_start : reg_t := 0;
signal h_back_porch_start : reg_t := 0;
signal h_left_border_start : reg_t := 0;
signal h_video_start : reg_t := 0;
signal h_right_border_start : reg_t := 0;
signal h_line_end : reg_t := 0;
signal v_sync_start : reg_t := 0;
signal v_back_porch_start : reg_t := 0;
signal v_top_border_start : reg_t := 0;
signal v_video_start : reg_t := 0;
signal v_bottom_border_start : reg_t := 0;
signal v_screen_end : reg_t := 0;
signal hsync_s : std_logic := '0';
signal vsync_s : std_logic := '0';
signal hactive_s : std_logic := '0';
signal vactive_s : std_logic := '0';
signal hblank_s : std_logic := '0';
signal vblank_s : std_logic := '0';
subtype count_t is integer range 0 to 2047;
signal x_count : count_t := 0;
signal y_count : count_t := 0;
signal x_s : unsigned(10 downto 0) := (others => '0');
signal y_s : unsigned(10 downto 0) := (others => '0');
--signal extended_reset : std_logic := '1';
alias extended_reset : std_logic is video_i.reset;
begin
VIDEO_H_SIZE <= H_SIZE * H_SCALE;
video_ctl_o.video_h_offset <= to_integer(shift_right(to_unsigned(512-VIDEO_H_SIZE, 9), 1));
-- registers
reg_proc: process (reset, clk, VIDEO_H_SIZE)
begin
--if reset = '1' then
case CONFIG is
when PACE_VIDEO_VGA_240x320_60Hz =>
-- P3M, clk=11.136MHz, clk_ena=5.568MHz
h_front_porch_r <= 272-240;
h_sync_r <= 5;
h_back_porch_r <= 22;
h_border_r <= (240-VIDEO_H_SIZE)/2;
v_front_porch_r <= 326-320;
v_sync_r <= 1;
v_back_porch_r <= 5;
v_border_r <= (320-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_320x480_60Hz =>
-- VGA, clk=12.588MHz
--# 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio
--Modeline "320x240" 12.588 320 336 384 400 240 245 246 262 Doublescan
h_front_porch_r <= 16;
h_sync_r <= 48;
h_back_porch_r <= 16;
h_border_r <= (320-VIDEO_H_SIZE)/2;
v_front_porch_r <= (5*2);
v_sync_r <= (1*2);
v_back_porch_r <= (16*2);
v_border_r <= (480-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_640x480_60Hz =>
-- VGA, clk=25.175MHz
h_front_porch_r <= 16;
h_sync_r <= 96;
h_back_porch_r <= 48;
h_border_r <= (640-VIDEO_H_SIZE)/2;
v_front_porch_r <= 10;
v_sync_r <= 2;
v_back_porch_r <= 33;
v_border_r <= (480-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_800x600_60Hz =>
-- SVGA, clk=40MHz
h_front_porch_r <= 40;
h_sync_r <= 128;
h_back_porch_r <= 88;
h_border_r <= (800-VIDEO_H_SIZE)/2;
v_front_porch_r <= 1;
v_sync_r <= 4;
v_back_porch_r <= 23;
v_border_r <= (600-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_1024x768_60Hz =>
-- XVGA, clk=65MHz
h_front_porch_r <= 24;
h_sync_r <= 136;
h_back_porch_r <= 160;
h_border_r <= (1024-VIDEO_H_SIZE)/2;
v_front_porch_r <= 3;
v_sync_r <= 6;
v_back_porch_r <= 29;
v_border_r <= (768-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_1366x768_60Hz =>
-- XVGA(NAVICO ROCKY), clk=72MHz
h_front_porch_r <= 88; --64;
h_sync_r <= 44; --112;
h_back_porch_r <= 148; --248;
h_border_r <= (1366-VIDEO_H_SIZE)/2;
v_front_porch_r <= 4; --3;
v_sync_r <= 5; --6;
v_back_porch_r <= 36; --18;
v_border_r <= (768-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_1280x800_60Hz =>
-- Sentinel Mode 36, clk=103.2MHz
h_front_porch_r <= 64;
h_sync_r <= 32;
h_back_porch_r <= 362-32-64;
h_border_r <= (1280-VIDEO_H_SIZE)/2;
v_front_porch_r <= 3;
v_sync_r <= 4;
v_back_porch_r <= 38-4-3;
v_border_r <= (800-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_1280x1024_60Hz =>
-- SXGA, clk=108MHz
h_front_porch_r <= 48;
h_sync_r <= 112;
h_back_porch_r <= 248;
h_border_r <= (1280-VIDEO_H_SIZE)/2;
v_front_porch_r <= 1;
v_sync_r <= 3;
v_back_porch_r <= 38;
v_border_r <= (1024-VIDEO_V_SIZE)/2;
when PACE_VIDEO_VGA_1680x1050_60Hz =>
-- WSXGA+, clk=147.14MHz
h_front_porch_r <= 104;
h_sync_r <= 184;
h_back_porch_r <= 288;
v_front_porch_r <= 1;
v_sync_r <= 3;
v_back_porch_r <= 33;
-- WSXGA+, clk=118MHz
--h_front_porch_r <= 48;
--h_sync_r <= 32;
--h_back_porch_r <= 80;
--v_front_porch_r <= 3;
--v_sync_r <= 6;
--v_back_porch_r <= 21;
h_border_r <= (1680-VIDEO_H_SIZE)/2;
v_border_r <= (1050-VIDEO_V_SIZE)/2;
when PACE_VIDEO_ARCADE_STD_336x240_60Hz =>
-- arcade standard resolution, clk=7.16MHz
h_front_porch_r <= 34;
h_sync_r <= 34;
h_back_porch_r <= 51;
h_border_r <= (336-VIDEO_H_SIZE)/2;
v_front_porch_r <= 3;
v_sync_r <= 3;
v_back_porch_r <= 16;
v_border_r <= (240-VIDEO_V_SIZE)/2;
when PACE_VIDEO_ARCADE_STD_336x240_60Hz_28M64 =>
-- arcade standard resolution, clk=28.64MHz
h_front_porch_r <= 4*34;
h_sync_r <= 4*34;
h_back_porch_r <= 4*51;
h_border_r <= 4*(336-VIDEO_H_SIZE)/2;
v_front_porch_r <= 3;
v_sync_r <= 3;
v_back_porch_r <= 16;
v_border_r <= (240-VIDEO_V_SIZE)/2;
when PACE_VIDEO_CVBS_720x288p_50Hz =>
-- generic composite, clk=13.5MHz
h_front_porch_r <= (8+12);
h_sync_r <= 64;
h_back_porch_r <= (144-64-(8+12));
h_border_r <= (720-VIDEO_H_SIZE)/2;
v_front_porch_r <= 1;
v_sync_r <= 3;
v_back_porch_r <= 20;
v_border_r <= (288-VIDEO_V_SIZE)/2;
when PACE_VIDEO_LCM_320x240_60Hz =>
-- DE1/2, clk=18MHz
h_front_porch_r <= 59;
h_sync_r <= 1;
h_back_porch_r <= 151;
h_border_r <= (320-VIDEO_H_SIZE)*3/2;
v_front_porch_r <= 8;
v_sync_r <= 1;
v_back_porch_r <= 13;
v_border_r <= (240-VIDEO_V_SIZE)/2;
when PACE_VIDEO_IREMM62 =>
-- Irem M62 original timings
-- 512x282@8MHz or 384x282@6Mhz, (384x256 or 256x256 active display), 55 Hz
-- use 312 lines here, for 50 Hz PAL compatiblity.
h_front_porch_r <= 12;
h_sync_r <= 38;
h_back_porch_r <= 62;
h_border_r <= 0;--(576-VIDEO_H_SIZE)/2;
v_front_porch_r <= 10+15;
v_sync_r <= 3;
v_back_porch_r <= 13+15;
v_border_r <= 0;--(288-VIDEO_V_SIZE)/2;
when others =>
null;
end case;
h_video_r <= VIDEO_H_SIZE;
v_video_r <= VIDEO_V_SIZE;
border_rgb_r <= BORDER_RGB;
--end if;
end process reg_proc;
-- register some arithmetic
init_proc: process (reset, clk, clk_ena)
begin
if reset = '1' then
null;
elsif rising_edge(clk) then
h_sync_start <= h_front_porch_r - 1;
h_back_porch_start <= h_sync_start + h_sync_r;
h_left_border_start <= h_back_porch_start + h_back_porch_r;
h_video_start <= h_left_border_start + h_border_r;
h_right_border_start <= h_video_start + h_video_r;
h_line_end <= h_right_border_start + h_border_r;
v_sync_start <= v_front_porch_r - 1;
v_back_porch_start <= v_sync_start + v_sync_r;
v_top_border_start <= v_back_porch_start + v_back_porch_r;
v_video_start <= v_top_border_start + v_border_r;
v_bottom_border_start <= v_video_start + v_video_r;
v_screen_end <= v_bottom_border_start + v_border_r;
end if;
end process init_proc;
reset_proc: process (reset, clk)
variable count_v : integer;
begin
if reset = '1' then
--extended_reset <= '1';
count_v := 7;
elsif rising_edge(clk) then
if count_v = 0 then
--extended_reset <= '0';
else
count_v := count_v - 1;
end if;
end if;
end process reset_proc;
-- video control outputs
timer_proc: process (extended_reset, clk, clk_ena)
begin
if extended_reset = '1' then
hblank_s <= '1';
vblank_s <= '1';
hactive_s <= '0';
vactive_s <= '0';
hsync_s <= not H_SYNC_POL;
x_count <= 0;
y_count <= 0;
elsif rising_edge(clk) and clk_ena = '1' then
if x_count = h_line_end then
hblank_s <= '1';
hactive_s <= '0'; -- for 0 borders
if y_count = v_screen_end then
vblank_s <= '1';
vactive_s <= '0'; -- for 0 borders
y_count <= 0;
else
y_s <= y_s + 1;
if y_count = v_sync_start then
vsync_s <= V_SYNC_POL;
elsif y_count = v_back_porch_start then
vsync_s <= not V_SYNC_POL;
elsif y_count = v_video_start then
vblank_s <= '0'; -- for 0 borders
vactive_s <= '1';
y_s <= (others => '0');
-- check the borders last in case they're 0
elsif y_count = v_top_border_start then
vblank_s <= '0';
elsif y_count = v_bottom_border_start then
vactive_s <= '0';
end if;
y_count <= y_count + 1;
end if;
x_count <= 0;
else
x_s <= x_s + 1;
if x_count = h_sync_start then
hsync_s <= H_SYNC_POL;
elsif x_count = h_back_porch_start then
hsync_s <= not H_SYNC_POL;
elsif x_count = h_video_start then
hblank_s <= '0'; -- for 0 borders
hactive_s <= '1';
x_s <= (others => '0');
-- check the borders last in case they're 0
elsif x_count = h_left_border_start then
hblank_s <= '0';
elsif x_count = h_right_border_start then
hactive_s <= '0';
end if;
x_count <= x_count + 1;
end if;
end if; -- rising_edge(clk) and clk_ena = '1'
end process timer_proc;
-- pass-through for tile/bitmap & sprite controllers
video_ctl_o.clk <= clk;
video_ctl_o.clk_ena <= clk_ena;
-- for video DACs and TFT output
video_o.clk <= clk;
BLK_VIDEO_O : block
constant PIPELINE_DELAY : natural := DELAY+1;
-- won't synthesize correctly under ISE if these are variables
signal hactive_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
signal vactive_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
begin
video_o_proc: process (extended_reset, clk, clk_ena)
variable hsync_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
variable vsync_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
--variable hactive_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
--variable vactive_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
variable hblank_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
variable vblank_v_r : std_logic_vector(PIPELINE_DELAY-1 downto 0) := (others => '0');
alias hsync_v : std_logic is hsync_v_r(hsync_v_r'left);
alias vsync_v : std_logic is vsync_v_r(vsync_v_r'left);
alias hactive_v : std_logic is hactive_v_r(hactive_v_r'left);
alias vactive_v : std_logic is vactive_v_r(vactive_v_r'left);
alias hblank_v : std_logic is hblank_v_r(hblank_v_r'left);
alias vblank_v : std_logic is vblank_v_r(vblank_v_r'left);
variable stb_cnt_v : unsigned(3 downto 0); -- up to 16x scaling
begin
if extended_reset = '1' then
hsync_v_r := (others => not H_SYNC_POL);
vsync_v_r := (others => not V_SYNC_POL);
hactive_v_r <= (others => '0');
vactive_v_r <= (others => '0');
hblank_v_r := (others => '0');
vblank_v_r := (others => '0');
stb_cnt_v := (others => '1');
elsif rising_edge(clk) and clk_ena = '1' then
-- hblank
-- register control signals and handle scaling
-- video_ctl_o.hblank <= not hactive_s after SIM_DELAY; -- used only by the bitmap/tilemap/sprite controllers
video_ctl_o.vblank <= not vactive_s after SIM_DELAY; -- used only by the bitmap/tilemap/sprite controllers
-- handle scaling
video_ctl_o.stb <= stb_cnt_v(H_SCALE-1) after SIM_DELAY;
if hactive_s = '1' and vactive_s = '1' then
stb_cnt_v := stb_cnt_v + 2;
elsif hblank_s = '0' and vblank_s = '0' then
stb_cnt_v := (others => '1');
end if;
video_ctl_o.x <= std_logic_vector(resize(x_s(x_s'left downto H_SCALE-1), video_ctl_o.x'length)) after SIM_DELAY;
video_ctl_o.y <= std_logic_vector(resize(y_s(y_s'left downto V_SCALE-1), video_ctl_o.y'length)) after SIM_DELAY;
-- register video outputs
if hactive_v = '1' and vactive_v = '1' then
-- set hblank used only by the bitmap/tilemap/sprite controllers early
if x_s(x_s'left downto H_SCALE-1) < (L_CROP + PIPELINE_DELAY-7) or
x_s(x_s'left downto H_SCALE-1) >= (H_SIZE - R_CROP + PIPELINE_DELAY-7) then
video_ctl_o.hblank <= '1';
else
video_o.rgb <= rgb_i after SIM_DELAY;
video_ctl_o.hblank <= '0'; -- used only by the bitmap/tilemap/sprite controllers
end if;
-- active video
if x_s(x_s'left downto H_SCALE-1) < (L_CROP + PIPELINE_DELAY) or
x_s(x_s'left downto H_SCALE-1) >= (H_SIZE - R_CROP + PIPELINE_DELAY) then
video_o.rgb <= RGB_BLACK after SIM_DELAY;
else
video_o.rgb <= rgb_i after SIM_DELAY;
end if;
elsif hblank_v = '0' and vblank_v = '0' then
-- border
video_o.rgb <= border_rgb_r after SIM_DELAY;
else
video_o.rgb.r <= (others => '0') after SIM_DELAY;
video_o.rgb.g <= (others => '0') after SIM_DELAY;
video_o.rgb.b <= (others => '0') after SIM_DELAY;
end if;
video_o.hsync <= hsync_v after SIM_DELAY;
video_o.vsync <= vsync_v after SIM_DELAY;
video_o.hblank <= hblank_v after SIM_DELAY;
video_o.vblank <= vblank_v after SIM_DELAY;
-- pipelined signals
hsync_v_r := hsync_v_r(hsync_v_r'left-1 downto 0) & hsync_s;
vsync_v_r := vsync_v_r(vsync_v_r'left-1 downto 0) & vsync_s;
hactive_v_r <= hactive_v_r(hactive_v_r'left-1 downto 0) & hactive_s;
vactive_v_r <= vactive_v_r(vactive_v_r'left-1 downto 0) & vactive_s;
hblank_v_r := hblank_v_r(hblank_v_r'left-1 downto 0) & hblank_s;
vblank_v_r := vblank_v_r(vblank_v_r'left-1 downto 0) & vblank_s;
end if;
end process video_o_proc;
end block BLK_VIDEO_O;
end SYN;

4
Arcade_MiST/IremM62 Hardware/rtl/video_mixer.vhd
View File

@ -52,8 +52,8 @@ begin
sprite_rgb when sprite_set = '1' else
bg_rgb;
elsif PACE_VIDEO_NUM_TILEMAPS = 2 generate
rgb_o <= sprite_rgb when sprite_set = '1' and sprite_pri = '1' else
tilemap_ctl_o(2).rgb when tilemap_ctl_o(2).set = '1' else
rgb_o <= tilemap_ctl_o(2).rgb when tilemap_ctl_o(2).set = '1' else
sprite_rgb when sprite_set = '1' and sprite_pri = '1' else
tilemap_ctl_o(1).rgb when tilemap_ctl_o(1).set = '1' else
sprite_rgb when sprite_set = '1' else
bg_rgb;

25
Arcade_MiST/Williams 6809 rev.1 Hardware/Robotron Hardware/rtl/robotron_cpu/robotron_cpu.vhd
View File

@ -124,8 +124,8 @@ entity robotron_cpu is
SIN_FIRE : in std_logic;
SIN_BOMB : in std_logic;
-- To sound board
HAND : in std_logic := '1';
-- To sound board
HAND : in std_logic := '1';
PB : out std_logic_vector(5 downto 0)
);
end robotron_cpu;
@ -159,7 +159,8 @@ architecture Behavioral of robotron_cpu is
signal horizontal_sync : std_logic;
signal vertical_sync : std_logic;
signal video_blank : boolean := true;
signal video_hblank : boolean := true;
signal video_vblank : boolean := true;
-------------------------------------------------------------------
@ -519,10 +520,16 @@ begin
if clock_12_phase(5) = '1' then
if std_match(video_address(5 downto 0), "11-1--") then
video_blank <= true;
video_hblank <= true;
elsif std_match(video_address(5 downto 0), "0---1-") then
video_blank <= false;
video_hblank <= false;
end if;
if std_match(video_address(13 downto 6), "11111---") then
video_vblank <= true;
elsif std_match(video_address(13 downto 6), "00000000") then
video_vblank <= false;
end if;
end if;
if clock_12_phase( 0) = '1' or
@ -533,7 +540,7 @@ begin
ram_lower_enable <= true;
ram_upper_enable <= true;
if video_blank then
if video_hblank or video_vblank then
vgaRed <= (others => '0');
vgaGreen <= (others => '0');
vgaBlue <= (others => '0');
@ -548,7 +555,7 @@ begin
clock_12_phase( 5) = '1' or
clock_12_phase( 9) = '1' then
pixel_nibbles <= memory_data_in;
end if;
end if;
if clock_12_phase( 2) = '1' or
clock_12_phase( 6) = '1' or
clock_12_phase(10) = '1' then
@ -556,7 +563,7 @@ begin
pixel_byte_l <= color_table(to_integer(unsigned(pixel_nibbles(3 downto 0))));
pixel_byte_h <= color_table(to_integer(unsigned(pixel_nibbles(7 downto 4))));
if video_blank then
if video_hblank or video_vblank then
vgaRed <= (others => '0');
vgaGreen <= (others => '0');
vgaBlue <= (others => '0');
@ -743,7 +750,7 @@ begin
blt: entity work.sc1
port map(
clk => clock,
sc2 => blitter_sc2,
sc2 => blitter_sc2,
reg_cs => blt_reg_cs,
reg_data_in => blt_reg_data_in,

3
Arcade_MiST/Williams 6809 rev.1 Hardware/Robotron Hardware/rtl/robotron_cpu/sc1.vhd
View File

@ -177,9 +177,6 @@ begin
blt_shift <= (others => '0');
state <= state_src;
if reg_width = 0 or reg_height = 0 then
state <= state_idle;
end if;
end if;
when state_src =>

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/LICENSE → common/Sound/jt5205/LICENSE
View File

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/README.md → common/Sound/jt5205/README.md
View File

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/jt5205.qip → common/Sound/jt5205/jt5205.qip
View File

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/jt5205.v → common/Sound/jt5205/jt5205.v
View File

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/jt5205_adpcm.v → common/Sound/jt5205/jt5205_adpcm.v
View File

0
Arcade_MiST/IremM62 Hardware/rtl/jt5205/jt5205_interpol2x.v → common/Sound/jt5205/jt5205_interpol2x.v
View File

6
Arcade_MiST/IremM62 Hardware/rtl/jt5205/jt5205_timing.v → common/Sound/jt5205/jt5205_timing.v
View File

@ -41,12 +41,12 @@ end
always @(posedge clk) begin
if (lim == 1) begin
cnt <= 1'b0;
if (sel == 2'd3) begin
cnt <= 7'd0;
vclk_o <= 1'b0;
end
if(cen) begin
if (lim != 1) cnt <= cnt + 7'd1;
if (sel != 2'd3) cnt <= cnt + 7'd1;
pre <= 1'b0;
preb <= 1'b0;

46
common/mist/data_io.v
View File

@ -34,10 +34,12 @@ module data_io
// ARM -> FPGA download
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output reg [7:0] ioctl_index, // menu index used to upload the file ([7:6] - extension index, [5:0] - menu index)
output reg ioctl_wr, // strobe indicating ioctl_dout valid
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
output reg [7:0] ioctl_dout,
output reg [23:0] ioctl_fileext, // file extension
output reg [31:0] ioctl_filesize // file size
);
parameter START_ADDR = 25'd0;
@ -50,23 +52,26 @@ reg [7:0] data_w2 = 0;
reg rclk = 0;
reg rclk2 = 0;
reg addr_reset = 0;
reg downloading_reg = 0;
reg [7:0] index_reg = 0;
localparam DIO_FILE_TX = 8'h53;
localparam DIO_FILE_TX_DAT = 8'h54;
localparam DIO_FILE_INDEX = 8'h55;
localparam DIO_FILE_INFO = 8'h56;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
always@(posedge SPI_SCK, posedge SPI_SS2) begin : SPI_RECEIVER
reg [6:0] sbuf;
reg [7:0] cmd;
reg [3:0] cnt;
reg [5:0] bytecnt;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
if(SPI_SS2) begin
bytecnt <= 0;
cnt <= 0;
end else begin
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
@ -97,14 +102,27 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
// expose file (menu) index
if((cmd == DIO_FILE_INDEX) && (cnt == 15)) index_reg <= {sbuf, SPI_DI};
// receiving FAT directory entry (mist-firmware/fat.h - DIRENTRY)
if((cmd == DIO_FILE_INFO) && (cnt == 15)) begin
bytecnt <= bytecnt + 1'd1;
case (bytecnt)
8'h08: ioctl_fileext[23:16] <= {sbuf, SPI_DI};
8'h09: ioctl_fileext[15: 8] <= {sbuf, SPI_DI};
8'h0A: ioctl_fileext[ 7: 0] <= {sbuf, SPI_DI};
8'h1C: ioctl_filesize[ 7: 0] <= {sbuf, SPI_DI};
8'h1D: ioctl_filesize[15: 8] <= {sbuf, SPI_DI};
8'h1E: ioctl_filesize[23:16] <= {sbuf, SPI_DI};
8'h1F: ioctl_filesize[31:24] <= {sbuf, SPI_DI};
endcase
end
end
end
// direct SD Card->FPGA transfer
generate if (ROM_DIRECT_UPLOAD == 1) begin
always@(posedge SPI_SCK, posedge SPI_SS4) begin
always@(posedge SPI_SCK, posedge SPI_SS4) begin : SPI_DIRECT_RECEIVER
reg [6:0] sbuf2;
reg [2:0] cnt2;
reg [9:0] bytecnt;
@ -137,13 +155,14 @@ end
end
endgenerate
always@(posedge clk_sys) begin
always@(posedge clk_sys) begin : DATA_OUT
// bring flags from spi clock domain into core clock domain
reg rclkD, rclkD2;
reg rclk2D, rclk2D2;
reg addr_resetD, addr_resetD2;
reg wr_int, wr_int_direct;
reg [24:0] addr;
reg [31:0] filepos;
{ rclkD, rclkD2 } <= { rclk, rclkD };
{ rclk2D ,rclk2D2 } <= { rclk2, rclk2D };
@ -151,7 +170,7 @@ always@(posedge clk_sys) begin
ioctl_wr <= 0;
ioctl_download <= downloading_reg;
if (!downloading_reg) ioctl_download <= 0;
if (~clkref_n) begin
wr_int <= 0;
@ -167,12 +186,17 @@ always@(posedge clk_sys) begin
// detect transfer start from the SPI receiver
if(addr_resetD ^ addr_resetD2) begin
addr <= START_ADDR;
filepos <= 0;
ioctl_index <= index_reg;
ioctl_download <= 1;
end
// detect new byte from the SPI receiver
if (rclkD ^ rclkD2) wr_int <= 1;
if (rclk2D ^ rclk2D2) wr_int_direct <= 1;
if (rclk2D ^ rclk2D2 && filepos != ioctl_filesize) begin
filepos <= filepos + 1'd1;
wr_int_direct <= 1;
end
end
endmodule