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Playing with SDRAM
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BIN
GCE - Vectrex_MiST/Snapshot/vectrex_MiST.rbf
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BIN
GCE - Vectrex_MiST/Snapshot/vectrex_MiST.rbf
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Jupiter Cantab - JupiterACE_MiST/Readme.md
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Jupiter Cantab - JupiterACE_MiST/Readme.md
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@ -0,0 +1 @@
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use sdram für 32k ERAM need Test
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@ -41,7 +41,7 @@
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# ========================
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:59:05 MARCH 16, 2017"
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY Output
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set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
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set_global_assignment -name VERILOG_FILE rtl/mist_io.v
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@ -154,9 +154,6 @@ set_global_assignment -name TOP_LEVEL_ENTITY ace_mist
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set_global_assignment -name DEVICE EP3C25E144C8
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_NCE_PIN OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
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@ -3,6 +3,7 @@ del /s *.bak
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del /s *.orig
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del /s *.rej
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del /s *~
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rmdir /s /q output
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rmdir /s /q db
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rmdir /s /q incremental_db
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rmdir /s /q output_files
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@ -68,7 +68,7 @@ pll pll(
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.c0(clk_sys),//26.0Mhz
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.c1(clk_65),//6.5Mhz
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.c2(clk_cpu),//3.25Mhz
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.c3(clk_sdram),//100Mhz
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.c3(SDRAM_CLK),//100Mhz
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.locked(locked)
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);
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@ -127,7 +127,7 @@ video_mixer #(.LINE_LENGTH(800), .HALF_DEPTH(1)) video_mixer
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.VGA_HS(VGA_HS)
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);
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wire [24:0]sd_addr;
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wire [14:0]sd_addr;
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wire [7:0]sd_dout;
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wire [7:0]sd_din;
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wire sd_we;
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@ -145,9 +145,9 @@ sram sram(
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.SDRAM_nRAS(SDRAM_nRAS),
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.SDRAM_nCAS(SDRAM_nCAS),
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.SDRAM_CKE(SDRAM_CKE),
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.init(~reset),
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.clk_sdram(clk_sdram),
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.addr(sd_addr), // 25 bit address
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.init(~locked),
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.clk_sdram(SDRAM_CLK),
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.addr({10'b0000000000,sd_addr}), // 25 bit address
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.dout(sd_dout), // data output to cpu
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.din(sd_din), // data input from cpu
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.we(sd_we), // cpu requests write
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@ -1,2 +1,2 @@
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`define BUILD_DATE "171124"
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`define BUILD_TIME "193745"
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`define BUILD_DATE "180723"
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`define BUILD_TIME "190837"
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@ -33,9 +33,9 @@ module jupiter_ace (
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output wire vsync,
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output wire mic,
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output wire spk,
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output wire sd_addr,
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input wire sd_dout,
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output wire sd_din,
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output wire [14:0] sd_addr,
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input wire [7:0] sd_dout,
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output wire [7:0] sd_din,
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output wire sd_we,
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output wire sd_rd,
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input wire sd_ready
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@ -111,8 +111,8 @@ module jupiter_ace (
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.we(~wr_n)
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);
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assign sd_addr = AZ80[13:0];
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//assign sd_dout = dout_eram;
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assign sd_addr = AZ80[14:0];
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assign dout_eram = sd_dout;
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assign sd_din = DoutZ80;
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assign sd_we = ~wr_n;
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assign sd_rd = eram_enable;
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