github.com/Gehstock.Mist_FPGA
1
0
Fork 0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-05-26 15:04:38 +00:00
Code Issues Releases Wiki Activity

Move Rom to SDRAM for Pooyan

Browse Source
This commit is contained in:
Marcel
2019-09-09 17:07:32 +02:00
parent 188b871ed3
commit c89ca69a0e
137 changed files with 11844 additions and 1490 deletions
Download Patch File Download Diff File Expand all files Collapse all files

197
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/DebugSystem.vhd
View File

@@ -1,197 +0,0 @@
-- Z80, Monitor ROM, 4k RAM and two 16450 UARTs
-- that can be synthesized and used with
-- the NoICE debugger that can be found at
-- http://www.noicedebugger.com/
library IEEE;
use IEEE.std_logic_1164.all;
entity DebugSystem is
port(
Reset_n : in std_logic;
Clk : in std_logic;
NMI_n : in std_logic;
RXD0 : in std_logic;
CTS0 : in std_logic;
DSR0 : in std_logic;
RI0 : in std_logic;
DCD0 : in std_logic;
RXD1 : in std_logic;
CTS1 : in std_logic;
DSR1 : in std_logic;
RI1 : in std_logic;
DCD1 : in std_logic;
TXD0 : out std_logic;
RTS0 : out std_logic;
DTR0 : out std_logic;
TXD1 : out std_logic;
RTS1 : out std_logic;
DTR1 : out std_logic;
As : out std_logic_vector(15 downto 0);
Ds : out std_logic_vector(7 downto 0);
ROM_Ds : out std_logic_vector(7 downto 0)
);
end DebugSystem;
architecture struct of DebugSystem is
signal M1_n : std_logic;
signal MREQ_n : std_logic;
signal IORQ_n : std_logic;
signal RD_n : std_logic;
signal WR_n : std_logic;
signal RFSH_n : std_logic;
signal HALT_n : std_logic;
signal WAIT_n : std_logic;
signal INT_n : std_logic;
signal RESET_s : std_logic;
signal BUSRQ_n : std_logic;
signal BUSAK_n : std_logic;
signal A : std_logic_vector(15 downto 0);
signal D : std_logic_vector(7 downto 0);
signal ROM_D : std_logic_vector(7 downto 0);
signal SRAM_D : std_logic_vector(7 downto 0);
signal UART0_D : std_logic_vector(7 downto 0);
signal UART1_D : std_logic_vector(7 downto 0);
signal CPU_D : std_logic_vector(7 downto 0);
signal Mirror : std_logic;
signal IOWR_n : std_logic;
signal RAMCS_n : std_logic;
signal UART0CS_n : std_logic;
signal UART1CS_n : std_logic;
signal BaudOut0 : std_logic;
signal BaudOut1 : std_logic;
begin
As <= A;
Ds <= D;
ROM_Ds <= ROM_D;
Wait_n <= '1';
BusRq_n <= '1';
INT_n <= '1';
process (Reset_n, Clk)
begin
if Reset_n = '0' then
Reset_s <= '0';
Mirror <= '0';
elsif Clk'event and Clk = '1' then
Reset_s <= '1';
if IORQ_n = '0' and A(7 downto 4) = "1111" then
Mirror <= D(0);
end if;
end if;
end process;
IOWR_n <= WR_n or IORQ_n;
RAMCS_n <= (not Mirror and not A(15)) or MREQ_n;
UART0CS_n <= '0' when IORQ_n = '0' and A(7 downto 3) = "00000" else '1';
UART1CS_n <= '0' when IORQ_n = '0' and A(7 downto 3) = "10000" else '1';
-- CPU_D <=
-- SRAM_D when RAMCS_n = '0' else
-- UART0_D when UART0CS_n = '0' else
-- UART1_D when UART1CS_n = '0' else
-- ROM_D;
CPU_D <=
ROM_D;
u0 : entity work.T80s
generic map(Mode => 0, T2Write => 1, IOWait => 0)
-- generic map(Mode => 1, T2Write => 1, IOWait => 0)
port map(
RESET_n => RESET_s,
CLK_n => Clk,
WAIT_n => WAIT_n,
INT_n => INT_n,
NMI_n => NMI_n,
BUSRQ_n => BUSRQ_n,
M1_n => M1_n,
MREQ_n => MREQ_n,
IORQ_n => IORQ_n,
RD_n => RD_n,
WR_n => WR_n,
RFSH_n => RFSH_n,
HALT_n => HALT_n,
BUSAK_n => BUSAK_n,
A => A,
DI => CPU_D,
DO => D);
-- u1 : entity work.MonZ80
-- port map(
-- Clk => Clk,
-- A => A(10 downto 0),
-- D => ROM_D);
u1 : entity work.bagmanrom
port map(
clock => not Clk,
address => A(14 downto 0),
q => ROM_D);
u2 : entity work.SSRAM
generic map(
AddrWidth => 12)
port map(
Clk => Clk,
CE_n => RAMCS_n,
WE_n => WR_n,
A => A(11 downto 0),
DIn => D,
DOut => SRAM_D);
u3 : entity work.T16450
port map(
MR_n => Reset_s,
XIn => Clk,
RClk => BaudOut0,
CS_n => UART0CS_n,
Rd_n => RD_n,
Wr_n => IOWR_n,
A => A(2 downto 0),
D_In => D,
D_Out => UART0_D,
SIn => RXD0,
CTS_n => CTS0,
DSR_n => DSR0,
RI_n => RI0,
DCD_n => DCD0,
SOut => TXD0,
RTS_n => RTS0,
DTR_n => DTR0,
OUT1_n => open,
OUT2_n => open,
BaudOut => BaudOut0,
Intr => open);
u4 : entity work.T16450
port map(
MR_n => Reset_s,
XIn => Clk,
RClk => BaudOut1,
CS_n => UART1CS_n,
Rd_n => RD_n,
Wr_n => IOWR_n,
A => A(2 downto 0),
D_In => D,
D_Out => UART1_D,
SIn => RXD1,
CTS_n => CTS1,
DSR_n => DSR1,
RI_n => RI1,
DCD_n => DCD1,
SOut => TXD1,
RTS_n => RTS1,
DTR_n => DTR1,
OUT1_n => open,
OUT2_n => open,
BaudOut => BaudOut1,
Intr => open);
end;

185
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/DebugSystemXR.vhd
View File

@@ -1,185 +0,0 @@
-- Z80, Monitor ROM, external SRAM interface and two 16450 UARTs
-- that can be synthesized and used with
-- the NoICE debugger that can be found at
-- http://www.noicedebugger.com/
library IEEE;
use IEEE.std_logic_1164.all;
entity DebugSystemXR is
port(
Reset_n : in std_logic;
Clk : in std_logic;
NMI_n : in std_logic;
OE_n : out std_logic;
WE_n : out std_logic;
RAMCS_n : out std_logic;
ROMCS_n : out std_logic;
PGM_n : out std_logic;
A : out std_logic_vector(16 downto 0);
D : inout std_logic_vector(7 downto 0);
RXD0 : in std_logic;
CTS0 : in std_logic;
DSR0 : in std_logic;
RI0 : in std_logic;
DCD0 : in std_logic;
RXD1 : in std_logic;
CTS1 : in std_logic;
DSR1 : in std_logic;
RI1 : in std_logic;
DCD1 : in std_logic;
TXD0 : out std_logic;
RTS0 : out std_logic;
DTR0 : out std_logic;
TXD1 : out std_logic;
RTS1 : out std_logic;
DTR1 : out std_logic
);
end entity DebugSystemXR;
architecture struct of DebugSystemXR is
signal M1_n : std_logic;
signal MREQ_n : std_logic;
signal IORQ_n : std_logic;
signal RD_n : std_logic;
signal WR_n : std_logic;
signal RFSH_n : std_logic;
signal HALT_n : std_logic;
signal WAIT_n : std_logic;
signal INT_n : std_logic;
signal RESET_s : std_logic;
signal BUSRQ_n : std_logic;
signal BUSAK_n : std_logic;
signal A_i : std_logic_vector(15 downto 0);
signal D_i : std_logic_vector(7 downto 0);
signal ROM_D : std_logic_vector(7 downto 0);
signal UART0_D : std_logic_vector(7 downto 0);
signal UART1_D : std_logic_vector(7 downto 0);
signal CPU_D : std_logic_vector(7 downto 0);
signal Mirror : std_logic;
signal IOWR_n : std_logic;
signal RAMCS_n_i : std_logic;
signal UART0CS_n : std_logic;
signal UART1CS_n : std_logic;
signal BaudOut0 : std_logic;
signal BaudOut1 : std_logic;
begin
Wait_n <= '1';
BusRq_n <= '1';
INT_n <= '1';
OE_n <= RD_n;
WE_n <= WR_n;
RAMCS_n <= RAMCS_n_i;
ROMCS_n <= '1';
PGM_n <= '1';
A(14 downto 0) <= A_i(14 downto 0);
A(16 downto 15) <= "00";
D <= D_i when WR_n = '0' else "ZZZZZZZZ";
process (Reset_n, Clk)
begin
if Reset_n = '0' then
Reset_s <= '0';
Mirror <= '0';
elsif Clk'event and Clk = '1' then
Reset_s <= '1';
if IORQ_n = '0' and A_i(7 downto 4) = "1111" then
Mirror <= D_i(0);
end if;
end if;
end process;
IOWR_n <= WR_n or IORQ_n;
RAMCS_n_i <= (not Mirror and not A_i(15)) or MREQ_n;
UART0CS_n <= '0' when IORQ_n = '0' and A_i(7 downto 3) = "00000" else '1';
UART1CS_n <= '0' when IORQ_n = '0' and A_i(7 downto 3) = "10000" else '1';
CPU_D <=
D when RAMCS_n_i = '0' else
UART0_D when UART0CS_n = '0' else
UART1_D when UART1CS_n = '0' else
ROM_D;
u0 : entity work.T80s
generic map(Mode => 1, T2Write => 1, IOWait => 0)
port map(
RESET_n => RESET_s,
CLK_n => Clk,
WAIT_n => WAIT_n,
INT_n => INT_n,
NMI_n => NMI_n,
BUSRQ_n => BUSRQ_n,
M1_n => M1_n,
MREQ_n => MREQ_n,
IORQ_n => IORQ_n,
RD_n => RD_n,
WR_n => WR_n,
RFSH_n => RFSH_n,
HALT_n => HALT_n,
BUSAK_n => BUSAK_n,
A => A_i,
DI => CPU_D,
DO => D_i);
u1 : entity work.MonZ80
port map(
Clk => Clk,
A => A_i(10 downto 0),
D => ROM_D);
u3 : entity work.T16450
port map(
MR_n => Reset_s,
XIn => Clk,
RClk => BaudOut0,
CS_n => UART0CS_n,
Rd_n => RD_n,
Wr_n => IOWR_n,
A => A_i(2 downto 0),
D_In => D_i,
D_Out => UART0_D,
SIn => RXD0,
CTS_n => CTS0,
DSR_n => DSR0,
RI_n => RI0,
DCD_n => DCD0,
SOut => TXD0,
RTS_n => RTS0,
DTR_n => DTR0,
OUT1_n => open,
OUT2_n => open,
BaudOut => BaudOut0,
Intr => open);
u4 : entity work.T16450
port map(
MR_n => Reset_s,
XIn => Clk,
RClk => BaudOut1,
CS_n => UART1CS_n,
Rd_n => RD_n,
Wr_n => IOWR_n,
A => A_i(2 downto 0),
D_In => D_i,
D_Out => UART1_D,
SIn => RXD1,
CTS_n => CTS1,
DSR_n => DSR1,
RI_n => RI1,
DCD_n => DCD1,
SOut => TXD1,
RTS_n => RTS1,
DTR_n => DTR1,
OUT1_n => open,
OUT2_n => open,
BaudOut => BaudOut1,
Intr => open);
end;

83
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/keyboard.v
View File

@@ -1,83 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[9:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h16: joystick[1] <= ~release_btn; // 1
'h1E: joystick[2] <= ~release_btn; // 2
// 'h26: joystick[2] <= ~release_btn;
// 'h25: joystick[2] <= ~release_btn;
'h75: joystick[4] <= ~release_btn; // arrow up
'h72: joystick[5] <= ~release_btn; // arrow down
'h6B: joystick[6] <= ~release_btn; // arrow left
'h74: joystick[7] <= ~release_btn; // arrow right
'h29: joystick[0] <= ~release_btn; // Space
'h11: joystick[8] <= ~release_btn; // Left Alt
'h0d: joystick[9] <= ~release_btn; // Tab
'h76: joystick[3] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

424
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/mist_pll_12M_14M.vhd
View File

@@ -1,424 +0,0 @@
-- megafunction wizard: %ALTPLL%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altpll
-- ============================================================
-- File Name: mist_pll_12M_14M.vhd
-- Megafunction Name(s):
-- altpll
--
-- Simulation Library Files(s):
-- altera_mf
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 13.1.0 Build 162 10/23/2013 SJ Web Edition
-- ************************************************************
--Copyright (C) 1991-2013 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY mist_pll_12M_14M IS
PORT
(
inclk0 : IN STD_LOGIC := '0';
c0 : OUT STD_LOGIC ;
c1 : OUT STD_LOGIC ;
c2 : OUT STD_LOGIC ;
locked : OUT STD_LOGIC
);
END mist_pll_12M_14M;
ARCHITECTURE SYN OF mist_pll_12m_14m IS
SIGNAL sub_wire0 : STD_LOGIC_VECTOR (4 DOWNTO 0);
SIGNAL sub_wire1 : STD_LOGIC ;
SIGNAL sub_wire2 : STD_LOGIC ;
SIGNAL sub_wire3 : STD_LOGIC ;
SIGNAL sub_wire4 : STD_LOGIC ;
SIGNAL sub_wire5 : STD_LOGIC ;
SIGNAL sub_wire6 : STD_LOGIC_VECTOR (1 DOWNTO 0);
SIGNAL sub_wire7_bv : BIT_VECTOR (0 DOWNTO 0);
SIGNAL sub_wire7 : STD_LOGIC_VECTOR (0 DOWNTO 0);
COMPONENT altpll
GENERIC (
bandwidth_type : STRING;
clk0_divide_by : NATURAL;
clk0_duty_cycle : NATURAL;
clk0_multiply_by : NATURAL;
clk0_phase_shift : STRING;
clk1_divide_by : NATURAL;
clk1_duty_cycle : NATURAL;
clk1_multiply_by : NATURAL;
clk1_phase_shift : STRING;
clk2_divide_by : NATURAL;
clk2_duty_cycle : NATURAL;
clk2_multiply_by : NATURAL;
clk2_phase_shift : STRING;
compensate_clock : STRING;
inclk0_input_frequency : NATURAL;
intended_device_family : STRING;
lpm_hint : STRING;
lpm_type : STRING;
operation_mode : STRING;
pll_type : STRING;
port_activeclock : STRING;
port_areset : STRING;
port_clkbad0 : STRING;
port_clkbad1 : STRING;
port_clkloss : STRING;
port_clkswitch : STRING;
port_configupdate : STRING;
port_fbin : STRING;
port_inclk0 : STRING;
port_inclk1 : STRING;
port_locked : STRING;
port_pfdena : STRING;
port_phasecounterselect : STRING;
port_phasedone : STRING;
port_phasestep : STRING;
port_phaseupdown : STRING;
port_pllena : STRING;
port_scanaclr : STRING;
port_scanclk : STRING;
port_scanclkena : STRING;
port_scandata : STRING;
port_scandataout : STRING;
port_scandone : STRING;
port_scanread : STRING;
port_scanwrite : STRING;
port_clk0 : STRING;
port_clk1 : STRING;
port_clk2 : STRING;
port_clk3 : STRING;
port_clk4 : STRING;
port_clk5 : STRING;
port_clkena0 : STRING;
port_clkena1 : STRING;
port_clkena2 : STRING;
port_clkena3 : STRING;
port_clkena4 : STRING;
port_clkena5 : STRING;
port_extclk0 : STRING;
port_extclk1 : STRING;
port_extclk2 : STRING;
port_extclk3 : STRING;
self_reset_on_loss_lock : STRING;
width_clock : NATURAL
);
PORT (
clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0);
inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
locked : OUT STD_LOGIC
);
END COMPONENT;
BEGIN
sub_wire7_bv(0 DOWNTO 0) <= "0";
sub_wire7 <= To_stdlogicvector(sub_wire7_bv);
sub_wire4 <= sub_wire0(2);
sub_wire3 <= sub_wire0(0);
sub_wire1 <= sub_wire0(1);
c1 <= sub_wire1;
locked <= sub_wire2;
c0 <= sub_wire3;
c2 <= sub_wire4;
sub_wire5 <= inclk0;
sub_wire6 <= sub_wire7(0 DOWNTO 0) & sub_wire5;
altpll_component : altpll
GENERIC MAP (
bandwidth_type => "AUTO",
clk0_divide_by => 420,
clk0_duty_cycle => 50,
clk0_multiply_by => 191,
clk0_phase_shift => "0",
clk1_divide_by => 360,
clk1_duty_cycle => 50,
clk1_multiply_by => 191,
clk1_phase_shift => "0",
clk2_divide_by => 105,
clk2_duty_cycle => 50,
clk2_multiply_by => 191,
clk2_phase_shift => "0",
compensate_clock => "CLK0",
inclk0_input_frequency => 37037,
intended_device_family => "Cyclone III",
lpm_hint => "CBX_MODULE_PREFIX=mist_pll_12M_14M",
lpm_type => "altpll",
operation_mode => "NORMAL",
pll_type => "AUTO",
port_activeclock => "PORT_UNUSED",
port_areset => "PORT_UNUSED",
port_clkbad0 => "PORT_UNUSED",
port_clkbad1 => "PORT_UNUSED",
port_clkloss => "PORT_UNUSED",
port_clkswitch => "PORT_UNUSED",
port_configupdate => "PORT_UNUSED",
port_fbin => "PORT_UNUSED",
port_inclk0 => "PORT_USED",
port_inclk1 => "PORT_UNUSED",
port_locked => "PORT_USED",
port_pfdena => "PORT_UNUSED",
port_phasecounterselect => "PORT_UNUSED",
port_phasedone => "PORT_UNUSED",
port_phasestep => "PORT_UNUSED",
port_phaseupdown => "PORT_UNUSED",
port_pllena => "PORT_UNUSED",
port_scanaclr => "PORT_UNUSED",
port_scanclk => "PORT_UNUSED",
port_scanclkena => "PORT_UNUSED",
port_scandata => "PORT_UNUSED",
port_scandataout => "PORT_UNUSED",
port_scandone => "PORT_UNUSED",
port_scanread => "PORT_UNUSED",
port_scanwrite => "PORT_UNUSED",
port_clk0 => "PORT_USED",
port_clk1 => "PORT_USED",
port_clk2 => "PORT_USED",
port_clk3 => "PORT_UNUSED",
port_clk4 => "PORT_UNUSED",
port_clk5 => "PORT_UNUSED",
port_clkena0 => "PORT_UNUSED",
port_clkena1 => "PORT_UNUSED",
port_clkena2 => "PORT_UNUSED",
port_clkena3 => "PORT_UNUSED",
port_clkena4 => "PORT_UNUSED",
port_clkena5 => "PORT_UNUSED",
port_extclk0 => "PORT_UNUSED",
port_extclk1 => "PORT_UNUSED",
port_extclk2 => "PORT_UNUSED",
port_extclk3 => "PORT_UNUSED",
self_reset_on_loss_lock => "OFF",
width_clock => 5
)
PORT MAP (
inclk => sub_wire6,
clk => sub_wire0,
locked => sub_wire2
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "420"
-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "360"
-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "105"
-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "12.278571"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "14.325000"
-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "49.114285"
-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "191"
-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "191"
-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "191"
-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "12.28800000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "14.31800000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "49.15200000"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "ps"
-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "mist_pll_12M_14M.mif"
-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
-- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
-- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
-- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "420"
-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "191"
-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "360"
-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "191"
-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "105"
-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "191"
-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
-- Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
-- Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF"
-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
-- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M.ppf TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M.inc FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M.cmp FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL mist_pll_12M_14M_inst.vhd FALSE
-- Retrieval info: LIB_FILE: altera_mf
-- Retrieval info: CBX_MODULE_PREFIX: ON

242
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/video_mixer2.sv
View File

@@ -1,242 +0,0 @@
//
//
// Copyright (c) 2017 Sorgelig
//
// This program is GPL Licensed. See COPYING for the full license.
//
//
////////////////////////////////////////////////////////////////////////////////////////////////////////
`timescale 1ns / 1ps
//
// LINE_LENGTH: Length of display line in pixels
// Usually it's length from HSync to HSync.
// May be less if line_start is used.
//
// HALF_DEPTH: If =1 then color dept is 3 bits per component
// For half depth 6 bits monochrome is available with
// mono signal enabled and color = {G, R}
module video_mixer
#(
parameter LINE_LENGTH = 768,
parameter HALF_DEPTH = 0,
parameter OSD_COLOR = 3'd4,
parameter OSD_X_OFFSET = 10'd0,
parameter OSD_Y_OFFSET = 10'd0
)
(
// master clock
// it should be multiple by (ce_pix*4).
input clk_sys,
// Pixel clock or clock_enable (both are accepted).
input ce_pix,
// Some systems have multiple resolutions.
// ce_pix_actual should match ce_pix where every second or fourth pulse is enabled,
// thus half or qurter resolutions can be used without brake video sync while switching resolutions.
// For fixed single resolution (or when video sync stability isn't required) ce_pix_actual = ce_pix.
input ce_pix_actual,
// OSD SPI interface
input SPI_SCK,
input SPI_SS3,
input SPI_DI,
// scanlines (00-none 01-25% 10-50% 11-75%)
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
// High quality 2x scaling
input hq2x,
// YPbPr always uses composite sync
input ypbpr,
// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
input ypbpr_full,
// color
input [DWIDTH:0] R,
input [DWIDTH:0] G,
input [DWIDTH:0] B,
// Monochrome mode (for HALF_DEPTH only)
input mono,
// interlace sync. Positive pulses.
input HSync,
input VSync,
// Falling of this signal means start of informative part of line.
// It can be horizontal blank signal.
// This signal can be used to reduce amount of required FPGA RAM for HQ2x scan doubler
// If FPGA RAM is not an issue, then simply set it to 0 for whole line processing.
// Keep in mind: due to algo first and last pixels of line should be black to avoid side artefacts.
// Thus, if blank signal is used to reduce the line, make sure to feed at least one black (or paper) pixel
// before first informative pixel.
input line_start,
// MiST video output signals
output [5:0] VGA_R,
output [5:0] VGA_G,
output [5:0] VGA_B,
output VGA_VS,
output VGA_HS
);
localparam DWIDTH = HALF_DEPTH ? 2 : 5;
wire [DWIDTH:0] R_sd;
wire [DWIDTH:0] G_sd;
wire [DWIDTH:0] B_sd;
wire hs_sd, vs_sd;
scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
(
.*,
.hs_in(HSync),
.vs_in(VSync),
.r_in(R),
.g_in(G),
.b_in(B),
.hs_out(hs_sd),
.vs_out(vs_sd),
.r_out(R_sd),
.g_out(G_sd),
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
generate
if(HALF_DEPTH) begin
wire [5:0] r = mono ? {gt,rt} : {rt,rt};
wire [5:0] g = mono ? {gt,rt} : {gt,gt};
wire [5:0] b = mono ? {gt,rt} : {bt,bt};
end else begin
wire [5:0] r = rt;
wire [5:0] g = gt;
wire [5:0] b = bt;
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
reg old_hs, old_vs;
old_hs <= hs;
old_vs <= vs;
if(old_hs && ~hs) scanline <= ~scanline;
if(old_vs && ~vs) scanline <= 0;
end
wire [5:0] r_out, g_out, b_out;
always @(*) begin
case(scanlines & {scanline, scanline})
1: begin // reduce 25% = 1/2 + 1/4
r_out = {1'b0, r[5:1]} + {2'b00, r[5:2]};
g_out = {1'b0, g[5:1]} + {2'b00, g[5:2]};
b_out = {1'b0, b[5:1]} + {2'b00, b[5:2]};
end
2: begin // reduce 50% = 1/2
r_out = {1'b0, r[5:1]};
g_out = {1'b0, g[5:1]};
b_out = {1'b0, b[5:1]};
end
3: begin // reduce 75% = 1/4
r_out = {2'b00, r[5:2]};
g_out = {2'b00, g[5:2]};
b_out = {2'b00, b[5:2]};
end
default: begin
r_out = r;
g_out = g;
b_out = b;
end
endcase
end
wire [5:0] red, green, blue;
osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
(
.*,
.R_in(r_out),
.G_in(g_out),
.B_in(b_out),
.HSync(hs),
.VSync(vs),
.R_out(red),
.G_out(green),
.B_out(blue)
);
wire [5:0] yuv_full[225] = '{
6'd0, 6'd0, 6'd0, 6'd0, 6'd1, 6'd1, 6'd1, 6'd1,
6'd2, 6'd2, 6'd2, 6'd3, 6'd3, 6'd3, 6'd3, 6'd4,
6'd4, 6'd4, 6'd5, 6'd5, 6'd5, 6'd5, 6'd6, 6'd6,
6'd6, 6'd7, 6'd7, 6'd7, 6'd7, 6'd8, 6'd8, 6'd8,
6'd9, 6'd9, 6'd9, 6'd9, 6'd10, 6'd10, 6'd10, 6'd11,
6'd11, 6'd11, 6'd11, 6'd12, 6'd12, 6'd12, 6'd13, 6'd13,
6'd13, 6'd13, 6'd14, 6'd14, 6'd14, 6'd15, 6'd15, 6'd15,
6'd15, 6'd16, 6'd16, 6'd16, 6'd17, 6'd17, 6'd17, 6'd17,
6'd18, 6'd18, 6'd18, 6'd19, 6'd19, 6'd19, 6'd19, 6'd20,
6'd20, 6'd20, 6'd21, 6'd21, 6'd21, 6'd21, 6'd22, 6'd22,
6'd22, 6'd23, 6'd23, 6'd23, 6'd23, 6'd24, 6'd24, 6'd24,
6'd25, 6'd25, 6'd25, 6'd25, 6'd26, 6'd26, 6'd26, 6'd27,
6'd27, 6'd27, 6'd27, 6'd28, 6'd28, 6'd28, 6'd29, 6'd29,
6'd29, 6'd29, 6'd30, 6'd30, 6'd30, 6'd31, 6'd31, 6'd31,
6'd31, 6'd32, 6'd32, 6'd32, 6'd33, 6'd33, 6'd33, 6'd33,
6'd34, 6'd34, 6'd34, 6'd35, 6'd35, 6'd35, 6'd35, 6'd36,
6'd36, 6'd36, 6'd36, 6'd37, 6'd37, 6'd37, 6'd38, 6'd38,
6'd38, 6'd38, 6'd39, 6'd39, 6'd39, 6'd40, 6'd40, 6'd40,
6'd40, 6'd41, 6'd41, 6'd41, 6'd42, 6'd42, 6'd42, 6'd42,
6'd43, 6'd43, 6'd43, 6'd44, 6'd44, 6'd44, 6'd44, 6'd45,
6'd45, 6'd45, 6'd46, 6'd46, 6'd46, 6'd46, 6'd47, 6'd47,
6'd47, 6'd48, 6'd48, 6'd48, 6'd48, 6'd49, 6'd49, 6'd49,
6'd50, 6'd50, 6'd50, 6'd50, 6'd51, 6'd51, 6'd51, 6'd52,
6'd52, 6'd52, 6'd52, 6'd53, 6'd53, 6'd53, 6'd54, 6'd54,
6'd54, 6'd54, 6'd55, 6'd55, 6'd55, 6'd56, 6'd56, 6'd56,
6'd56, 6'd57, 6'd57, 6'd57, 6'd58, 6'd58, 6'd58, 6'd58,
6'd59, 6'd59, 6'd59, 6'd60, 6'd60, 6'd60, 6'd60, 6'd61,
6'd61, 6'd61, 6'd62, 6'd62, 6'd62, 6'd62, 6'd63, 6'd63,
6'd63
};
// http://marsee101.blog19.fc2.com/blog-entry-2311.html
// Y = 16 + 0.257*R + 0.504*G + 0.098*B (Y = 0.299*R + 0.587*G + 0.114*B)
// Pb = 128 - 0.148*R - 0.291*G + 0.439*B (Pb = -0.169*R - 0.331*G + 0.500*B)
// Pr = 128 + 0.439*R - 0.368*G - 0.071*B (Pr = 0.500*R - 0.419*G - 0.081*B)
wire [18:0] y_8 = 19'd04096 + ({red, 8'd0} + {red, 3'd0}) + ({green, 9'd0} + {green, 2'd0}) + ({blue, 6'd0} + {blue, 5'd0} + {blue, 2'd0});
wire [18:0] pb_8 = 19'd32768 - ({red, 7'd0} + {red, 4'd0} + {red, 3'd0}) - ({green, 8'd0} + {green, 5'd0} + {green, 3'd0}) + ({blue, 8'd0} + {blue, 7'd0} + {blue, 6'd0});
wire [18:0] pr_8 = 19'd32768 + ({red, 8'd0} + {red, 7'd0} + {red, 6'd0}) - ({green, 8'd0} + {green, 6'd0} + {green, 5'd0} + {green, 4'd0} + {green, 3'd0}) - ({blue, 6'd0} + {blue , 3'd0});
wire [7:0] y = ( y_8[17:8] < 16) ? 8'd16 : ( y_8[17:8] > 235) ? 8'd235 : y_8[15:8];
wire [7:0] pb = (pb_8[17:8] < 16) ? 8'd16 : (pb_8[17:8] > 240) ? 8'd240 : pb_8[15:8];
wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[15:8];
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

5
Arcade_MiST/Konami Classic/Pooyan_MiST/README.txt
View File

@@ -1,3 +1,8 @@
Arcade: Pooyan port to MiST by Gehstock
POOYAN.ROM is required at the root of the SD-Card.
---------------------------------------------------------------------------------
-- POOYAN by Dar (darfpga@aol.fr) (29/10/2017)
-- http://darfpga.blogspot.fr

BIN
Arcade_MiST/Konami Classic/Pooyan_MiST/Release/POOYAN.ROM Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Pooyan_MiST/Release/pooyan_mist.rbf Normal file
View File

Binary file not shown.

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/clean.bat → Arcade_MiST/Konami Classic/Pooyan_MiST/clean.bat
View File

BIN
Arcade_MiST/Konami Classic/Pooyan_MiST/pooyan_mist(RGB).rbf
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Pooyan_MiST/pooyan_mist(wo OSD).rbf
View File

Binary file not shown.

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/pooyan_mist.qpf → Arcade_MiST/Konami Classic/Pooyan_MiST/pooyan_mist.qpf
View File

213
Arcade_MiST/Konami Classic/Pooyan_MiST/pooyan_mist.qsf Normal file
View File

@@ -0,0 +1,213 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2014 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 16:13:47 September 09, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# pooyan_mist_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:45:13 JUNE 17,2016"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/pooyan_mist.sv
set_global_assignment -name VHDL_FILE rtl/pooyan.vhd
set_global_assignment -name VHDL_FILE rtl/gen_video.vhd
set_global_assignment -name VHDL_FILE rtl/gen_ram.vhd
set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
set_global_assignment -name VHDL_FILE rtl/pooyan_sound_board.vhd
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_sprite_grphx2.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_sprite_grphx1.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_sprite_color_lut.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_sound_prog.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_prog.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_palette.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_char_grphx2.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_char_grphx1.vhd
set_global_assignment -name VHDL_FILE rtl/rom/pooyan_char_color_lut.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80se.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80_Reg.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T80/T80.vhd
set_global_assignment -name QIP_FILE ../../../../common/mist/mist.qip
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
set_location_assignment PIN_143 -to VGA_R[4]
set_location_assignment PIN_142 -to VGA_R[3]
set_location_assignment PIN_141 -to VGA_R[2]
set_location_assignment PIN_137 -to VGA_R[1]
set_location_assignment PIN_135 -to VGA_R[0]
set_location_assignment PIN_133 -to VGA_B[5]
set_location_assignment PIN_132 -to VGA_B[4]
set_location_assignment PIN_125 -to VGA_B[3]
set_location_assignment PIN_121 -to VGA_B[2]
set_location_assignment PIN_120 -to VGA_B[1]
set_location_assignment PIN_115 -to VGA_B[0]
set_location_assignment PIN_114 -to VGA_G[5]
set_location_assignment PIN_113 -to VGA_G[4]
set_location_assignment PIN_112 -to VGA_G[3]
set_location_assignment PIN_111 -to VGA_G[2]
set_location_assignment PIN_110 -to VGA_G[1]
set_location_assignment PIN_106 -to VGA_G[0]
set_location_assignment PIN_136 -to VGA_VS
set_location_assignment PIN_119 -to VGA_HS
set_location_assignment PIN_65 -to AUDIO_L
set_location_assignment PIN_80 -to AUDIO_R
set_location_assignment PIN_105 -to SPI_DO
set_location_assignment PIN_88 -to SPI_DI
set_location_assignment PIN_126 -to SPI_SCK
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_13 -to CONF_DATA0
set_location_assignment PIN_49 -to SDRAM_A[0]
set_location_assignment PIN_44 -to SDRAM_A[1]
set_location_assignment PIN_42 -to SDRAM_A[2]
set_location_assignment PIN_39 -to SDRAM_A[3]
set_location_assignment PIN_4 -to SDRAM_A[4]
set_location_assignment PIN_6 -to SDRAM_A[5]
set_location_assignment PIN_8 -to SDRAM_A[6]
set_location_assignment PIN_10 -to SDRAM_A[7]
set_location_assignment PIN_11 -to SDRAM_A[8]
set_location_assignment PIN_28 -to SDRAM_A[9]
set_location_assignment PIN_50 -to SDRAM_A[10]
set_location_assignment PIN_30 -to SDRAM_A[11]
set_location_assignment PIN_32 -to SDRAM_A[12]
set_location_assignment PIN_83 -to SDRAM_DQ[0]
set_location_assignment PIN_79 -to SDRAM_DQ[1]
set_location_assignment PIN_77 -to SDRAM_DQ[2]
set_location_assignment PIN_76 -to SDRAM_DQ[3]
set_location_assignment PIN_72 -to SDRAM_DQ[4]
set_location_assignment PIN_71 -to SDRAM_DQ[5]
set_location_assignment PIN_69 -to SDRAM_DQ[6]
set_location_assignment PIN_68 -to SDRAM_DQ[7]
set_location_assignment PIN_86 -to SDRAM_DQ[8]
set_location_assignment PIN_87 -to SDRAM_DQ[9]
set_location_assignment PIN_98 -to SDRAM_DQ[10]
set_location_assignment PIN_99 -to SDRAM_DQ[11]
set_location_assignment PIN_100 -to SDRAM_DQ[12]
set_location_assignment PIN_101 -to SDRAM_DQ[13]
set_location_assignment PIN_103 -to SDRAM_DQ[14]
set_location_assignment PIN_104 -to SDRAM_DQ[15]
set_location_assignment PIN_58 -to SDRAM_BA[0]
set_location_assignment PIN_51 -to SDRAM_BA[1]
set_location_assignment PIN_85 -to SDRAM_DQMH
set_location_assignment PIN_67 -to SDRAM_DQML
set_location_assignment PIN_60 -to SDRAM_nRAS
set_location_assignment PIN_64 -to SDRAM_nCAS
set_location_assignment PIN_66 -to SDRAM_nWE
set_location_assignment PIN_59 -to SDRAM_nCS
set_location_assignment PIN_33 -to SDRAM_CKE
set_location_assignment PIN_43 -to SDRAM_CLK
# Classic Timing Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name TOP_LEVEL_ENTITY pooyan_mist
# Fitter Assignments
# ==================
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name ENABLE_NCE_PIN OFF
# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
# -------------------------
# start ENTITY(pooyan_mist)
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(pooyan_mist)
# -----------------------
set_location_assignment PIN_127 -to SPI_SS2
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/time_pilot_mist.srf → Arcade_MiST/Konami Classic/Pooyan_MiST/pooyan_mist.srf
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80_ALU.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80_ALU.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80_MCode.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80_MCode.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80_Pack.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80_Pack.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80_Reg.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80_Reg.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T80se.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/T80/T80se.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/YM2149_linmix_sep.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/YM2149_linmix_sep.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/build_id.tcl → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/build_id.tcl
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/gen_ram.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/gen_ram.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/gen_video.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/gen_video.vhd
View File

12
Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pll.ppf Normal file
View File

@@ -0,0 +1,12 @@
<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE pinplan>
<pinplan intended_family="Cyclone III" variation_name="pll" megafunction_name="ALTPLL" specifies="all_ports">
<global>
<pin name="inclk0" direction="input" scope="external" source="clock" />
<pin name="c0" direction="output" scope="external" source="clock" />
<pin name="c1" direction="output" scope="external" source="clock" />
<pin name="c2" direction="output" scope="external" source="clock" />
<pin name="locked" direction="output" scope="external" />
</global>
</pinplan>

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/pll.qip → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pll.qip
View File

365
Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pll.v Normal file
View File

@@ -0,0 +1,365 @@
// megafunction wizard: %ALTPLL%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altpll
// ============================================================
// File Name: pll.v
// Megafunction Name(s):
// altpll
//
// Simulation Library Files(s):
// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
//
// 13.1.4 Build 182 03/12/2014 SJ Web Edition
// ************************************************************
//Copyright (C) 1991-2014 Altera Corporation
//Your use of Altera Corporation's design tools, logic functions
//and other software and tools, and its AMPP partner logic
//functions, and any output files from any of the foregoing
//(including device programming or simulation files), and any
//associated documentation or information are expressly subject
//to the terms and conditions of the Altera Program License
//Subscription Agreement, Altera MegaCore Function License
//Agreement, or other applicable license agreement, including,
//without limitation, that your use is for the sole purpose of
//programming logic devices manufactured by Altera and sold by
//Altera or its authorized distributors. Please refer to the
//applicable agreement for further details.
// synopsys translate_off
`timescale 1 ps / 1 ps
// synopsys translate_on
module pll (
inclk0,
c0,
c1,
c2,
locked);
input inclk0;
output c0;
output c1;
output c2;
output locked;
wire [4:0] sub_wire0;
wire sub_wire2;
wire [0:0] sub_wire7 = 1'h0;
wire [2:2] sub_wire4 = sub_wire0[2:2];
wire [0:0] sub_wire3 = sub_wire0[0:0];
wire [1:1] sub_wire1 = sub_wire0[1:1];
wire c1 = sub_wire1;
wire locked = sub_wire2;
wire c0 = sub_wire3;
wire c2 = sub_wire4;
wire sub_wire5 = inclk0;
wire [1:0] sub_wire6 = {sub_wire7, sub_wire5};
altpll altpll_component (
.inclk (sub_wire6),
.clk (sub_wire0),
.locked (sub_wire2),
.activeclock (),
.areset (1'b0),
.clkbad (),
.clkena ({6{1'b1}}),
.clkloss (),
.clkswitch (1'b0),
.configupdate (1'b0),
.enable0 (),
.enable1 (),
.extclk (),
.extclkena ({4{1'b1}}),
.fbin (1'b1),
.fbmimicbidir (),
.fbout (),
.fref (),
.icdrclk (),
.pfdena (1'b1),
.phasecounterselect ({4{1'b1}}),
.phasedone (),
.phasestep (1'b1),
.phaseupdown (1'b1),
.pllena (1'b1),
.scanaclr (1'b0),
.scanclk (1'b0),
.scanclkena (1'b1),
.scandata (1'b0),
.scandataout (),
.scandone (),
.scanread (1'b0),
.scanwrite (1'b0),
.sclkout0 (),
.sclkout1 (),
.vcooverrange (),
.vcounderrange ());
defparam
altpll_component.bandwidth_type = "AUTO",
altpll_component.clk0_divide_by = 26,
altpll_component.clk0_duty_cycle = 50,
altpll_component.clk0_multiply_by = 47,
altpll_component.clk0_phase_shift = "0",
altpll_component.clk1_divide_by = 104,
altpll_component.clk1_duty_cycle = 50,
altpll_component.clk1_multiply_by = 47,
altpll_component.clk1_phase_shift = "0",
altpll_component.clk2_divide_by = 395,
altpll_component.clk2_duty_cycle = 50,
altpll_component.clk2_multiply_by = 208,
altpll_component.clk2_phase_shift = "0",
altpll_component.compensate_clock = "CLK0",
altpll_component.inclk0_input_frequency = 37037,
altpll_component.intended_device_family = "Cyclone III",
altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll",
altpll_component.lpm_type = "altpll",
altpll_component.operation_mode = "NORMAL",
altpll_component.pll_type = "AUTO",
altpll_component.port_activeclock = "PORT_UNUSED",
altpll_component.port_areset = "PORT_UNUSED",
altpll_component.port_clkbad0 = "PORT_UNUSED",
altpll_component.port_clkbad1 = "PORT_UNUSED",
altpll_component.port_clkloss = "PORT_UNUSED",
altpll_component.port_clkswitch = "PORT_UNUSED",
altpll_component.port_configupdate = "PORT_UNUSED",
altpll_component.port_fbin = "PORT_UNUSED",
altpll_component.port_inclk0 = "PORT_USED",
altpll_component.port_inclk1 = "PORT_UNUSED",
altpll_component.port_locked = "PORT_USED",
altpll_component.port_pfdena = "PORT_UNUSED",
altpll_component.port_phasecounterselect = "PORT_UNUSED",
altpll_component.port_phasedone = "PORT_UNUSED",
altpll_component.port_phasestep = "PORT_UNUSED",
altpll_component.port_phaseupdown = "PORT_UNUSED",
altpll_component.port_pllena = "PORT_UNUSED",
altpll_component.port_scanaclr = "PORT_UNUSED",
altpll_component.port_scanclk = "PORT_UNUSED",
altpll_component.port_scanclkena = "PORT_UNUSED",
altpll_component.port_scandata = "PORT_UNUSED",
altpll_component.port_scandataout = "PORT_UNUSED",
altpll_component.port_scandone = "PORT_UNUSED",
altpll_component.port_scanread = "PORT_UNUSED",
altpll_component.port_scanwrite = "PORT_UNUSED",
altpll_component.port_clk0 = "PORT_USED",
altpll_component.port_clk1 = "PORT_USED",
altpll_component.port_clk2 = "PORT_USED",
altpll_component.port_clk3 = "PORT_UNUSED",
altpll_component.port_clk4 = "PORT_UNUSED",
altpll_component.port_clk5 = "PORT_UNUSED",
altpll_component.port_clkena0 = "PORT_UNUSED",
altpll_component.port_clkena1 = "PORT_UNUSED",
altpll_component.port_clkena2 = "PORT_UNUSED",
altpll_component.port_clkena3 = "PORT_UNUSED",
altpll_component.port_clkena4 = "PORT_UNUSED",
altpll_component.port_clkena5 = "PORT_UNUSED",
altpll_component.port_extclk0 = "PORT_UNUSED",
altpll_component.port_extclk1 = "PORT_UNUSED",
altpll_component.port_extclk2 = "PORT_UNUSED",
altpll_component.port_extclk3 = "PORT_UNUSED",
altpll_component.self_reset_on_loss_lock = "OFF",
altpll_component.width_clock = 5;
endmodule
// ============================================================
// CNX file retrieval info
// ============================================================
// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "26"
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "104"
// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "395"
// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.807693"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "12.201923"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "14.217722"
// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
// Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "47"
// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "47"
// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "208"
// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.78400000"
// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "12.19600000"
// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "14.22800000"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "ps"
// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif"
// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
// Retrieval info: PRIVATE: USE_CLK2 STRING "1"
// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
// Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "26"
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "47"
// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "104"
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "47"
// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "395"
// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "208"
// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF"
// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.v FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_bb.v FALSE
// Retrieval info: LIB_FILE: altera_mf
// Retrieval info: CBX_MODULE_PREFIX: ON

34
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/pooyan.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pooyan.vhd
View File

@@ -77,14 +77,16 @@ port(
reset : in std_logic;
video_r : out std_logic_vector(2 downto 0);
video_g : out std_logic_vector(2 downto 0);
video_b : out std_logic_vector(2 downto 0);
video_b : out std_logic_vector(1 downto 0);
video_clk : out std_logic;
video_vblank : out std_logic;
video_hblank : out std_logic;
video_hs : out std_logic;
video_vs : out std_logic;
audio_out : out std_logic_vector(10 downto 0);
roms_addr : out std_logic_vector(14 downto 0);
roms_do : in std_logic_vector(7 downto 0);
roms_rd : out std_logic;
dip_switch_1 : in std_logic_vector(7 downto 0); -- Coinage_B / Coinage_A
dip_switch_2 : in std_logic_vector(7 downto 0); -- Sound(8)/Difficulty(7-5)/Bonus(4)/Cocktail(3)/lives(2-1)
@@ -599,15 +601,9 @@ rgb_palette_addr <=
process (clock_6)
begin
if rising_edge(clock_6) then
if hblank = '1' or vblank = '1' then
video_r <= "000";
video_g <= "000";
video_b <= "000";
else
video_r <= rgb_palette_do(2 downto 0);
video_g <= rgb_palette_do(5 downto 3);
video_b <= rgb_palette_do(7 downto 6) & '0';
end if;
video_r <= rgb_palette_do(2 downto 0);
video_g <= rgb_palette_do(5 downto 3);
video_b <= rgb_palette_do(7 downto 6);
end if;
end process;
@@ -684,13 +680,17 @@ port map(
DO => cpu_do
);
roms_addr <= cpu_addr(14 downto 0);
cpu_rom_do <= roms_do;
roms_rd <= '1';
-- cpu1 program ROM
rom_cpu1 : entity work.pooyan_prog
port map(
clk => clock_6n,
addr => cpu_addr(14 downto 0),
data => cpu_rom_do
);
--rom_cpu1 : entity work.pooyan_prog
--port map(
-- clk => clock_6n,
-- addr => cpu_addr(14 downto 0),
-- data => cpu_rom_do
--);
-- working/char RAM 0x8000-0x8FFF
wram : entity work.gen_ram

234
Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pooyan_mist.sv Normal file
View File

@@ -0,0 +1,234 @@
module pooyan_mist(
output LED,
output [5:0] VGA_R,
output [5:0] VGA_G,
output [5:0] VGA_B,
output VGA_HS,
output VGA_VS,
output AUDIO_L,
output AUDIO_R,
input SPI_SCK,
output SPI_DO,
input SPI_DI,
input SPI_SS2,
input SPI_SS3,
input CONF_DATA0,
input CLOCK_27,
output [12:0] SDRAM_A,
inout [15:0] SDRAM_DQ,
output SDRAM_DQML,
output SDRAM_DQMH,
output SDRAM_nWE,
output SDRAM_nCAS,
output SDRAM_nRAS,
output SDRAM_nCS,
output [1:0] SDRAM_BA,
output SDRAM_CLK,
output SDRAM_CKE
);
`include "rtl\build_id.v"
localparam CONF_STR = {
"POOYAN;;",
"O2,Rotate Controls,Off,On;",
"O34,Scandoubler Fx,None,CRT 25%,CRT 50%,CRT 75%;",
"T6,Reset;",
"V,v1.25.",`BUILD_DATE
};
assign LED = 1;
assign AUDIO_R = AUDIO_L;
assign SDRAM_CLK = clock_48;
wire clock_48, clock_12, clock_14, pll_locked;
pll pll(
.inclk0(CLOCK_27),
.c0(clock_48),
.c1(clock_12),
.c2(clock_14),
.locked(pll_locked)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [11:0] kbjoy;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] audio;
wire hs, vs;
wire hb, vb;
wire blankn = ~(hb | vb);
wire [2:0] r, g;
wire [1:0] b;
wire [14:0] rom_addr;
wire [15:0] rom_do;
wire rom_rd;
wire ioctl_downl;
wire [7:0] ioctl_index;
wire ioctl_wr;
wire [24:0] ioctl_addr;
wire [7:0] ioctl_dout;
wire key_strobe;
wire key_pressed;
wire [7:0] key_code;
data_io data_io(
.clk_sys ( clock_48 ),
.SPI_SCK ( SPI_SCK ),
.SPI_SS2 ( SPI_SS2 ),
.SPI_DI ( SPI_DI ),
.ioctl_download( ioctl_downl ),
.ioctl_index ( ioctl_index ),
.ioctl_wr ( ioctl_wr ),
.ioctl_addr ( ioctl_addr ),
.ioctl_dout ( ioctl_dout )
);
sdram rom(
.*,
.init ( ~pll_locked ),
.clk ( clock_48 ),
.wtbt ( 2'b00 ),
.dout ( rom_do ),
.din ( {ioctl_dout, ioctl_dout} ),
.addr ( ioctl_downl ? ioctl_addr : rom_addr ),
.we ( ioctl_downl & ioctl_wr ),
.rd ( !ioctl_downl),
.ready()
);
reg reset = 1;
reg rom_loaded = 0;
always @(posedge clock_48) begin
reg ioctl_downlD;
ioctl_downlD <= ioctl_downl;
if (ioctl_downlD & ~ioctl_downl) rom_loaded <= 1;
reset <= status[0] | buttons[1] | status[6] | ~rom_loaded;
end
pooyan pooyan(
.clock_12(clock_12),
.clock_14(clock_14),
.reset(reset),
.video_r(r),
.video_g(g),
.video_b(b),
.video_hblank(hb),
.video_vblank(vb),
.video_hs(hs),
.video_vs(vs),
.audio_out(audio),
.roms_addr ( rom_addr ),
.roms_do ( rom_do[7:0] ),
.roms_rd ( rom_rd ),
.dip_switch_1("11111111"),// Coinage_B / Coinage_A
.dip_switch_2("11111011"),// Sound(8)/Difficulty(7-5)/Bonus(4)/Cocktail(3)/lives(2-1)
.start2(btn_two_players),
.start1(btn_one_player),
.coin1(btn_coin),
.fire1(m_fire),
.right1(m_right),
.left1(m_left),
.down1(m_down),
.up1(m_up),
.fire2(m_fire),
.right2(m_right),
.left2(m_left),
.down2(m_down),
.up2(m_up),
.sw("00000000")
);
mist_video #(.COLOR_DEPTH(3), .SD_HCNT_WIDTH(10)) mist_video(
.clk_sys ( clock_48 ),
.SPI_SCK ( SPI_SCK ),
.SPI_SS3 ( SPI_SS3 ),
.SPI_DI ( SPI_DI ),
.R ( blankn ? r : 0 ),
.G ( blankn ? g : 0 ),
.B ( blankn ? {b,1'b0} : 0 ),
.HSync ( hs ),
.VSync ( vs ),
.VGA_R ( VGA_R ),
.VGA_G ( VGA_G ),
.VGA_B ( VGA_B ),
.VGA_VS ( VGA_VS ),
.VGA_HS ( VGA_HS ),
.rotate ( {1'b1,status[2]} ),
.scandoubler_disable( scandoublerD ),
.scanlines ( status[4:3] ),
.ypbpr ( ypbpr )
);
user_io #(.STRLEN(($size(CONF_STR)>>3)))user_io(
.clk_sys (clock_48 ),
.conf_str (CONF_STR ),
.SPI_CLK (SPI_SCK ),
.SPI_SS_IO (CONF_DATA0 ),
.SPI_MISO (SPI_DO ),
.SPI_MOSI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable (scandoublerD ),
.ypbpr (ypbpr ),
.key_strobe (key_strobe ),
.key_pressed (key_pressed ),
.key_code (key_code ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
dac #(.C_bits(16))dac(
.clk_i(clock_48),
.res_n_i(1),
.dac_i({audio, 5'b00000}),
.dac_o(AUDIO_L)
);
// Rotated Normal
wire m_up = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
wire m_down = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
wire m_left = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
wire m_right = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
wire m_fire = btn_fire1 | joystick_0[4] | joystick_1[4];
//wire m_bomb = btn_fire2 | joystick_0[5] | joystick_1[5];
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
//reg btn_fire2 = 0;
//reg btn_fire3 = 0;
reg btn_coin = 0;
always @(posedge clock_48) begin
reg old_state;
old_state <= key_strobe;
if(old_state != key_strobe) begin
case(key_code)
'h75: btn_up <= key_pressed; // up
'h72: btn_down <= key_pressed; // down
'h6B: btn_left <= key_pressed; // left
'h74: btn_right <= key_pressed; // right
'h76: btn_coin <= key_pressed; // ESC
'h05: btn_one_player <= key_pressed; // F1
'h06: btn_two_players <= key_pressed; // F2
//'h14: btn_fire3 <= key_pressed; // ctrl
//'h11: btn_fire2 <= key_pressed; // alt
'h29: btn_fire1 <= key_pressed; // Space
endcase
end
end
endmodule

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/pooyan_sound_board.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/pooyan_sound_board.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_char_color_lut.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_char_color_lut.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_char_grphx1.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_char_grphx1.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_char_grphx2.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_char_grphx2.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_palette.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_palette.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_prog.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_prog.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_sound_prog.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_sound_prog.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_sprite_color_lut.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_sprite_color_lut.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_sprite_grphx1.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_sprite_grphx1.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/proms/pooyan_sprite_grphx2.vhd → Arcade_MiST/Konami Classic/Pooyan_MiST/rtl/rom/pooyan_sprite_grphx2.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Power Surge.jpg → Arcade_MiST/Konami Classic/Power Surge.jpg
View File

Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 86 KiB

After

Width:  |  Height:  |  Size: 86 KiB

31
Arcade_MiST/Konami Classic/Power_Surge_MiST/Power_Surge.qpf Normal file
View File

@@ -0,0 +1,31 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2016 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition
# Date created = 11:17:10 October 25, 2017
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "16.1"
DATE = "11:17:10 October 25, 2017"
# Revisions
PROJECT_REVISION = "Power_Surge"

158
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/pooyan_mist.qsf → Arcade_MiST/Konami Classic/Power_Surge_MiST/Power_Surge.qsf
View File

@@ -1,6 +1,6 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Copyright (C) 1991-2014 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
@@ -17,15 +17,15 @@
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
# Date created = 14:18:08 November 05, 2017
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 17:50:10 March 09, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# pooyan_mist_assignment_defaults.qdf
# time_pilot_mist_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
@@ -43,53 +43,11 @@ set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:45:13 JUNE 17,2016"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name TOP_LEVEL_ENTITY pooyan_mist
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
# Classic Timing Assignments
# Pin & Location Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
# Fitter Assignments
# ==================
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
@@ -117,48 +75,90 @@ set_location_assignment PIN_80 -to AUDIO_R
set_location_assignment PIN_105 -to SPI_DO
set_location_assignment PIN_88 -to SPI_DI
set_location_assignment PIN_126 -to SPI_SCK
set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_13 -to CONF_DATA0
# Classic Timing Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name TOP_LEVEL_ENTITY SNES_top
set_global_assignment -name FAMILY "Cyclone III"
# Fitter Assignments
# ==================
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name ENABLE_NCE_PIN OFF
# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
# ----------------------------
# start ENTITY(TimePilot_MiST)
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(TimePilot_MiST)
# --------------------------
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name VERILOG_FILE "../Neuer Ordner (2)/rtl/DE0-CV/SNES_top.v"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name VHDL_FILE rtl/pooyan_mist.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_sprite_grphx2.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_sprite_grphx1.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_sprite_color_lut.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_sound_prog.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_prog.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_palette.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_char_grphx2.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_char_grphx1.vhd
set_global_assignment -name VHDL_FILE rtl/proms/pooyan_char_color_lut.vhd
set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
set_global_assignment -name VHDL_FILE rtl/T8080se.vhd
set_global_assignment -name VHDL_FILE rtl/T80se.vhd
set_global_assignment -name VHDL_FILE rtl/T80_Reg.vhd
set_global_assignment -name VHDL_FILE rtl/T80_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T80_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T80_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T80.vhd
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
set_global_assignment -name QIP_FILE rtl/mist_pll_12M_14M.qip
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VHDL_FILE rtl/gen_video.vhd
set_global_assignment -name VHDL_FILE rtl/gen_ram.vhd
set_global_assignment -name VHDL_FILE rtl/dac.vhd
set_global_assignment -name VHDL_FILE rtl/pooyan_sound_board.vhd
set_global_assignment -name VHDL_FILE rtl/pooyan.vhd
set_global_assignment -name VERILOG_FILE rtl/osd.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/snes_core.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/dma_core.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/display.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/DE0-CV/VGA_ctrl.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/DE0-CV/dsdac16.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/DE0-CV/DDS_50to10738635.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/DE0-CV/DDS_50to1024000.sflp"
set_global_assignment -name SOURCE_FILE "../Neuer Ordner (2)/rtl/DE0-CV/core.sflp"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

5
Arcade_MiST/Konami Classic/Power_Surge_MiST/Power_Surge.srf Normal file
View File

@@ -0,0 +1,5 @@
{ "" "" "" "*" { } { } 0 10492 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 13310 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 276027 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10273 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10268 "" 0 0 "Quartus II" 0 -1 0 ""}

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/README.txt → Arcade_MiST/Konami Classic/Power_Surge_MiST/README.txt
View File

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/Snapshot/Power_Surge.rbf Normal file
View File

Binary file not shown.

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/clean.bat → Arcade_MiST/Konami Classic/Power_Surge_MiST/clean.bat
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/T8080se.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T8080se.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80_ALU.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80_ALU.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80_MCode.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80_MCode.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80_Pack.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80_Pack.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80_Reg.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80_Reg.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/T80/T80se.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/T80/T80se.vhd
View File

210
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/TimePilot_MiST.sv Normal file
View File

@@ -0,0 +1,210 @@
//============================================================================
// Arcade: Time Pilot
//
// Port to MiST
// Copyright (C) 2017 Gehstock
//
// Time pilot by Dar (darfpga@aol.fr) (29/10/2017)
// http://darfpga.blogspot.fr
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 of the License, or (at your option)
// any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
// more details.
//
// You should have received a copy of the GNU General Public License along
// with this program; if not, write to the Free Software Foundation, Inc.,
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
//============================================================================
module TimePilot_MiST(
output LED,
output [5:0] VGA_R,
output [5:0] VGA_G,
output [5:0] VGA_B,
output VGA_HS,
output VGA_VS,
output AUDIO_L,
output AUDIO_R,
input SPI_SCK,
output SPI_DO,
input SPI_DI,
input SPI_SS2,
input SPI_SS3,
input CONF_DATA0,
input CLOCK_27
);
`include "rtl\build_id.v"
localparam CONF_STR = {
"PSurge;;",
"O2,Rotate Controls,Off,On;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.10.",`BUILD_DATE
};
assign LED = 1;
assign AUDIO_R = AUDIO_L;
wire clock_24, clock_14, clock_12, pix_ce;
wire pll_locked;
pll pll(
.inclk0(CLOCK_27),
.areset(0),
.c0(clock_24),//24,57600000
.c1(clock_14),//14.31800000
.c2(clock_12),//12.28800000
.locked(pll_locked)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
reg [10:0] audio;
wire hb, vb;
wire blankn = ~(hb | vb);
wire ce_vid;
wire hs, vs;
wire [4:0] r,g,b;
time_pilot time_pilot(
.clock_12(clock_12),
.clock_14(clock_14),
.reset(status[0] | status[6] | buttons[1]),
.video_r(r),
.video_g(g),
.video_b(b),
.video_hblank(hb),
.video_vblank(vb),
.video_clk(pix_ce),
.video_hs(hs),
.video_vs(vs),
.audio_out(audio),
.dip_switch_1("11111111"), // Cabinet Unknown Lives Lives Initial_Energy Unknown Unknown Unknown
.dip_switch_2("11111010"), // Stop_at_Junctions Unknown Unknown Cheat Coin_B Coin_B Coin_A Coin_A
.start2(btn_two_players),
.start1(btn_one_player),
.coin1(btn_coin),
.fire1(m_fire),
.right1(m_right),
.left1(m_left),
.down1(m_down),
.up1(m_up),
.fire2(m_fire),
.right2(m_right),
.left2(m_left),
.down2(m_down),
.up2(m_up),
.dbg_cpu_addr()
);
video_mixer video_mixer(
.clk_sys(clock_24),
.ce_pix(pix_ce),
.ce_pix_actual(pix_ce),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(blankn ? r[2:0] : "000"),
.G(blankn ? g[2:0] : "000"),
.B(blankn ? b[2:0] : "000"),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.rotate({1'b0,status[2]}),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clock_24 ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
.SPI_SS2 (SPI_SS2 ),
.SPI_DO (SPI_DO ),
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
dac dac(
.clk_i(clock_24),
.res_n_i(1),
.dac_i({"0000", audio}),
.dac_o(AUDIO_L)
);
// NORMAL ROTATED
wire m_up = btn_right | joystick_0[0] | joystick_1[0];// : btn_up | joystick_0[3] | joystick_1[3];
wire m_down = btn_left | joystick_0[1] | joystick_1[1];// : btn_down | joystick_0[2] | joystick_1[2];
wire m_left = btn_up | joystick_0[3] | joystick_1[3];// : btn_left | joystick_0[1] | joystick_1[1];
wire m_right = btn_down | joystick_0[2] | joystick_1[2];// : btn_right | joystick_0[0] | joystick_1[0];
wire m_fire = btn_fire1 | joystick_0[4] | joystick_1[4];
wire m_bomb = btn_fire2 | joystick_0[5] | joystick_1[5];
/*
wire m_up = status[2] ? btn_up & joystick_0[3] & joystick_1[3] : btn_right & joystick_0[0] & joystick_1[0];
wire m_down = status[2] ? btn_down & joystick_0[2] & joystick_1[2] : btn_left & joystick_0[1] & joystick_1[1];
wire m_left = status[2] ? btn_left & joystick_0[1] & joystick_1[1] : btn_up & joystick_0[3] & joystick_1[3];
wire m_right = status[2] ? btn_right & joystick_0[0] & joystick_1[0] : btn_down & joystick_0[2] & joystick_1[2];
*/
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_fire3 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
always @(posedge clock_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire3 <= pressed; // ctrl
'h11: btn_fire2 <= pressed; // alt
'h29: btn_fire1 <= pressed; // Space
endcase
end
end
endmodule

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/YM2149_linmix_sep.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/YM2149_linmix_sep.vhd
View File

35
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/build_id.tcl Normal file
View File

@@ -0,0 +1,35 @@
# ================================================================================
#
# Build ID Verilog Module Script
# Jeff Wiencrot - 8/1/2011
#
# Generates a Verilog module that contains a timestamp,
# from the current build. These values are available from the build_date, build_time,
# physical_address, and host_name output ports of the build_id module in the build_id.v
# Verilog source file.
#
# ================================================================================
proc generateBuildID_Verilog {} {
# Get the timestamp (see: http://www.altera.com/support/examples/tcl/tcl-date-time-stamp.html)
set buildDate [ clock format [ clock seconds ] -format %y%m%d ]
set buildTime [ clock format [ clock seconds ] -format %H%M%S ]
# Create a Verilog file for output
set outputFileName "rtl/build_id.v"
set outputFile [open $outputFileName "w"]
# Output the Verilog source
puts $outputFile "`define BUILD_DATE \"$buildDate\""
puts $outputFile "`define BUILD_TIME \"$buildTime\""
close $outputFile
# Send confirmation message to the Messages window
post_message "Generated build identification Verilog module: [pwd]/$outputFileName"
post_message "Date: $buildDate"
post_message "Time: $buildTime"
}
# Comment out this line to prevent the process from automatically executing when the file is sourced:
generateBuildID_Verilog

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/dac.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/dac.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/gen_ram.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/gen_ram.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/gen_video.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/gen_video.vhd
View File

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/hq2x.sv → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/hq2x.sv
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/mist_io.v → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/mist_io.v
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/osd.v → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/osd.v
View File

4
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/mist_pll_12M_14M.qip → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/pll.qip
View File

@@ -1,4 +1,4 @@
set_global_assignment -name IP_TOOL_NAME "ALTPLL"
set_global_assignment -name IP_TOOL_VERSION "13.1"
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "mist_pll_12M_14M.vhd"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "mist_pll_12M_14M.ppf"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"]

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/pll.v → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/pll.v
View File

18
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/make_time_pilot_proms.bat Normal file
View File

@@ -0,0 +1,18 @@
copy /B p1 + p2 + p3 time_pilot_prog.bin
make_vhdl_prom time_pilot_prog.bin time_pilot_prog.vhd
copy /B p6 + p7 time_pilot_sound.bin
make_vhdl_prom time_pilot_sound.bin time_pilot_sound_prog.vhd
make_vhdl_prom p4 time_pilot_char_grphx.vhd
copy /B p5 + tm5 time_pilot_sprite_grphx.bin
make_vhdl_prom time_pilot_sprite_grphx.bin time_pilot_sprite_grphx.vhd
make_vhdl_prom timeplt.b4 time_pilot_palette_blue_green.vhd
make_vhdl_prom timeplt.b5 time_pilot_palette_green_red.vhd
make_vhdl_prom timeplt.e9 time_pilot_sprite_color_lut.vhd
make_vhdl_prom timeplt.e12 time_pilot_char_color_lut.vhd

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/make_vhdl_prom.exe Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p1 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p2 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p3 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p4 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p5 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p6 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/p7 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/psurge (1).zip Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/psurge (2).zip Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/psurge.zip Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/time_pilot_prog.bin Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/time_pilot_sound.bin Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/time_pilot_sprite_grphx.bin Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/timeplt.b4 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/timeplt.b5 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/timeplt.e12 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/timeplt.e9 Normal file
View File

Binary file not shown.

BIN
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/rom/tm5 Normal file
View File

Binary file not shown.

0
Arcade_MiST/Konami Classic/Pooyan_MiST/Pooyan_mistVGA/rtl/scandoubler.v → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/scandoubler.v
View File

803
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot.vhd Normal file
View File

@@ -0,0 +1,803 @@
---------------------------------------------------------------------------------
-- Time pilot by Dar (darfpga@aol.fr) (29/10/2017)
-- http://darfpga.blogspot.fr
---------------------------------------------------------------------------------
-- gen_ram.vhd & io_ps2_keyboard
--------------------------------
-- Copyright 2005-2008 by Peter Wendrich (pwsoft@syntiac.com)
-- http://www.syntiac.com/fpga64.html
---------------------------------------------------------------------------------
-- T80/T80se - Version : 0247
-----------------------------
-- Z80 compatible microprocessor core
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
---------------------------------------------------------------------------------
-- YM2149 (AY-3-8910)
-- Copyright (c) MikeJ - Jan 2005
---------------------------------------------------------------------------------
-- Educational use only
-- Do not redistribute synthetized file with roms
-- Do not redistribute roms whatever the form
-- Use at your own risk
---------------------------------------------------------------------------------
-- Features :
-- TV 15KHz mode only (atm)
-- Coctail mode ok
-- Sound ok
-- Use with MAME roms from timeplt.zip
--
-- Use make_time_pilot_proms.bat to build vhd file from binaries
-- time_pilot_prog.vhd : tm1, tm2,tm3
-- time_pilot_sprite_grphx.vhd : tm4, tm5
-- time_pilot_char_grphx.vhd : tm6
-- time_pilot_sound_prog.vhd : tm7
-- time_pilot_palette_blue_green.vhd : timeplt.b4
-- time_pilot_palette_green_red.vhd : timeplt.b5
-- time_pilot_sprite_color_lut.vhd : timeplt.e9
-- time_pilot_char_color_lut.vhd : timeplt.e12
-- Time Pilot Hardware caracteristics :
--
-- VIDEO : 1xZ80@3MHz CPU accessing its program rom, working ram,
-- sprite data ram, I/O, sound board register and trigger.
-- 24Kx8bits program rom
--
-- One char tile map 32x28
-- 8Kx8bits graphics rom 2bits/pixel
-- 4 colors/32sets among 16 colors
--
-- 24 sprites with priorities and flip H/V
-- 16Kx8bits graphics rom 2bits/pixel
-- 3 colors/64sets among 16 colors (different of char colors).
--
-- Char/sprites color palette 2x16 colors among 32768 colors
-- 15bits 5red/5green/5blue
--
-- Working ram : 4Kx8bits
-- Sprites data ram : 256x16bits
-- Sprites line buffer rams : 1 scan line delay flip/flop 2x256x4bits
-- SOUND : 1xZ80@1.79MHz CPU accessing its program rom, working ram, 2x-AY3-8910
-- 8Kx8bits program rom
--
-- 1xAY-3-8910
-- I/O noise input and command/trigger from video board.
-- 3 sound channels
--
-- 1xAY-3-8910
-- 3 sound channels
--
-- 6 RC filters with 4 states : transparent or cut 600Hz, 700Hz, 3.4KHz
--
---------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity time_pilot is
port(
clock_12 : in std_logic;
clock_14 : in std_logic;
reset : in std_logic;
video_r : out std_logic_vector(4 downto 0);
video_g : out std_logic_vector(4 downto 0);
video_b : out std_logic_vector(4 downto 0);
video_clk : out std_logic;
video_hblank : out std_logic;
video_vblank : out std_logic;
video_hs : out std_logic;
video_vs : out std_logic;
audio_out : out std_logic_vector(10 downto 0);
dip_switch_1 : in std_logic_vector(7 downto 0); -- Coinage_B / Coinage_A
dip_switch_2 : in std_logic_vector(7 downto 0); -- Sound(8)/Difficulty(7-5)/Bonus(4)/Cocktail(3)/lives(2-1)
start2 : in std_logic;
start1 : in std_logic;
coin1 : in std_logic;
fire1 : in std_logic;
right1 : in std_logic;
left1 : in std_logic;
down1 : in std_logic;
up1 : in std_logic;
fire2 : in std_logic;
right2 : in std_logic;
left2 : in std_logic;
down2 : in std_logic;
up2 : in std_logic;
dbg_cpu_addr : out std_logic_vector(15 downto 0)
);
end time_pilot;
architecture struct of time_pilot is
signal reset_n: std_logic;
signal clock_12n : std_logic;
signal clock_6 : std_logic := '0';
signal clock_6n : std_logic;
signal clock_div : std_logic_vector(1 downto 0) := "00";
signal hcnt : std_logic_vector(5 downto 0); -- horizontal counter
signal vcnt : std_logic_vector(8 downto 0); -- vertical counter
signal pxcnt : std_logic_vector(2 downto 0); -- pixel counter
signal spcnt : std_logic_vector(4 downto 0); -- sprite counter
signal hsync0 : std_logic;
signal hblank : std_logic;
signal vblank : std_logic;
signal cpu_ena : std_logic;
signal cpu_addr : std_logic_vector(15 downto 0);
signal cpu_di : std_logic_vector( 7 downto 0);
signal cpu_do : std_logic_vector( 7 downto 0);
signal cpu_wr_n : std_logic;
signal cpu_mreq_n : std_logic;
signal cpu_nmi_n : std_logic;
signal cpu_int_n : std_logic;
signal cpu_rom_do : std_logic_vector( 7 downto 0);
signal wram_addr : std_logic_vector(11 downto 0);
signal wram_we : std_logic;
signal wram_do : std_logic_vector( 7 downto 0);
signal ch_graphx_addr_f: std_logic_vector(12 downto 0);
signal ch_graphx_addr : std_logic_vector(12 downto 0);
signal ch_graphx_do : std_logic_vector( 7 downto 0);
signal ch_pixels : std_logic_vector( 7 downto 0);
signal ch_data1 : std_logic_vector( 7 downto 0);
signal ch_pixel_bit1 : std_logic;
signal ch_pixel_bit2 : std_logic;
signal ch_color_set : std_logic_vector(4 downto 0);
signal ch_palette_addr : std_logic_vector(7 downto 0);
signal ch_palette_do : std_logic_vector(3 downto 0);
signal spram_addr : std_logic_vector(7 downto 0);
signal spram1_we : std_logic;
signal spram1_do : std_logic_vector(7 downto 0);
signal spram2_we : std_logic;
signal spram2_do : std_logic_vector(7 downto 0);
signal sp_graphx_addr : std_logic_vector(13 downto 0);
signal sp_graphx_do : std_logic_vector(7 downto 0);
signal vcnt_r : std_logic_vector(8 downto 0);
signal sp_line : std_logic_vector(7 downto 0);
signal sp_on_line : std_logic;
signal sp_attr : std_logic_vector(7 downto 0);
signal sp_posh : std_logic_vector(7 downto 0);
signal sp_pixels : std_logic_vector(7 downto 0);
signal sp_color_set : std_logic_vector(5 downto 0);
signal sp_palette_addr : std_logic_vector(7 downto 0);
signal sp_palette_do : std_logic_vector(3 downto 0);
signal sp_read_out : std_logic_vector(3 downto 0);
signal sp_blank : std_logic;
signal rgb_palette_addr : std_logic_vector(4 downto 0);
signal rgb_palette_bg_do : std_logic_vector(7 downto 0);
signal rgb_palette_gr_do : std_logic_vector(7 downto 0);
signal sp_buffer_write_addr : std_logic_vector(7 downto 0);
signal sp_buffer_write_we : std_logic;
signal sp_buffer_read_addr : std_logic_vector(7 downto 0);
signal sp_buffer_ram1_addr : std_logic_vector(7 downto 0);
signal sp_buffer_ram1_we : std_logic;
signal sp_buffer_ram1_di : std_logic_vector(3 downto 0);
signal sp_buffer_ram1_do : std_logic_vector(3 downto 0);
signal sp_buffer_ram2_addr : std_logic_vector(7 downto 0);
signal sp_buffer_ram2_we : std_logic;
signal sp_buffer_ram2_di : std_logic_vector(3 downto 0);
signal sp_buffer_ram2_do : std_logic_vector(3 downto 0);
signal sp_buffer_sel : std_logic;
signal itt_n : std_logic_vector(7 downto 0);
signal flip : std_logic;
signal C0xx_we : std_logic;
signal C3xx_we : std_logic;
signal sound_cmd : std_logic_vector(7 downto 0);
signal sound_trig : std_logic;
signal input_0 : std_logic_vector(7 downto 0);
signal input_1 : std_logic_vector(7 downto 0);
signal input_2 : std_logic_vector(7 downto 0);
begin
video_clk <= clock_6n;
clock_12n <= not clock_12;
clock_6n <= not clock_6;
reset_n <= not reset;
-- debug
process (reset, clock_12)
begin
if rising_edge(clock_12) and cpu_ena ='1' and cpu_mreq_n ='0' then
dbg_cpu_addr <= cpu_addr;
end if;
end process;
-- make 6MHz clock from 12MHz
process (clock_12)
begin
if reset='1' then
clock_6 <= '0';
else
if rising_edge(clock_12) then
clock_6 <= not clock_6;
end if;
end if;
end process;
--------------------------
-- Video/sprite scanner --
--------------------------
-- make hcnt and vcnt video scanner from pixel clocks and counts
--
-- pxcnt |0|1|2|3|4|5|6|7|0|1|2|3|4|5|6|7|
-- hcnt | N | N+1 |
-- cpu_adr/do | |
--
-- hcnt [0..47] => 48 x 8 = 384 pixels, 384/6.144Mhz => 1 line is 62.5us (16.000KHz)
-- vcnt [252..255,256..511] => 260 lines, 1 frame is 260 x 62.5us = 16.250ms (61.54Hz)
process (reset, clock_6)
begin
if reset='1' then
pxcnt <= "000";
hcnt <= "000000";
vcnt <= '0'&X"FC";
spcnt <= "00000";
else
if rising_edge(clock_6) then
pxcnt <= pxcnt + '1';
if pxcnt = "111" then
hcnt <= hcnt + '1';
if hcnt = "101111" then -- char from #0 to #47 (one line)
hcnt <= "000000";
if vcnt = '1'&X"FF" then
vcnt <= '0'&X"FC";
else
vcnt <= vcnt + '1';
end if;
end if;
-- sprite down counter
if hcnt(0) = '1' then -- every is 16 bits (2 char)
if hcnt = "101111" then
spcnt <= "11111"; -- start with sprite #31
else
spcnt <= spcnt - '1'; -- downto sprite #8
end if;
end if;
end if;
end if;
end if;
end process;
cpu_ena <= not pxcnt(0);
-- inputs
input_0 <= "111" & not start2 & not start1 & '1' & '1' & not coin1; -- ?/ ?/ ?/ 2S/ 1S/SVC/ C2/ C1
input_1 <= "111" & not fire1 & not down1 & not up1 & not right1 & not left1; -- ?/1FL/1SR/1SL/1DW/1UP/1RI/1LE
input_2 <= "111" & not fire2 & not down2 & not up2 & not right2 & not left2; -- ?/2FL/2SR/2SL/2DW/2UP/2RI/2LE
-- cpu input address decoding (mirror mostly from Mame)
cpu_di <= cpu_rom_do when cpu_addr(15 downto 0) < X"6" else -- 0000-5FFF 011000 00000 00000
X"80" when cpu_addr(14 downto 0) = X"6" and
cpu_addr(2 downto 0) = "100" else -- 6004 Protection 110000000000100
wram_do when cpu_addr(15 downto 12) = X"A" else -- A000-AFFF
spram1_do when cpu_addr(15 downto 12) = X"B" and
cpu_addr(10) = '0' else -- B000-B3FF
spram2_do when cpu_addr(15 downto 12) = X"B" and
cpu_addr(10) = '1' else -- B400-B7FF
vcnt(7 downto 0) when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "00" else -- C000-C0FF
X"FF" when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "01" else -- C100-C1FF
dip_switch_2 when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "10" else -- C200-C2FF
input_0 when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "11" and
cpu_addr( 6 downto 5) = "00" else -- C300-C31F
input_1 when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "11" and
cpu_addr( 6 downto 5) = "01" else -- C320-C32F
input_2 when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "11" and
cpu_addr( 6 downto 5) = "10" else -- C340-C34F
dip_switch_1 when cpu_addr(15 downto 12) = X"C" and
cpu_addr( 9 downto 8) = "11" and
cpu_addr( 6 downto 5) = "11" else -- C360-C36F
X"FF";
-- working ram address multiplexer cpu/video scanner
wram_addr <= cpu_addr(11 downto 0) when cpu_ena = '1' else
'0' & pxcnt(1) & vcnt(7 downto 3) & hcnt(4 downto 0) when flip = '0' else
'0' & pxcnt(1) & not vcnt(7 downto 3) & not hcnt(4 downto 0);
-- sprite data ram address multiplexer cpu/sprite scanner
spram_addr <= cpu_addr(7 downto 0) when cpu_ena = '1' else "00" & spcnt & pxcnt(1);
-- write enable to working ram, sprite data ram and misc registers
wram_we <= '1' when cpu_wr_n = '0' and cpu_ena = '1' and cpu_addr(15 downto 12) = X"A" else '0';
spram1_we <= '1' when cpu_wr_n = '0' and cpu_ena = '1' and cpu_addr(15 downto 12) = X"B" and cpu_addr(10) = '0' else '0';
spram2_we <= '1' when cpu_wr_n = '0' and cpu_ena = '1' and cpu_addr(15 downto 12) = X"B" and cpu_addr(10) = '1' else '0';
C0xx_we <= '1' when cpu_wr_n = '0' and cpu_ena = '1' and cpu_addr(15 downto 12) = X"C" and cpu_addr(9 downto 8) = "00" else '0';
C3xx_we <= '1' when cpu_wr_n = '0' and cpu_ena = '1' and cpu_addr(15 downto 12) = X"C" and cpu_addr(9 downto 8) = "11" else '0';
-- Misc registers : interrupt enable/clear, cocktail flip, sound trigger
-- m_mainlatch->q_out_cb<0>().set_nop();
-- m_mainlatch->q_out_cb<4>().set_nop();
-- m_mainlatch->q_out_cb<5>().set_nop();
-- m_mainlatch->q_out_cb<6>().set_nop();
process (clock_6)
begin
if rising_edge(clock_6) then
if C0xx_we = '1' then
sound_cmd <= cpu_do;
end if;
if C3xx_we = '1' then
-- if cpu_addr(3 downto 1) = "000" then itt_n <= cpu_do; end if;
if cpu_addr(3 downto 1) = "001" then flip <= not cpu_do(0); end if;
if cpu_addr(3 downto 1) = "010" then sound_trig <= cpu_do(0); end if;
end if;
cpu_nmi_n <= vblank;
--cpu_int_n
-- if itt_n(0) = '0' then
-- cpu_nmi_n <= '1';
-- else -- lauch nmi and end of frame
-- if (vcnt = 493) and (hcnt = "000000") and (pxcnt = "000") then
-- cpu_nmi_n <= '0';
-- else
-- cpu_nmi_n <= '1';
-- end if;
-- end if;
end if;
end process;
----------------------
--- sprite machine ---
----------------------
-- sprite data rams are scanned from sprites addresse 31 to 8 at each line
-- latch current sprite data with respect to pixel and hcnt in relation
-- with sprite data ram addressing
process (clock_6)
begin
if rising_edge(clock_6) then
if (hcnt(0) = '0') and (pxcnt = "001") then
sp_posh <= spram1_do ; -- a.k.a. X
sp_attr <= spram2_do ; -- color and flip x/y
vcnt_r <= vcnt;
end if;
-- sprite is on current line if sp_line is below 16
-- and if sprite vertical position (a.k.a. Y) is below xF0
if (hcnt(0) = '0') and (pxcnt = "011") then
if sp_line(7 downto 4) = "0000" and spram2_do < X"F0" then
sp_on_line <= '1';
else
sp_on_line <= '0';
end if;
end if;
-- delay sp_color_set
if (hcnt(0) = '0') and (pxcnt = "100") then
sp_color_set <= sp_attr(5 downto 0);
end if;
end if;
end process;
-- sp_line (valid only when pxcnt = "011")
sp_line <= not(vcnt_r(7 downto 0)) - spram2_do;
-- address sprite graphics rom with sprite code and tile number and sprite line counter
-- with respect to sprite flip x/y controls
with sp_attr(7 downto 6) select
sp_graphx_addr <= spram1_do & sp_line(3) & hcnt(0) & pxcnt(2) & sp_line(2 downto 0) when "11",
spram1_do & sp_line(3) & not hcnt(0) & not pxcnt(2) & sp_line(2 downto 0) when "10",
spram1_do & not sp_line(3) & hcnt(0) & pxcnt(2) & not sp_line(2 downto 0) when "01",
spram1_do & not sp_line(3) & not hcnt(0) & not pxcnt(2) & not sp_line(2 downto 0) when others;
-- latch and shift sprite graphics data with respect to flipx control
-- 8bits => 4x2bits = 4pixels / 4colors (3colors + transparent)
process (clock_6)
begin
if rising_edge(clock_6) then
if pxcnt(1 downto 0) = "00" then
if sp_on_line = '1' then
if sp_attr(6) = '1' then
sp_pixels <= sp_graphx_do;
else
sp_pixels(3 downto 0) <= sp_graphx_do(0) & sp_graphx_do(1) & sp_graphx_do(2) & sp_graphx_do(3);
sp_pixels(7 downto 4) <= sp_graphx_do(4) & sp_graphx_do(5) & sp_graphx_do(6) & sp_graphx_do(7);
end if;
else
sp_pixels <= (others => '0');
end if;
else
sp_pixels(3 downto 0) <= sp_pixels(2 downto 0) & '0';
sp_pixels(7 downto 4) <= sp_pixels(6 downto 4) & '0';
end if;
end if;
end process;
-- address sprite color palette 4 colors, 64 sets => 16 colors
sp_palette_addr <= sp_color_set & sp_pixels(3) & sp_pixels(7);
-- write sprite to line buffer at posh position
process (clock_6)
begin
if rising_edge(clock_6) then
if hcnt(0) = '0' and pxcnt = "101" then
sp_buffer_write_addr <= sp_posh;
else
sp_buffer_write_addr <= sp_buffer_write_addr + '1';
end if;
end if;
end process;
-- write colors to buffer when not transparent
sp_buffer_write_we <= '0' when sp_palette_do = "0000" else '1';
-- read sprite line buffer and erase after read
process (clock_12)
begin
if rising_edge(clock_12) then
if hcnt = "101111" and pxcnt = "111" then
sp_buffer_read_addr <= "11111010"; -- tune horizontal position of sprites
else
if clock_6 = '0' then
sp_buffer_read_addr <= sp_buffer_read_addr + '1';
else
if vcnt(0) = '0' then
sp_read_out <= sp_buffer_ram1_do;
else
sp_read_out <= sp_buffer_ram2_do;
end if;
end if;
end if;
end if;
end process;
-- toggle read/write sprite line buffer every other line
-- wait pxcnt = "101" to allow last sprite (#8) to be written to line buffer
process (clock_6)
begin
if rising_edge(clock_6) then
if pxcnt = "101" then sp_buffer_sel <= vcnt(0); end if;
end if;
end process;
sp_buffer_ram1_addr <= sp_buffer_read_addr when sp_buffer_sel = '0' else sp_buffer_write_addr;
sp_buffer_ram2_addr <= sp_buffer_read_addr when sp_buffer_sel = '1' else sp_buffer_write_addr;
sp_buffer_ram1_di <= "0000" when sp_buffer_sel = '0' else sp_palette_do;
sp_buffer_ram2_di <= "0000" when sp_buffer_sel = '1' else sp_palette_do;
sp_buffer_ram1_we <= not clock_6 when sp_buffer_sel = '0' else sp_buffer_write_we;
sp_buffer_ram2_we <= not clock_6 when sp_buffer_sel = '1' else sp_buffer_write_we;
--------------------
--- char machine ---
--------------------
-- latch current char data with respect to vcnt and hcnt in relation
-- with wram ram addressing
process (clock_6)
begin
if rising_edge(clock_6) and pxcnt = "001" then
ch_data1 <= wram_do ;
end if;
if rising_edge(clock_6) and pxcnt = "100" then
ch_color_set <= ch_data1(4 downto 0) ;
end if;
end process;
-- address char graphics rom with char code, pixel count and vertical line counter
-- with respect to char flip x/y controls
with ch_data1(7 downto 6) select
ch_graphx_addr_f <= ch_data1(5) & wram_do & pxcnt(2) & vcnt(2 downto 0) when "00",
ch_data1(5) & wram_do & not pxcnt(2) & vcnt(2 downto 0) when "01",
ch_data1(5) & wram_do & pxcnt(2) & not(vcnt(2 downto 0)) when "10",
ch_data1(5) & wram_do & not pxcnt(2) & not(vcnt(2 downto 0)) when others;
-- in cocktail flip mode negate h/v counters
ch_graphx_addr <= ch_graphx_addr_f when flip ='0' else ch_graphx_addr_f xor "0000000001111";
-- latch and shift char graphics data with respect to flipx control and cocktail flip control
-- 8bits => 4x2bits = 4pixels / 4colors
process (clock_6)
begin
if rising_edge(clock_6) then
if pxcnt(1 downto 0) = "00" then
if (ch_data1(6) xor flip) = '0' then
ch_pixels <= ch_graphx_do;
else
ch_pixels(3 downto 0) <= ch_graphx_do(0) & ch_graphx_do(1) &ch_graphx_do(2) &ch_graphx_do(3);
ch_pixels(7 downto 4) <= ch_graphx_do(4) & ch_graphx_do(5) &ch_graphx_do(6) &ch_graphx_do(7);
end if;
else
ch_pixels(3 downto 0) <= ch_pixels(2 downto 0) & '0';
ch_pixels(7 downto 4) <= ch_pixels(6 downto 4) & '0';
end if;
end if;
end process;
-- address char color palette 4 colors, 64 sets => 16 colors
ch_palette_addr <= '0' & ch_color_set & ch_pixels(3) & ch_pixels(7);
---------------------
-- mux char/sprite --
---------------------
-- char data controls sprite display/hide
process (clock_6)
begin
if rising_edge(clock_6) then
sp_blank <= ch_color_set(4);
end if;
end process;
-- select rbg color and bank with respect to char/sprite selection
rgb_palette_addr <=
'1' & ch_palette_do when (sp_read_out = "0000" or sp_blank = '1') else
'0' & sp_read_out;
-- register and assign rbg palette output
process (clock_6)
begin
if rising_edge(clock_6) then
if hblank = '1' or vblank = '1' then
video_r <= "00000";
video_g <= "00000";
video_b <= "00000";
else
video_r <= rgb_palette_gr_do(5 downto 1);
video_g <= rgb_palette_bg_do(2 downto 0) & rgb_palette_gr_do(7 downto 6);
video_b <= rgb_palette_bg_do(7 downto 3);
end if;
end if;
end process;
video_hblank <= hblank;
video_vblank <= vblank;
----------------------------
-- video syncs and blanks --
----------------------------
process(clock_6)
constant hcnt_base : integer := 36;
variable vsync_cnt : std_logic_vector(3 downto 0);
begin
if rising_edge(clock_6) and pxcnt = "110" then
if hcnt = hcnt_base+0 then hsync0 <= '0';
elsif hcnt = hcnt_base+3 then hsync0 <= '1';
end if;
if hcnt = hcnt_base then
if vcnt = 500 then
vsync_cnt := X"0";
else
if vsync_cnt < X"F" then vsync_cnt := vsync_cnt + '1'; end if;
end if;
end if;
if hcnt = hcnt_base-4 then
hblank <= '1';
if vcnt = 490 then
vblank <= '1'; -- 492 ok
elsif vcnt = 262 then
vblank <= '0'; -- 262 ok
end if;
elsif hcnt = 0 then
hblank <= '0';
end if;
video_hs <= hsync0;
if vsync_cnt = 0 then video_vs <= '0';
elsif vsync_cnt = 8 then video_vs <= '1';
end if;
end if;
end process;
------------------------------
-- components & sound board --
------------------------------
-- microprocessor Z80
cpu : entity work.T80se
generic map(Mode => 0, T2Write => 1, IOWait => 1)
port map(
RESET_n => reset_n,
CLK_n => clock_6,
CLKEN => cpu_ena,
WAIT_n => '1',
INT_n => cpu_int_n,
NMI_n => cpu_nmi_n,
BUSRQ_n => '1',
M1_n => open,
MREQ_n => cpu_mreq_n,
IORQ_n => open,
RD_n => open,
WR_n => cpu_wr_n,
RFSH_n => open,
HALT_n => open,
BUSAK_n => open,
A => cpu_addr,
DI => cpu_di,
DO => cpu_do
);
-- cpu1 program ROM
rom_cpu1 : entity work.time_pilot_prog
port map(
clk => clock_6n,
addr => cpu_addr(14 downto 0),
data => cpu_rom_do
);
-- working/char RAM 0xA000-0xAFFF
wram : entity work.gen_ram
generic map( dWidth => 8, aWidth => 12)
port map(
clk => clock_6n,
we => wram_we,
addr => wram_addr,
d => cpu_do,
q => wram_do
);
-- sprite RAM1 0xB000-0xB0FF
spram1 : entity work.gen_ram
generic map( dWidth => 8, aWidth => 8)
port map(
clk => clock_6n,
we => spram1_we,
addr => spram_addr,
d => cpu_do,
q => spram1_do
);
-- sprite RAM2 0xB400-0xB4FF
spram2 : entity work.gen_ram
generic map( dWidth => 8, aWidth => 8)
port map(
clk => clock_6n,
we => spram2_we,
addr => spram_addr,
d => cpu_do,
q => spram2_do
);
-- sprite line buffer 1
splinebuf1 : entity work.gen_ram
generic map( dWidth => 4, aWidth => 8)
port map(
clk => clock_12n,
we => sp_buffer_ram1_we,
addr => sp_buffer_ram1_addr,
d => sp_buffer_ram1_di,
q => sp_buffer_ram1_do
);
-- sprite line buffer 2
splinebuf2 : entity work.gen_ram
generic map( dWidth => 4, aWidth => 8)
port map(
clk => clock_12n,
we => sp_buffer_ram2_we,
addr => sp_buffer_ram2_addr,
d => sp_buffer_ram2_di,
q => sp_buffer_ram2_do
);
-- char graphics ROM
char_graphics : entity work.time_pilot_char_grphx
port map(
clk => clock_6,
addr => ch_graphx_addr,
data => ch_graphx_do
);
-- char palette ROM
ch_palette : entity work.time_pilot_char_color_lut
port map(
clk => clock_6,
addr => ch_palette_addr,
data => ch_palette_do
);
-- sprite graphics ROM
sp_graphics : entity work.time_pilot_sprite_grphx
port map(
clk => clock_6,
addr => sp_graphx_addr,
data => sp_graphx_do
);
-- sprite palette ROM
sp_palette : entity work.time_pilot_sprite_color_lut
port map(
clk => clock_6,
addr => sp_palette_addr,
data => sp_palette_do
);
-- rgb palette ROM 1
rgb_palette_gb : entity work.time_pilot_palette_blue_green
port map(
clk => clock_6,
addr => rgb_palette_addr,
data => rgb_palette_bg_do
);
-- rgb palette ROM 2
rgb_palette_br : entity work.time_pilot_palette_green_red
port map(
clk => clock_6,
addr => rgb_palette_addr,
data => rgb_palette_gr_do
);
-- sound board
--time_pilot_sound_board : entity work.time_pilot_sound_board
--port map(
--clock_14 => clock_14,
--reset => reset,
--sound_trig => sound_trig,
--sound_cmd => sound_cmd,
--audio_out => audio_out,
--dbg_cpu_addr => open
--);
end struct;

38
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_char_color_lut.vhd Normal file
View File

@@ -0,0 +1,38 @@
library ieee;
use ieee.std_logic_1164.all,ieee.numeric_std.all;
entity time_pilot_char_color_lut is
port (
clk : in std_logic;
addr : in std_logic_vector(7 downto 0);
data : out std_logic_vector(3 downto 0)
);
end entity;
architecture prom of time_pilot_char_color_lut is
type rom is array(0 to 255) of std_logic_vector(3 downto 0);
signal rom_data: rom := (
"0000","1101","1111","1100","1010","0100","0001","1111","1011","0100","0001","1111","1100","0100","0001","1111",
"1110","0100","0001","1111","0000","0100","0001","1111","1010","0100","0101","0001","1011","0100","0101","0001",
"1100","0100","0101","0001","1110","0100","0101","0001","0000","0100","0101","0001","1010","0110","1000","0010",
"1011","0110","1000","0010","1100","0110","1000","0010","1110","0110","1000","0010","0000","0110","1000","0010",
"0000","0001","0100","1111","0000","0100","0010","0110","0000","0001","1000","0100","0000","1101","0001","0101",
"0000","0010","0011","0001","0000","1100","1111","0011","0000","0101","0010","1000","1010","0001","0100","0011",
"0000","0110","1111","0010","0000","1111","0011","0101","0000","0011","0001","1111","1010","0010","1101","0101",
"0000","0001","1111","1000","1010","0010","1101","0101","1010","1011","1001","1111","1001","1001","1001","1001",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111",
"1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111","1111");
begin
process(clk)
begin
if rising_edge(clk) then
data <= rom_data(to_integer(unsigned(addr)));
end if;
end process;
end architecture;

534
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_char_grphx.vhd Normal file
View File

@@ -0,0 +1,534 @@
library ieee;
use ieee.std_logic_1164.all,ieee.numeric_std.all;
entity time_pilot_char_grphx is
port (
clk : in std_logic;
addr : in std_logic_vector(12 downto 0);
data : out std_logic_vector(7 downto 0)
);
end entity;
architecture prom of time_pilot_char_grphx is
type rom is array(0 to 8191) of std_logic_vector(7 downto 0);
signal rom_data: rom := (
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"87",X"C3",X"E1",X"F0",X"F0",X"E1",X"C3",X"87",
X"3C",X"3C",X"3C",X"3C",X"3C",X"3C",X"3C",X"3C",X"87",X"87",X"87",X"87",X"87",X"87",X"87",X"87",
X"0F",X"0F",X"F0",X"F0",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"F0",X"F0",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"F0",X"78",X"3C",X"1E",X"0F",X"0F",X"0F",X"0F",X"F0",X"E1",X"C3",X"87",
X"00",X"00",X"00",X"FF",X"FF",X"11",X"11",X"11",X"00",X"00",X"00",X"FF",X"FF",X"88",X"88",X"88",
X"00",X"00",X"00",X"00",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"FF",X"FF",X"88",X"88",
X"88",X"88",X"88",X"88",X"88",X"88",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"66",X"99",X"99",X"66",X"00",X"00",X"00",X"10",X"E0",X"00",X"00",X"00",X"00",X"00",
X"31",X"C0",X"00",X"00",X"00",X"00",X"00",X"00",X"EC",X"EE",X"77",X"99",X"99",X"66",X"00",X"00",
X"00",X"00",X"66",X"F9",X"F9",X"66",X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"CC",X"EE",X"77",X"F9",X"F9",X"66",X"00",X"00",
X"11",X"32",X"74",X"74",X"75",X"32",X"01",X"00",X"CC",X"E2",X"E5",X"E9",X"E1",X"C2",X"0C",X"00",
X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"88",X"88",X"88",X"88",X"88",X"88",X"88",X"88",
X"11",X"11",X"11",X"FF",X"FF",X"11",X"11",X"11",X"88",X"88",X"88",X"88",X"88",X"88",X"88",X"88",
X"11",X"11",X"11",X"FF",X"FF",X"00",X"00",X"00",X"88",X"88",X"88",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"88",X"88",X"88",X"FF",X"FF",X"88",X"88",X"88",
X"00",X"00",X"00",X"FF",X"FF",X"11",X"11",X"11",X"00",X"00",X"00",X"FF",X"FF",X"88",X"88",X"88",
X"11",X"11",X"11",X"FF",X"FF",X"11",X"11",X"11",X"88",X"88",X"88",X"FF",X"FF",X"88",X"88",X"88",
X"00",X"00",X"00",X"FF",X"FF",X"11",X"11",X"11",X"00",X"00",X"00",X"88",X"88",X"88",X"88",X"88",
X"11",X"11",X"11",X"FF",X"FF",X"00",X"00",X"00",X"88",X"88",X"88",X"88",X"88",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"11",X"00",X"00",X"00",X"88",X"88",X"88",X"FF",X"FF",X"00",X"00",X"00",
X"00",X"00",X"00",X"11",X"11",X"11",X"11",X"11",X"00",X"00",X"00",X"FF",X"FF",X"88",X"88",X"88",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"70",X"F0",X"D2",X"A0",X"E1",X"B0",X"E2",X"70",X"90",X"42",X"02",X"7F",X"B7",X"74",X"59",X"20",
X"00",X"49",X"A4",X"CE",X"AA",X"0C",X"B4",X"50",X"A0",X"F0",X"70",X"B8",X"70",X"D0",X"F8",X"60",
X"70",X"F0",X"D0",X"F2",X"A4",X"93",X"35",X"7B",X"E0",X"70",X"F0",X"B2",X"58",X"24",X"82",X"ED",
X"37",X"73",X"39",X"46",X"90",X"F2",X"F0",X"70",X"CF",X"CE",X"89",X"A8",X"42",X"F8",X"F0",X"E0",
X"00",X"01",X"03",X"F7",X"F7",X"01",X"03",X"00",X"08",X"0C",X"0E",X"FF",X"FF",X"0C",X"0E",X"00",
X"71",X"F1",X"F1",X"F1",X"F1",X"F1",X"F1",X"71",X"80",X"F1",X"F1",X"F1",X"F1",X"F1",X"F1",X"80",
X"00",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"00",X"A4",X"B4",X"B4",X"B4",X"B4",X"B4",X"B4",X"A4",
X"70",X"F0",X"F0",X"FF",X"F0",X"70",X"70",X"77",X"E0",X"F0",X"F0",X"FF",X"F0",X"E0",X"E0",X"EE",
X"70",X"70",X"70",X"70",X"F0",X"0F",X"F0",X"70",X"E0",X"E0",X"E0",X"E0",X"F0",X"0F",X"F0",X"E0",
X"1E",X"1E",X"1E",X"1E",X"1E",X"1E",X"1E",X"1E",X"C3",X"C3",X"C3",X"C3",X"C3",X"C3",X"C3",X"C3",
X"1E",X"3C",X"78",X"F0",X"F0",X"78",X"3C",X"1E",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"F0",X"F0",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"F0",X"F0",X"0F",X"0F",
X"1E",X"3C",X"78",X"F0",X"0F",X"0F",X"0F",X"0F",X"87",X"C3",X"E1",X"F0",X"0F",X"0F",X"0F",X"0F",
X"00",X"00",X"03",X"07",X"3F",X"3F",X"07",X"03",X"00",X"00",X"10",X"38",X"FC",X"FC",X"38",X"10",
X"70",X"F0",X"F7",X"FF",X"FF",X"FF",X"FF",X"F7",X"80",X"C0",X"E8",X"FC",X"FC",X"FC",X"FC",X"E8",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"F0",X"70",X"00",X"00",X"00",X"00",X"00",X"00",X"C0",X"80",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"03",X"07",X"3F",X"3F",X"37",X"33",X"70",X"F0",X"00",X"08",X"0C",X"0C",X"08",X"00",X"80",X"C0",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"10",X"30",X"30",X"30",X"30",X"10",X"00",X"00",
X"F7",X"FF",X"FF",X"FF",X"FF",X"FF",X"F7",X"70",X"E8",X"FC",X"FC",X"FC",X"FC",X"EC",X"C8",X"80",
X"33",X"33",X"33",X"37",X"3F",X"3F",X"07",X"03",X"00",X"00",X"00",X"08",X"0C",X"0C",X"08",X"00",
X"FE",X"FC",X"FC",X"FC",X"FC",X"FC",X"FC",X"FC",X"F0",X"C3",X"E1",X"87",X"F0",X"87",X"A5",X"A5",
X"F0",X"3C",X"F0",X"F0",X"F0",X"B4",X"B4",X"3C",X"F7",X"F3",X"F3",X"F3",X"F3",X"F3",X"F3",X"F3",
X"FC",X"FC",X"FC",X"F8",X"F0",X"F0",X"F0",X"88",X"F0",X"F0",X"F0",X"96",X"A5",X"B4",X"F0",X"00",
X"F0",X"B4",X"F0",X"F0",X"3C",X"F0",X"F0",X"00",X"F3",X"F3",X"F3",X"F1",X"F0",X"F0",X"F0",X"11",
X"07",X"03",X"01",X"30",X"71",X"71",X"30",X"10",X"0F",X"0F",X"0F",X"0F",X"CF",X"CB",X"C1",X"80",
X"00",X"30",X"70",X"F3",X"E3",X"43",X"07",X"07",X"00",X"00",X"80",X"0C",X"0E",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"1E",X"0C",X"00",X"08",X"0C",X"2C",X"7C",X"FC",X"E0",X"C0",X"00",
X"00",X"00",X"00",X"00",X"00",X"08",X"0C",X"0E",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FE",X"FC",X"EE",X"CC",X"88",X"B8",X"F8",X"F0",X"F0",X"F0",
X"77",X"33",X"11",X"D1",X"F1",X"F0",X"F0",X"F0",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"F7",X"F3",
X"77",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"EE",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0E",X"0F",X"0F",X"0F",X"0F",X"0F",X"0C",X"00",X"00",
X"0C",X"0C",X"08",X"08",X"08",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"88",X"88",X"88",X"88",X"88",X"88",X"88",X"88",
X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"88",X"88",X"88",X"88",X"88",X"88",X"88",X"88",
X"30",X"43",X"87",X"87",X"87",X"87",X"43",X"30",X"C0",X"2C",X"1E",X"1E",X"1E",X"1E",X"2C",X"C0",
X"30",X"70",X"F0",X"F0",X"F0",X"F0",X"70",X"30",X"C0",X"E0",X"F0",X"F0",X"F0",X"F0",X"E0",X"C0",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"0F",X"78",X"78",X"78",X"78",X"78",X"78",X"0F",X"0F",X"E1",X"E1",X"E1",X"E1",X"E1",X"E1",X"0F",
X"0F",X"08",X"08",X"78",X"78",X"78",X"78",X"0F",X"0F",X"01",X"01",X"E1",X"E1",X"E1",X"E1",X"0F",
X"0F",X"08",X"08",X"08",X"78",X"78",X"78",X"0F",X"0F",X"01",X"01",X"01",X"E1",X"E1",X"E1",X"0F",
X"0F",X"08",X"08",X"08",X"08",X"08",X"78",X"0F",X"0F",X"01",X"01",X"01",X"01",X"01",X"E1",X"0F",
X"00",X"10",X"54",X"12",X"F1",X"12",X"54",X"10",X"00",X"00",X"44",X"08",X"E0",X"08",X"44",X"00",
X"0F",X"08",X"08",X"08",X"08",X"08",X"08",X"0F",X"0F",X"01",X"01",X"01",X"01",X"01",X"01",X"0F",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"01",X"12",X"34",X"79",X"79",X"34",X"12",X"01",X"08",X"84",X"C2",X"E9",X"E9",X"C2",X"84",X"08",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"0F",X"0F",X"0E",X"0E",X"E0",X"0E",X"0E",X"0F",X"0F",X"0F",X"44",X"66",X"77",X"66",X"44",X"0F",
X"0F",X"0F",X"66",X"66",X"66",X"66",X"66",X"0F",X"0F",X"0F",X"07",X"07",X"70",X"07",X"07",X"0F",
X"0C",X"3F",X"3F",X"0C",X"0C",X"0F",X"0F",X"0F",X"01",X"EF",X"EF",X"01",X"01",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0C",X"0C",X"3F",X"1D",X"0C",X"87",X"87",X"87",X"01",X"01",X"EF",X"CD",X"89",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"87",X"87",X"87",
X"00",X"00",X"00",X"00",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"11",X"FF",X"FF",X"88",X"88",
X"88",X"88",X"88",X"88",X"88",X"88",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"66",X"99",X"99",X"66",X"00",X"00",X"00",X"10",X"E0",X"00",X"00",X"00",X"00",X"00",
X"31",X"C0",X"00",X"00",X"00",X"00",X"00",X"00",X"EC",X"EE",X"77",X"99",X"99",X"66",X"00",X"00",
X"00",X"00",X"66",X"F9",X"F9",X"66",X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"CC",X"EE",X"77",X"F9",X"F9",X"66",X"00",X"00",
X"11",X"32",X"74",X"74",X"75",X"32",X"01",X"00",X"CC",X"E2",X"E5",X"E9",X"E1",X"C2",X"0C",X"00",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"87",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"87",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"F0",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"F0",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"F0",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"87",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"87",X"87",X"87",X"87",X"F0",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"F0",X"87",X"87",X"87",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"0F",X"0F",X"0F",X"0E",X"E0",X"0E",X"0F",X"0F",X"0F",X"2F",X"03",X"41",X"B4",X"12",X"A3",X"0F",
X"0F",X"0F",X"4C",X"04",X"A0",X"0A",X"4C",X"0F",X"0F",X"0F",X"0F",X"07",X"70",X"07",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0E",X"0C",X"1C",X"0F",X"1D",X"87",X"87",X"87",X"03",X"41",X"05",X"83",X"C3",
X"0E",X"1D",X"0F",X"1C",X"0E",X"0F",X"0F",X"0F",X"C3",X"85",X"C3",X"41",X"03",X"87",X"87",X"87",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"0F",X"0F",X"0F",X"0E",X"E0",X"0E",X"0F",X"0F",X"0F",X"0F",X"45",X"44",X"44",X"44",X"45",X"0F",
X"0F",X"0F",X"0C",X"88",X"88",X"88",X"0C",X"0F",X"0F",X"0F",X"0F",X"07",X"70",X"07",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0E",X"0C",X"3F",X"0C",X"0E",X"87",X"87",X"87",X"03",X"01",X"EF",X"01",X"03",
X"1F",X"0E",X"0C",X"0C",X"0E",X"0F",X"0F",X"0F",X"CF",X"03",X"01",X"01",X"03",X"87",X"87",X"87",
X"0F",X"0F",X"0E",X"0E",X"E0",X"0E",X"0E",X"0F",X"0F",X"0F",X"66",X"66",X"66",X"66",X"66",X"0F",
X"0F",X"0F",X"22",X"66",X"EE",X"66",X"22",X"0F",X"0F",X"0F",X"07",X"07",X"70",X"07",X"07",X"0F",
X"0F",X"0F",X"0F",X"0C",X"0C",X"3F",X"3F",X"0C",X"87",X"87",X"87",X"01",X"01",X"EF",X"EF",X"01",
X"0C",X"1D",X"3F",X"0C",X"0C",X"0F",X"0F",X"0F",X"89",X"CD",X"EF",X"01",X"01",X"87",X"87",X"87",
X"00",X"00",X"03",X"07",X"3F",X"3F",X"07",X"03",X"00",X"00",X"10",X"38",X"FC",X"FC",X"38",X"10",
X"0F",X"3C",X"0F",X"2D",X"E1",X"2D",X"0F",X"3C",X"0F",X"C3",X"4B",X"4B",X"78",X"4B",X"4B",X"C3",
X"0F",X"0F",X"0F",X"0F",X"2D",X"0F",X"0F",X"0F",X"0F",X"0F",X"2D",X"A5",X"B4",X"A5",X"2D",X"0F",
X"F0",X"70",X"00",X"00",X"00",X"00",X"00",X"00",X"C0",X"80",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"03",X"07",X"3F",X"3F",X"37",X"33",X"70",X"F0",X"00",X"08",X"0C",X"0C",X"08",X"00",X"80",X"C0",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"10",X"30",X"30",X"30",X"30",X"10",X"00",X"00",
X"F7",X"FF",X"FF",X"FF",X"FF",X"FF",X"F7",X"70",X"E8",X"FC",X"FC",X"FC",X"FC",X"EC",X"C8",X"80",
X"33",X"33",X"33",X"37",X"3F",X"3F",X"07",X"03",X"00",X"00",X"00",X"08",X"0C",X"0C",X"08",X"00",
X"FE",X"FC",X"FC",X"FC",X"FC",X"FC",X"FC",X"FC",X"F0",X"C3",X"E1",X"87",X"F0",X"87",X"A5",X"A5",
X"F0",X"3C",X"F0",X"F0",X"F0",X"B4",X"B4",X"3C",X"F7",X"F3",X"F3",X"F3",X"F3",X"F3",X"F3",X"F3",
X"FC",X"FC",X"FC",X"F8",X"F0",X"F0",X"F0",X"88",X"F0",X"F0",X"F0",X"96",X"A5",X"B4",X"F0",X"00",
X"F0",X"B4",X"F0",X"F0",X"3C",X"F0",X"F0",X"00",X"F3",X"F3",X"F3",X"F1",X"F0",X"F0",X"F0",X"11",
X"0F",X"0E",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"25",X"21",X"01",X"08",X"48",X"86",X"87",X"87",
X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"E1",X"2D",X"2D",X"2D",
X"0F",X"0F",X"0F",X"F0",X"07",X"03",X"07",X"0F",X"0F",X"0F",X"0F",X"F0",X"0F",X"0F",X"0F",X"0F",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FE",X"FC",X"EE",X"CC",X"88",X"B8",X"F8",X"F0",X"F0",X"F0",
X"77",X"33",X"11",X"D1",X"F1",X"F0",X"F0",X"F0",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"F7",X"F3",
X"77",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"EE",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"0F",X"1F",X"0F",X"0F",X"0F",X"0F",X"0F",X"3F",X"FF",X"FF",
X"3F",X"3F",X"7F",X"7F",X"7F",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"CE",X"9C",X"99",X"98",X"99",X"99",X"C9",X"FF",X"37",X"93",X"19",X"11",X"F9",X"F9",X"19",X"FF",
X"8C",X"99",X"99",X"89",X"99",X"99",X"8C",X"FF",X"33",X"99",X"9F",X"3F",X"9F",X"99",X"33",X"FF",
X"88",X"99",X"99",X"98",X"99",X"99",X"88",X"FF",X"71",X"3F",X"9F",X"97",X"9F",X"3F",X"71",X"FF",
X"8C",X"99",X"99",X"89",X"99",X"99",X"9C",X"FF",X"13",X"F9",X"FF",X"71",X"F9",X"F9",X"F3",X"FF",
X"9C",X"9E",X"9E",X"8E",X"9E",X"9E",X"9C",X"FF",X"93",X"97",X"97",X"17",X"97",X"97",X"93",X"FF",
X"E9",X"F9",X"F8",X"F8",X"F8",X"99",X"C9",X"FF",X"19",X"33",X"37",X"3F",X"37",X"33",X"79",X"FF",
X"99",X"98",X"98",X"99",X"99",X"99",X"89",X"FF",X"FC",X"F8",X"F0",X"F4",X"FC",X"FC",X"1C",X"FF",
X"9C",X"89",X"89",X"89",X"99",X"99",X"9C",X"FF",X"93",X"99",X"19",X"19",X"19",X"99",X"93",X"FF",
X"8C",X"99",X"99",X"89",X"99",X"9C",X"9F",X"FF",X"33",X"99",X"99",X"39",X"F9",X"F3",X"F1",X"FF",
X"8C",X"99",X"99",X"8C",X"8F",X"99",X"9C",X"FF",X"33",X"99",X"9F",X"33",X"79",X"39",X"93",X"FF",
X"89",X"E9",X"E9",X"E9",X"E9",X"E9",X"EC",X"FF",X"19",X"79",X"79",X"79",X"79",X"79",X"73",X"FF",
X"99",X"99",X"99",X"99",X"98",X"C8",X"E9",X"FF",X"9C",X"9C",X"9C",X"94",X"90",X"38",X"7C",X"FF",
X"99",X"99",X"C9",X"EC",X"CE",X"9E",X"9E",X"FF",X"99",X"99",X"39",X"73",X"37",X"97",X"97",X"FF",
X"8C",X"FC",X"FC",X"EC",X"CC",X"9C",X"8C",X"FF",X"13",X"9F",X"3F",X"7F",X"FF",X"FF",X"13",X"FF",
X"FC",X"EF",X"CF",X"0F",X"CF",X"9F",X"0C",X"FF",X"13",X"F3",X"F3",X"13",X"F3",X"F3",X"03",X"FF",
X"FF",X"EE",X"CC",X"88",X"E8",X"EC",X"EE",X"EF",X"FF",X"7F",X"3F",X"10",X"70",X"7F",X"7F",X"7F",
X"FE",X"FE",X"FE",X"FE",X"FF",X"FF",X"FE",X"FF",X"F7",X"F7",X"F7",X"F7",X"FF",X"FF",X"F7",X"FF",
X"99",X"99",X"90",X"F9",X"F0",X"F9",X"F9",X"FF",X"99",X"99",X"90",X"F9",X"F0",X"F9",X"F9",X"FF",
X"E9",X"C9",X"9F",X"CE",X"FC",X"89",X"EB",X"FF",X"7D",X"19",X"F3",X"37",X"9F",X"39",X"79",X"FF",
X"CF",X"9F",X"CE",X"CF",X"9F",X"9F",X"CF",X"FF",X"39",X"93",X"37",X"7F",X"8F",X"9F",X"0F",X"FF",
X"FC",X"EE",X"CF",X"CF",X"CF",X"EE",X"FC",X"FF",X"3F",X"77",X"F3",X"F3",X"F3",X"77",X"3F",X"FF",
X"FF",X"9E",X"CE",X"08",X"CE",X"9E",X"FF",X"FF",X"FF",X"97",X"37",X"01",X"37",X"97",X"FF",X"FF",
X"FF",X"FF",X"FF",X"F8",X"FF",X"EF",X"EF",X"CF",X"FF",X"FF",X"FF",X"F1",X"FF",X"7F",X"7F",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FE",X"EC",X"E9",X"FF",X"FF",X"FC",X"F9",X"F3",X"F7",X"7F",X"7F",X"FF",
X"CE",X"9E",X"9C",X"8E",X"9E",X"9E",X"C8",X"FF",X"37",X"97",X"17",X"97",X"97",X"97",X"31",X"FF",
X"CC",X"99",X"FF",X"FE",X"CF",X"99",X"8C",X"FF",X"33",X"99",X"99",X"33",X"F9",X"F9",X"13",X"FF",
X"F8",X"F9",X"E8",X"9F",X"8F",X"F9",X"FC",X"FF",X"91",X"1F",X"13",X"99",X"09",X"99",X"93",X"FF",
X"C8",X"99",X"9F",X"8E",X"9E",X"9E",X"CE",X"FF",X"31",X"99",X"F3",X"37",X"97",X"97",X"37",X"FF",
X"CC",X"99",X"99",X"CC",X"9F",X"99",X"CC",X"FF",X"33",X"99",X"99",X"31",X"99",X"99",X"33",X"FF",
X"FF",X"FF",X"EE",X"FF",X"FF",X"EE",X"FE",X"FC",X"FF",X"FF",X"77",X"FF",X"FF",X"77",X"F7",X"FF",
X"FF",X"EF",X"C8",X"9F",X"C8",X"EF",X"FF",X"FF",X"1F",X"7F",X"F1",X"FF",X"F1",X"7F",X"1F",X"FF",
X"8C",X"E9",X"FF",X"FF",X"FE",X"EF",X"8E",X"FF",X"F3",X"79",X"39",X"93",X"37",X"7F",X"F7",X"FF",
X"FF",X"FE",X"FC",X"08",X"08",X"FE",X"FC",X"FF",X"F7",X"F3",X"F1",X"00",X"00",X"F3",X"F1",X"FF",
X"EF",X"EF",X"EF",X"E0",X"E0",X"EF",X"EF",X"EF",X"7F",X"7F",X"7F",X"70",X"70",X"7F",X"7F",X"7F",
X"FF",X"F0",X"00",X"0F",X"FF",X"FF",X"FF",X"FF",X"FF",X"F0",X"00",X"0F",X"FF",X"FF",X"FF",X"FF",
X"FC",X"FC",X"FC",X"FC",X"0C",X"0C",X"FC",X"FC",X"FF",X"FF",X"FF",X"FF",X"0F",X"0F",X"FF",X"FF",
X"FF",X"FF",X"FF",X"F1",X"F0",X"FC",X"FE",X"FE",X"3F",X"3F",X"3F",X"3F",X"3F",X"37",X"37",X"37",
X"EE",X"EE",X"EC",X"F0",X"F1",X"FF",X"FF",X"FF",X"77",X"77",X"37",X"0F",X"8F",X"FF",X"FF",X"FF",
X"33",X"31",X"38",X"3C",X"3E",X"3F",X"0F",X"0F",X"FF",X"FF",X"FF",X"F7",X"F3",X"F1",X"08",X"0C",
X"F0",X"F0",X"F3",X"E3",X"C3",X"83",X"13",X"33",X"C0",X"80",X"1F",X"3F",X"7F",X"FF",X"FF",X"FF",
X"0F",X"0C",X"F8",X"F8",X"F8",X"F8",X"FC",X"FF",X"0F",X"03",X"C1",X"C1",X"C1",X"C1",X"C3",X"CF",
X"FC",X"F8",X"F8",X"F8",X"FC",X"0E",X"0F",X"FF",X"F9",X"F0",X"F0",X"F0",X"F1",X"03",X"07",X"FF",
X"9F",X"9F",X"9F",X"9F",X"9F",X"9E",X"9E",X"9E",X"FF",X"FF",X"FF",X"F8",X"F0",X"F3",X"F7",X"F7",
X"3F",X"1C",X"88",X"C9",X"C9",X"88",X"1C",X"3F",X"CF",X"83",X"11",X"39",X"39",X"11",X"83",X"CF",
X"EF",X"EF",X"9F",X"9F",X"EF",X"EF",X"CF",X"FF",X"79",X"79",X"99",X"99",X"79",X"79",X"39",X"F9",
X"FE",X"EE",X"CE",X"80",X"C0",X"EE",X"FE",X"FE",X"77",X"37",X"17",X"00",X"10",X"37",X"77",X"F7",
X"3E",X"3E",X"CE",X"CE",X"3E",X"3E",X"CE",X"CE",X"F7",X"F7",X"F7",X"F7",X"F7",X"F7",X"F7",X"F7",
X"F0",X"F8",X"FC",X"CE",X"8F",X"CF",X"CF",X"FF",X"F0",X"F0",X"C0",X"10",X"90",X"98",X"9C",X"FE",
X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"F0",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"F0",X"F0",X"FF",X"FF",X"0F",X"0F",X"0F",X"0F",X"F0",X"F0",X"FF",X"FF",X"0F",X"0F",X"0F",X"0F",
X"F3",X"F3",X"F3",X"F3",X"F3",X"F3",X"03",X"03",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"0F",X"0F",
X"3F",X"3F",X"CF",X"CF",X"3F",X"3F",X"CF",X"CF",X"3C",X"3C",X"CC",X"CC",X"3C",X"3C",X"CC",X"CC",
X"F0",X"F0",X"F0",X"F0",X"30",X"31",X"C3",X"C7",X"F0",X"F1",X"F3",X"F7",X"3F",X"3F",X"CF",X"CF",
X"FE",X"FE",X"FE",X"FE",X"FE",X"FE",X"FE",X"FE",X"C7",X"C7",X"C7",X"C0",X"C0",X"C7",X"C7",X"C7",
X"FE",X"FE",X"FE",X"FE",X"FE",X"FF",X"FF",X"FF",X"F7",X"F7",X"F7",X"F0",X"00",X"0F",X"0F",X"0F",
X"FF",X"FF",X"FF",X"0F",X"0F",X"EF",X"E0",X"E0",X"FF",X"FF",X"FF",X"7F",X"7F",X"7F",X"70",X"70",
X"FE",X"FE",X"FE",X"E0",X"E0",X"EF",X"EF",X"EF",X"F7",X"F7",X"F7",X"00",X"00",X"7F",X"7F",X"7F",
X"FE",X"FE",X"FE",X"00",X"00",X"EE",X"EE",X"EE",X"F7",X"F7",X"F7",X"07",X"07",X"77",X"77",X"77",
X"31",X"31",X"31",X"31",X"31",X"31",X"31",X"31",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"F0",X"F0",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"80",X"80",X"8F",X"8F",X"8F",X"8F",X"8F",X"8F",
X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",X"5A",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"80",X"80",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"0F",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"0F",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"00",X"77",X"0F",X"0B",X"78",X"7F",X"67",X"30",X"00",X"C2",X"62",X"62",X"62",X"6E",X"6C",X"C0",
X"00",X"33",X"77",X"DD",X"DD",X"77",X"33",X"00",X"00",X"EE",X"EE",X"00",X"00",X"EE",X"EE",X"00",
X"00",X"66",X"FF",X"99",X"99",X"FF",X"FF",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"EE",X"00",
X"00",X"44",X"CC",X"88",X"88",X"FF",X"77",X"00",X"00",X"44",X"66",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"33",X"77",X"CC",X"88",X"FF",X"FF",X"00",X"00",X"88",X"CC",X"66",X"22",X"EE",X"EE",X"00",
X"00",X"88",X"88",X"99",X"99",X"FF",X"FF",X"00",X"00",X"22",X"22",X"22",X"22",X"EE",X"EE",X"00",
X"00",X"88",X"88",X"99",X"99",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"EE",X"EE",X"00",
X"00",X"55",X"DD",X"99",X"88",X"FF",X"77",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"FF",X"FF",X"11",X"11",X"FF",X"FF",X"00",X"00",X"EE",X"EE",X"00",X"00",X"EE",X"EE",X"00",
X"00",X"00",X"88",X"FF",X"FF",X"88",X"00",X"00",X"00",X"00",X"22",X"EE",X"EE",X"22",X"00",X"00",
X"00",X"88",X"FF",X"FF",X"88",X"00",X"00",X"00",X"00",X"00",X"CC",X"EE",X"22",X"66",X"44",X"00",
X"00",X"88",X"CC",X"66",X"33",X"FF",X"FF",X"00",X"00",X"22",X"66",X"CC",X"88",X"EE",X"EE",X"00",
X"00",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"22",X"22",X"22",X"22",X"EE",X"EE",X"00",
X"FF",X"FF",X"66",X"33",X"66",X"FF",X"FF",X"00",X"EE",X"EE",X"00",X"00",X"00",X"EE",X"EE",X"00",
X"00",X"FF",X"FF",X"33",X"77",X"FF",X"FF",X"00",X"00",X"EE",X"EE",X"88",X"00",X"EE",X"EE",X"00",
X"00",X"77",X"FF",X"88",X"88",X"FF",X"77",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"66",X"FF",X"99",X"99",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"EE",X"EE",X"00",
X"00",X"77",X"FF",X"88",X"88",X"FF",X"77",X"00",X"00",X"AA",X"EE",X"66",X"44",X"CC",X"88",X"00",
X"00",X"66",X"FF",X"99",X"99",X"FF",X"FF",X"00",X"00",X"22",X"66",X"CC",X"88",X"EE",X"EE",X"00",
X"00",X"44",X"DD",X"99",X"99",X"FF",X"66",X"00",X"00",X"CC",X"EE",X"22",X"22",X"66",X"44",X"00",
X"00",X"88",X"88",X"FF",X"FF",X"88",X"88",X"00",X"00",X"00",X"00",X"EE",X"EE",X"00",X"00",X"00",
X"00",X"FF",X"FF",X"00",X"00",X"FF",X"FF",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"FF",X"FF",X"00",X"00",X"FF",X"FF",X"00",X"00",X"88",X"CC",X"66",X"66",X"CC",X"88",X"00",
X"FF",X"FF",X"00",X"11",X"00",X"FF",X"FF",X"00",X"EE",X"EE",X"CC",X"88",X"CC",X"EE",X"EE",X"00",
X"00",X"CC",X"EE",X"33",X"33",X"EE",X"CC",X"00",X"00",X"66",X"EE",X"88",X"88",X"EE",X"66",X"00",
X"00",X"EE",X"FF",X"11",X"11",X"FF",X"EE",X"00",X"00",X"00",X"00",X"EE",X"EE",X"00",X"00",X"00",
X"00",X"CC",X"EE",X"BB",X"99",X"88",X"88",X"00",X"00",X"22",X"22",X"22",X"AA",X"EE",X"66",X"00",
X"00",X"00",X"88",X"88",X"FF",X"FF",X"00",X"00",X"00",X"00",X"22",X"22",X"EE",X"EE",X"00",X"00",
X"00",X"99",X"99",X"99",X"77",X"33",X"11",X"11",X"22",X"22",X"22",X"22",X"AA",X"EE",X"66",X"22",
X"00",X"00",X"FF",X"FF",X"88",X"88",X"00",X"00",X"00",X"00",X"EE",X"EE",X"22",X"22",X"00",X"00",
X"00",X"11",X"33",X"77",X"77",X"33",X"11",X"00",X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",
X"11",X"11",X"11",X"11",X"77",X"33",X"11",X"00",X"88",X"88",X"88",X"88",X"EE",X"CC",X"88",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"FF",X"FF",X"00",X"00",X"00",X"00",X"00",X"00",X"22",X"22",X"00",X"00",X"00",
X"00",X"EE",X"EE",X"00",X"00",X"EE",X"EE",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"22",X"FF",X"FF",X"22",X"22",X"FF",X"FF",X"22",X"88",X"EE",X"EE",X"88",X"88",X"EE",X"EE",X"88",
X"00",X"44",X"55",X"DD",X"DD",X"77",X"22",X"00",X"00",X"88",X"CC",X"66",X"66",X"44",X"44",X"00",
X"00",X"CC",X"66",X"33",X"11",X"CC",X"CC",X"00",X"00",X"66",X"66",X"00",X"88",X"CC",X"66",X"00",
X"00",X"44",X"EE",X"BB",X"BB",X"FF",X"44",X"00",X"AA",X"EE",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"88",X"CC",X"66",X"22",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"88",X"CC",X"77",X"33",X"00",X"00",X"00",X"00",X"22",X"66",X"CC",X"88",X"00",X"00",
X"00",X"00",X"33",X"77",X"CC",X"88",X"00",X"00",X"00",X"00",X"88",X"CC",X"66",X"22",X"00",X"00",
X"11",X"55",X"77",X"33",X"33",X"77",X"55",X"11",X"00",X"44",X"CC",X"88",X"88",X"CC",X"44",X"00",
X"00",X"11",X"11",X"77",X"77",X"11",X"11",X"00",X"00",X"00",X"00",X"CC",X"CC",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"66",X"77",X"11",X"00",X"00",
X"00",X"11",X"11",X"11",X"11",X"11",X"11",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"66",X"66",X"00",X"00",X"00",
X"44",X"66",X"33",X"11",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"88",X"CC",X"66",X"22",X"00",
X"00",X"77",X"FF",X"AA",X"99",X"FF",X"77",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"00",X"00",X"FF",X"FF",X"22",X"00",X"00",X"00",X"22",X"22",X"EE",X"EE",X"22",X"22",X"00",
X"00",X"66",X"FF",X"99",X"88",X"CC",X"44",X"00",X"00",X"22",X"22",X"22",X"AA",X"EE",X"66",X"00",
X"00",X"66",X"FF",X"99",X"99",X"CC",X"44",X"00",X"00",X"CC",X"EE",X"22",X"22",X"66",X"44",X"00",
X"00",X"FF",X"FF",X"66",X"22",X"11",X"11",X"00",X"88",X"EE",X"EE",X"88",X"88",X"88",X"88",X"00",
X"00",X"99",X"BB",X"AA",X"AA",X"EE",X"EE",X"00",X"00",X"CC",X"EE",X"22",X"22",X"66",X"44",X"00",
X"00",X"44",X"DD",X"99",X"99",X"FF",X"77",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"CC",X"EE",X"BB",X"99",X"CC",X"CC",X"00",X"00",X"00",X"00",X"EE",X"EE",X"00",X"00",X"00",
X"00",X"66",X"FF",X"99",X"99",X"FF",X"66",X"00",X"00",X"CC",X"EE",X"22",X"22",X"EE",X"CC",X"00",
X"00",X"77",X"FF",X"99",X"99",X"FF",X"66",X"00",X"00",X"CC",X"EE",X"22",X"22",X"66",X"44",X"00",
X"00",X"00",X"00",X"22",X"22",X"00",X"00",X"00",X"00",X"00",X"00",X"44",X"44",X"00",X"00",X"00",
X"00",X"00",X"00",X"22",X"22",X"00",X"00",X"00",X"00",X"00",X"00",X"66",X"77",X"11",X"00",X"00",
X"00",X"88",X"88",X"CC",X"66",X"33",X"11",X"00",X"00",X"22",X"22",X"66",X"CC",X"88",X"00",X"00",
X"00",X"22",X"22",X"22",X"22",X"22",X"22",X"00",X"00",X"88",X"88",X"88",X"88",X"88",X"88",X"00",
X"00",X"11",X"33",X"66",X"CC",X"88",X"88",X"00",X"00",X"00",X"88",X"CC",X"66",X"22",X"22",X"00",
X"00",X"66",X"FF",X"99",X"88",X"CC",X"44",X"00",X"00",X"00",X"00",X"AA",X"AA",X"00",X"00",X"00",
X"00",X"00",X"70",X"D0",X"80",X"D0",X"F0",X"00",X"00",X"00",X"00",X"80",X"80",X"F0",X"F0",X"00",
X"00",X"00",X"60",X"C0",X"C0",X"F0",X"70",X"00",X"00",X"00",X"60",X"30",X"30",X"F0",X"E0",X"00",
X"00",X"00",X"00",X"70",X"90",X"F0",X"F0",X"00",X"00",X"00",X"E0",X"B0",X"10",X"B0",X"F0",X"00",
X"00",X"00",X"10",X"10",X"10",X"10",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"70",X"20",X"00",X"00",X"00",X"00",X"00",X"10",X"F0",X"10",X"00",X"00",X"00",
X"00",X"00",X"00",X"70",X"40",X"40",X"40",X"00",X"00",X"00",X"00",X"90",X"90",X"90",X"F0",X"00",
X"00",X"00",X"00",X"70",X"40",X"40",X"40",X"00",X"00",X"00",X"00",X"F0",X"90",X"90",X"10",X"00",
X"00",X"00",X"00",X"00",X"10",X"00",X"70",X"00",X"00",X"00",X"00",X"80",X"E0",X"80",X"80",X"00",
X"00",X"00",X"00",X"40",X"40",X"40",X"70",X"00",X"00",X"00",X"00",X"F0",X"90",X"90",X"90",X"00",
X"00",X"00",X"00",X"40",X"40",X"40",X"70",X"00",X"00",X"00",X"00",X"F0",X"90",X"90",X"F0",X"00",
X"00",X"00",X"00",X"70",X"40",X"40",X"40",X"00",X"00",X"00",X"00",X"00",X"80",X"70",X"00",X"00",
X"00",X"00",X"00",X"70",X"40",X"40",X"70",X"00",X"00",X"00",X"00",X"F0",X"90",X"90",X"F0",X"00",
X"00",X"00",X"00",X"70",X"40",X"40",X"70",X"00",X"00",X"00",X"00",X"F0",X"80",X"80",X"80",X"00",
X"00",X"00",X"00",X"00",X"00",X"F0",X"40",X"00",X"00",X"00",X"00",X"10",X"F0",X"F0",X"10",X"00",
X"00",X"00",X"F0",X"90",X"90",X"F0",X"00",X"00",X"00",X"F0",X"F0",X"00",X"00",X"00",X"00",X"00",
X"00",X"10",X"F0",X"90",X"90",X"F0",X"10",X"00",X"F0",X"F0",X"10",X"10",X"10",X"10",X"F0",X"00",
X"33",X"44",X"88",X"8A",X"8A",X"89",X"44",X"33",X"CC",X"22",X"11",X"15",X"15",X"19",X"22",X"CC",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",
X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF",X"FF");
begin
process(clk)
begin
if rising_edge(clk) then
data <= rom_data(to_integer(unsigned(addr)));
end if;
end process;
end architecture;

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/time_pilot_mist.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_mist.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/time_pilot_palette_blue_green.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_palette_blue_green.vhd
View File

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/time_pilot_palette_green_red.vhd → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_palette_green_red.vhd
View File

1558
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_prog.vhd Normal file
View File

File diff suppressed because it is too large Load Diff

426
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_sound_board.vhd Normal file
View File

@@ -0,0 +1,426 @@
---------------------------------------------------------------------------------
-- Time pilot sound board by Dar (darfpga@aol.fr) (29/10/2017)
-- http://darfpga.blogspot.fr
---------------------------------------------------------------------------------
-- gen_ram.vhd
--------------------------------
-- Copyright 2005-2008 by Peter Wendrich (pwsoft@syntiac.com)
-- http://www.syntiac.com/fpga64.html
---------------------------------------------------------------------------------
-- T80/T80se - Version : 0247
-----------------------------
-- Z80 compatible microprocessor core
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
---------------------------------------------------------------------------------
-- YM2149 (AY-3-8910)
-- Copyright (c) MikeJ - Jan 2005
---------------------------------------------------------------------------------
-- Educational use only
-- Do not redistribute synthetized file with roms
-- Do not redistribute roms whatever the form
-- Use at your own risk
---------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity time_pilot_sound_board is
port(
clock_14 : in std_logic;
reset : in std_logic;
sound_cmd : in std_logic_vector(7 downto 0);
sound_trig : in std_logic;
audio_out : out std_logic_vector(10 downto 0);
dbg_cpu_addr : out std_logic_vector(15 downto 0)
);
end time_pilot_sound_board;
architecture struct of time_pilot_sound_board is
signal reset_n: std_logic;
signal clock_14n : std_logic;
signal clock_div1 : std_logic_vector(11 downto 0) := (others => '0');
signal biquinary_div : std_logic_vector(3 downto 0) := (others => '0');
signal cpu_clock : std_logic;
signal ayx_clock : std_logic;
signal cpu_addr : std_logic_vector(15 downto 0);
signal cpu_di : std_logic_vector( 7 downto 0);
signal cpu_do : std_logic_vector( 7 downto 0);
signal cpu_wr_n : std_logic;
signal cpu_mreq_n : std_logic;
signal cpu_irq_n : std_logic;
signal cpu_iorq_n : std_logic;
signal cpu_m1_n : std_logic;
signal cpu_rom_do : std_logic_vector( 7 downto 0);
signal wram_do : std_logic_vector( 7 downto 0);
signal wram_we : std_logic;
signal clr_irq_n : std_logic;
signal sen1_n : std_logic;
signal sen2_n : std_logic;
signal sen3_n : std_logic;
signal sen4_n : std_logic;
signal sound_trig_r : std_logic;
signal ay1_do : std_logic_vector(7 downto 0);
signal ay1_cs_n : std_logic;
signal ay1_bdir : std_logic;
signal ay1_bc1 : std_logic;
signal ay1_audio_muxed : std_logic_vector(7 downto 0);
signal ay1_audio_chan : std_logic_vector(1 downto 0);
signal ay1_port_b_di : std_logic_vector(7 downto 0);
signal ay2_do : std_logic_vector(7 downto 0);
signal ay2_cs_n : std_logic;
signal ay2_bdir : std_logic;
signal ay2_bc1 : std_logic;
signal ay2_audio_muxed : std_logic_vector(7 downto 0);
signal ay2_audio_chan : std_logic_vector(1 downto 0);
signal ay1_chan_a : std_logic_vector(7 downto 0);
signal ay1_chan_b : std_logic_vector(7 downto 0);
signal ay1_chan_c : std_logic_vector(7 downto 0);
signal ay2_chan_a : std_logic_vector(7 downto 0);
signal ay2_chan_b : std_logic_vector(7 downto 0);
signal ay2_chan_c : std_logic_vector(7 downto 0);
signal filter_cmd_we : std_logic;
signal filter_cmd : std_logic_vector(11 downto 0);
signal mult_cmd : std_logic_vector(1 downto 0);
signal mult_value : integer range 0 to 779;
signal Vc_1a : integer range -256*1024 to 256*1024-1;
signal Vc_1b : integer range -256*1024 to 256*1024-1;
signal Vc_1c : integer range -256*1024 to 256*1024-1;
signal Vc_2a : integer range -256*1024 to 256*1024-1;
signal Vc_2b : integer range -256*1024 to 256*1024-1;
signal Vc_2c : integer range -256*1024 to 256*1024-1;
signal Vc : integer range -256*1024 to 256*1024-1;
signal Vin : integer range -256 to 255;
signal dV : integer range -512 to 511;
signal Vcn_a : integer range -1024*1024 to 1024*1024-1;
signal Vcn_b : integer range -1024*1024 to 1024*1024-1;
signal Vcn_c : integer range -256*1024 to 256*1024-1;
begin
clock_14n <= not clock_14;
reset_n <= not reset;
-- debug
process (reset, clock_14)
begin
if rising_edge(clock_14) and cpu_mreq_n ='0' then
dbg_cpu_addr <= cpu_addr;
end if;
end process;
--------------------------------------------------------
-- RC filters equation
--
-- Vc : capacitor voltage = output voltage
-- fs : sample frequency
-- Vin : voltage at resistor input
--
-- Vc(k+1) = Vc(k) + (Vin-Vc(k))/(fs.R.C)
--
-- Vcn * 1024 <= Vcn * 1024 + (Vin-Vc) * 1024/(fs.R.C)
-- With Vcn = 1024 * Vc
--------------------------------------------------------
-- Filters will be run at 14.318MHz/512 = 27.96KHz
--------------------------------------------------------
-- 6 filters have to be implemented
-- RC equation is time multiplexed to save multiplier
-- for small FPGA
--------------------------------------------------------
-- mux Vc
with clock_div1(3 downto 0) select
Vc <= Vc_1a when X"0", -- Vc_xy : [0..255*1024]
Vc_1b when X"1", -- => Vc : [-256*1024..255*1024]
Vc_1c when X"2",
Vc_2a when X"3",
Vc_2b when X"4",
Vc_2c when others;
-- mux Vin
with clock_div1(3 downto 0) select
Vin <= to_integer(unsigned(ay1_chan_a)) when X"0", -- ayx_chan_y : [0..255]
to_integer(unsigned(ay1_chan_b)) when X"1", -- => Vin : [-256:255]
to_integer(unsigned(ay1_chan_c)) when X"2",
to_integer(unsigned(ay2_chan_a)) when X"3",
to_integer(unsigned(ay2_chan_b)) when X"4",
to_integer(unsigned(ay2_chan_c)) when others;
-- compute dV
dV <= Vin-Vc/1024; -- Vc/1024 : [0..255], dv : [-255..511] => [-512..511]
-- mux filter cmd
with clock_div1(3 downto 0) select
mult_cmd <= filter_cmd( 7 downto 6) when X"0",
filter_cmd( 9 downto 8) when X"1",
filter_cmd(11 downto 10) when X"2",
filter_cmd( 1 downto 0) when X"3",
filter_cmd( 3 downto 2) when X"4",
filter_cmd( 5 downto 4) when others;
-- mux multiplier value
with mult_cmd select
mult_value <= 779 when "10", -- 0.047uF/1KOhm => (1024/fs.R.C = 779, cut fcy 3386Hz)
166 when "01", -- 0.220uF/1KOhm => (1024/fs.R.C = 166, cut fcy 723Hz)
137 when "11", -- 0.267uF/1KOhm => (1024/fs.R.C = 137, cut fcy 596Hz)
779 when others; -- Not use
-- compute Vcn
Vcn_a <= Vin*1024 when mult_cmd = "00" else Vc + dv*mult_value; -- => Vcn_a : [-1024*1024..1023*1024]
-- limit to > 0
Vcn_b <= 0 when Vcn_a < 0 else Vcn_a;
-- limit to < 255*1024
Vcn_c <= 255*1024 when Vcn_b > 255*1024 else Vcn_b;
-- demux/store result and mix channels
process (clock_14)
begin
if rising_edge(clock_14) then -- 14.318MHz/512 => fs = 27.96KHz
-- demux & down sample
if clock_div1(8 downto 0) = '0'&X"00" then Vc_1a <= Vcn_c; end if;
if clock_div1(8 downto 0) = '0'&X"01" then Vc_1b <= Vcn_c; end if;
if clock_div1(8 downto 0) = '0'&X"02" then Vc_1c <= Vcn_c; end if;
if clock_div1(8 downto 0) = '0'&X"03" then Vc_2a <= Vcn_c; end if;
if clock_div1(8 downto 0) = '0'&X"04" then Vc_2b <= Vcn_c; end if;
if clock_div1(8 downto 0) = '0'&X"05" then Vc_2c <= Vcn_c; end if;
-- rescale and mix channels with down sample
if clock_div1(8 downto 0) = '0'&X"06" then
audio_out <= std_logic_vector(to_unsigned(Vc_1a/1024,11)) +
std_logic_vector(to_unsigned(Vc_1b/1024,11)) +
std_logic_vector(to_unsigned(Vc_1c/1024,11)) +
std_logic_vector(to_unsigned(Vc_2a/1024,11)) +
std_logic_vector(to_unsigned(Vc_2b/1024,11)) +
std_logic_vector(to_unsigned(Vc_2c/1024,11));
end if;
end if;
end process;
-- divide clocks
-- random generator ?
process (clock_14)
begin
if reset='1' then
clock_div1 <= (others =>'0');
biquinary_div <= (others =>'0');
else
if rising_edge(clock_14) then
clock_div1 <= clock_div1 + '1';
if clock_div1 = X"800" then
if biquinary_div(3 downto 1) = "100" then
biquinary_div(3 downto 1) <= "000";
biquinary_div(0) <= not biquinary_div(0);
else
biquinary_div(3 downto 1) <= biquinary_div(3 downto 1) + '1';
end if;
end if;
end if;
end if;
end process;
-- make clocks for cpu and sound generators
cpu_clock <= clock_div1(2);
ayx_clock <= not clock_div1(2);
-- mux rom/ram/devices data ouput to cpu data input w.r.t cpu address
cpu_di <= cpu_rom_do when cpu_addr(15 downto 12) = "0000" else -- 0000-0FFF
wram_do when cpu_addr(15 downto 12) = "0011" else -- 3000-3FFF
ay1_do when cpu_addr(15 downto 13) = "010" else -- 4000-5FFF
ay2_do when cpu_addr(15 downto 13) = "011" else -- 6000-7FFF
X"FF";
-- write enable to working ram and filter command register
wram_we <= '1' when cpu_wr_n = '0' and cpu_addr(15 downto 12) = "0011" else '0';
filter_cmd_we <= '1' when cpu_wr_n = '0' and cpu_addr(15) = '1' else '0';
-- chip select with r/w direction to AY chips
sen1_n <= '0' when cpu_mreq_n = '0' and cpu_addr(15 downto 12) = X"4" else '1';
sen2_n <= '0' when cpu_mreq_n = '0' and cpu_addr(15 downto 12) = X"5" else '1';
sen3_n <= '0' when cpu_mreq_n = '0' and cpu_addr(15 downto 12) = X"6" else '1';
sen4_n <= '0' when cpu_mreq_n = '0' and cpu_addr(15 downto 12) = X"7" else '1';
-- finalise AY r/w & address controls
ay1_bc1 <= not sen2_n or ( cpu_wr_n and not sen1_n);
ay1_bdir <= not sen2_n or (not cpu_wr_n and not sen1_n);
ay1_cs_n <= sen1_n and sen2_n;
ay2_bc1 <= not sen4_n or ( cpu_wr_n and not sen3_n);
ay2_bdir <= not sen4_n or (not cpu_wr_n and not sen3_n);
ay2_cs_n <= sen3_n and sen4_n;
-- input random (?) to AY1 chip
ay1_port_b_di <= biquinary_div(0)&biquinary_div(3)&biquinary_div(2)&clock_div1(11)&"0000";
-- clear irq when reset and irq acknowledge
clr_irq_n <= reset_n and (cpu_m1_n or cpu_iorq_n);
-- regsiter filters commands (11 bits data are cpu address)
process (cpu_clock)
begin
if rising_edge(cpu_clock) then
if filter_cmd_we = '1' then filter_cmd <= cpu_addr(11 downto 0); end if;
end if;
end process;
-- latch sound trigger rising edge to set cpu_irq, and manage clear
process (clock_14)
begin
if rising_edge(clock_14) then
sound_trig_r <= sound_trig;
if clr_irq_n = '0' then
cpu_irq_n <= '1';
else
if sound_trig ='1' and sound_trig_r = '0' then
cpu_irq_n <= '0';
end if;
end if;
end if;
end process;
-- demux AY chips output
process (ayx_clock)
begin
if rising_edge(ayx_clock) then
if ay1_audio_chan = "00" then ay1_chan_a <= ay1_audio_muxed; end if;
if ay1_audio_chan = "01" then ay1_chan_b <= ay1_audio_muxed; end if;
if ay1_audio_chan = "10" then ay1_chan_c <= ay1_audio_muxed; end if;
if ay2_audio_chan = "00" then ay2_chan_a <= ay2_audio_muxed; end if;
if ay2_audio_chan = "01" then ay2_chan_b <= ay2_audio_muxed; end if;
if ay2_audio_chan = "10" then ay2_chan_c <= ay2_audio_muxed; end if;
end if;
end process;
-- microprocessor Z80
cpu : entity work.T80se
generic map(Mode => 0, T2Write => 1, IOWait => 1)
port map(
RESET_n => reset_n,
CLK_n => cpu_clock,
CLKEN => '1',
WAIT_n => '1',
INT_n => cpu_irq_n,
NMI_n => '1',
BUSRQ_n => '1',
M1_n => cpu_m1_n,
MREQ_n => cpu_mreq_n,
IORQ_n => cpu_iorq_n,
RD_n => open,
WR_n => cpu_wr_n,
RFSH_n => open,
HALT_n => open,
BUSAK_n => open,
A => cpu_addr,
DI => cpu_di,
DO => cpu_do
);
-- cpu1 program ROM
rom_cpu1 : entity work.time_pilot_sound_prog2
port map(
clk => clock_14n,
addr => cpu_addr(11 downto 0),
data => cpu_rom_do
);
-- working RAM
wram : entity work.gen_ram
generic map( dWidth => 8, aWidth => 10)
port map(
clk => clock_14n,
we => wram_we,
addr => cpu_addr(9 downto 0),
d => cpu_do,
q => wram_do
);
-- AY-3-8910 #1
ay_3_8910_1 : entity work.YM2149
port map(
-- data bus
I_DA => cpu_do, -- in std_logic_vector(7 downto 0);
O_DA => ay1_do, -- out std_logic_vector(7 downto 0);
O_DA_OE_L => open, -- out std_logic;
-- control
I_A9_L => ay1_cs_n, -- in std_logic;
I_A8 => '1', -- in std_logic;
I_BDIR => ay1_bdir, -- in std_logic;
I_BC2 => '1', -- in std_logic;
I_BC1 => ay1_bc1, -- in std_logic;
I_SEL_L => '1', -- in std_logic;
O_AUDIO => ay1_audio_muxed, -- out std_logic_vector(7 downto 0);
O_CHAN => ay1_audio_chan, -- out std_logic_vector(1 downto 0);
-- port a
I_IOA => sound_cmd, -- in std_logic_vector(7 downto 0);
O_IOA => open, -- out std_logic_vector(7 downto 0);
O_IOA_OE_L => open, -- out std_logic;
-- port b
I_IOB => ay1_port_b_di, -- in std_logic_vector(7 downto 0);
O_IOB => open, -- out std_logic_vector(7 downto 0);
O_IOB_OE_L => open, -- out std_logic;
ENA => '1', --cpu_ena, -- in std_logic; -- clock enable for higher speed operation
RESET_L => reset_n, -- in std_logic;
CLK => ayx_clock -- in std_logic -- note 6 Mhz
);
-- AY-3-8910 #2
ay_3_8910_2 : entity work.YM2149
port map(
-- data bus
I_DA => cpu_do, -- in std_logic_vector(7 downto 0);
O_DA => ay2_do, -- out std_logic_vector(7 downto 0);
O_DA_OE_L => open, -- out std_logic;
-- control
I_A9_L => ay2_cs_n, -- in std_logic;
I_A8 => '1', -- in std_logic;
I_BDIR => ay2_bdir, -- in std_logic;
I_BC2 => '1', -- in std_logic;
I_BC1 => ay2_bc1, -- in std_logic;
I_SEL_L => '1', -- in std_logic;
O_AUDIO => ay2_audio_muxed, -- out std_logic_vector(7 downto 0);
O_CHAN => ay2_audio_chan, -- out std_logic_vector(1 downto 0);
-- port a
I_IOA => (others => '0'), -- in std_logic_vector(7 downto 0);
O_IOA => open, -- out std_logic_vector(7 downto 0);
O_IOA_OE_L => open, -- out std_logic;
-- port b
I_IOB => (others => '0'), -- in std_logic_vector(7 downto 0);
O_IOB => open, -- out std_logic_vector(7 downto 0);
O_IOB_OE_L => open, -- out std_logic;
ENA => '1', --cpu_ena, -- in std_logic; -- clock enable for higher speed operation
RESET_L => reset_n, -- in std_logic;
CLK => ayx_clock -- in std_logic -- note 6 Mhz
);
end struct;

327
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_sound_prog.vhd Normal file
View File

@@ -0,0 +1,327 @@
library ieee;
use ieee.std_logic_1164.all,ieee.numeric_std.all;
entity time_pilot_sound_prog2 is
port (
clk : in std_logic;
addr : in std_logic_vector(12 downto 0);
data : out std_logic_vector(7 downto 0)
);
end entity;
architecture prom of time_pilot_sound_prog2 is
type rom is array(0 to 4095) of std_logic_vector(7 downto 0);
signal rom_data: rom := (
X"21",X"00",X"30",X"06",X"00",X"C3",X"7C",X"01",X"32",X"00",X"50",X"3A",X"00",X"40",X"C9",X"FF",
X"32",X"00",X"70",X"3A",X"00",X"60",X"C9",X"FF",X"78",X"CF",X"79",X"32",X"00",X"40",X"C9",X"FF",
X"78",X"D7",X"79",X"32",X"00",X"60",X"C9",X"FF",X"87",X"85",X"6F",X"7C",X"CE",X"00",X"67",X"7E",
X"23",X"66",X"6F",X"E9",X"FF",X"FF",X"FF",X"FF",X"D9",X"08",X"CD",X"40",X"00",X"08",X"D9",X"C9",
X"3E",X"0E",X"CF",X"B7",X"28",X"26",X"32",X"0B",X"30",X"CD",X"2D",X"01",X"3A",X"0B",X"30",X"CB",
X"77",X"20",X"3F",X"3A",X"06",X"30",X"B7",X"3A",X"0B",X"30",X"C2",X"E6",X"00",X"21",X"06",X"30",
X"36",X"00",X"B7",X"F2",X"FE",X"00",X"CB",X"BF",X"CD",X"89",X"00",X"C9",X"21",X"00",X"30",X"06",
X"04",X"AF",X"77",X"23",X"10",X"FC",X"C9",X"21",X"00",X"30",X"06",X"02",X"0E",X"03",X"BE",X"28",
X"05",X"23",X"23",X"10",X"F9",X"41",X"79",X"90",X"C9",X"CD",X"77",X"00",X"C8",X"AF",X"77",X"23",
X"77",X"C9",X"3A",X"06",X"30",X"B7",X"20",X"27",X"3A",X"09",X"30",X"2A",X"07",X"30",X"BD",X"D8",
X"BC",X"D8",X"3E",X"FF",X"32",X"06",X"30",X"06",X"00",X"21",X"00",X"30",X"3A",X"0B",X"30",X"77",
X"23",X"70",X"23",X"70",X"23",X"70",X"3E",X"01",X"32",X"04",X"30",X"CD",X"BE",X"02",X"C9",X"3A",
X"0B",X"30",X"CB",X"B7",X"CD",X"77",X"00",X"28",X"04",X"23",X"36",X"00",X"C9",X"3A",X"09",X"30",
X"47",X"3A",X"07",X"30",X"B8",X"D0",X"21",X"00",X"30",X"3A",X"0B",X"30",X"77",X"23",X"36",X"00",
X"3E",X"FF",X"32",X"06",X"30",X"C9",X"3A",X"09",X"30",X"47",X"3A",X"07",X"30",X"B8",X"D0",X"AF",
X"32",X"06",X"30",X"3A",X"0B",X"30",X"21",X"00",X"30",X"77",X"23",X"36",X"00",X"C9",X"32",X"0B",
X"30",X"CD",X"77",X"00",X"28",X"04",X"23",X"36",X"00",X"C9",X"AF",X"CD",X"77",X"00",X"28",X"08",
X"3A",X"0B",X"30",X"77",X"23",X"36",X"00",X"C9",X"CD",X"2D",X"01",X"21",X"00",X"30",X"B7",X"C8",
X"3D",X"87",X"4F",X"06",X"00",X"09",X"3A",X"0B",X"30",X"77",X"23",X"70",X"C9",X"3A",X"00",X"30",
X"CD",X"4F",X"01",X"32",X"07",X"30",X"3A",X"02",X"30",X"CD",X"4F",X"01",X"32",X"08",X"30",X"3A",
X"0B",X"30",X"CD",X"4F",X"01",X"32",X"09",X"30",X"CD",X"61",X"01",X"32",X"0A",X"30",X"C9",X"21",
X"AD",X"05",X"CB",X"77",X"28",X"05",X"CB",X"B7",X"21",X"AD",X"05",X"06",X"00",X"4F",X"09",X"7E",
X"C9",X"2A",X"07",X"30",X"7C",X"BD",X"38",X"09",X"3A",X"09",X"30",X"BD",X"38",X"0C",X"3E",X"01",
X"C9",X"3A",X"09",X"30",X"BC",X"38",X"03",X"3E",X"02",X"C9",X"AF",X"C9",X"70",X"23",X"7C",X"FE",
X"34",X"20",X"F9",X"F9",X"ED",X"56",X"21",X"00",X"80",X"22",X"0C",X"30",X"77",X"01",X"3F",X"07",
X"DF",X"E7",X"32",X"0E",X"30",X"32",X"0F",X"30",X"CD",X"A2",X"02",X"CD",X"A6",X"02",X"CD",X"AA",
X"02",X"CD",X"B0",X"02",X"CD",X"B4",X"02",X"CD",X"B8",X"02",X"3A",X"06",X"30",X"B7",X"28",X"06",
X"FB",X"00",X"00",X"F3",X"18",X"0F",X"FB",X"3E",X"0F",X"CF",X"E6",X"40",X"20",X"F9",X"3E",X"0F",
X"CF",X"E6",X"40",X"28",X"F9",X"F3",X"3A",X"06",X"30",X"B7",X"20",X"2E",X"3E",X"00",X"32",X"04",
X"30",X"3A",X"01",X"30",X"B7",X"3A",X"00",X"30",X"28",X"05",X"CD",X"85",X"02",X"18",X"03",X"CD",
X"68",X"02",X"3E",X"01",X"32",X"04",X"30",X"3A",X"03",X"30",X"B7",X"3A",X"02",X"30",X"28",X"05",
X"CD",X"85",X"02",X"18",X"B5",X"CD",X"68",X"02",X"18",X"B0",X"3E",X"00",X"32",X"04",X"30",X"3A",
X"01",X"30",X"B7",X"3A",X"00",X"30",X"28",X"05",X"CD",X"3C",X"02",X"18",X"9D",X"CD",X"12",X"02",
X"18",X"98",X"CB",X"B7",X"32",X"00",X"30",X"CD",X"BE",X"02",X"3A",X"00",X"30",X"21",X"F9",X"04",
X"EF",X"B7",X"20",X"6B",X"21",X"01",X"30",X"36",X"01",X"11",X"53",X"05",X"3A",X"00",X"30",X"6F",
X"26",X"00",X"29",X"19",X"5E",X"23",X"56",X"ED",X"53",X"10",X"30",X"C9",X"B7",X"C8",X"2A",X"10",
X"30",X"CD",X"33",X"00",X"B7",X"C8",X"21",X"00",X"30",X"3D",X"28",X"06",X"36",X"00",X"AF",X"32",
X"06",X"30",X"23",X"36",X"00",X"C9",X"B7",X"C8",X"E6",X"03",X"C5",X"47",X"3A",X"04",X"30",X"4F",
X"87",X"81",X"80",X"32",X"05",X"30",X"C1",X"C9",X"F5",X"CD",X"BE",X"02",X"F1",X"E6",X"3F",X"21",
X"F9",X"04",X"EF",X"B7",X"C2",X"8F",X"02",X"21",X"01",X"30",X"3A",X"04",X"30",X"87",X"5F",X"16",
X"00",X"19",X"36",X"01",X"C9",X"B7",X"C8",X"E6",X"3F",X"21",X"53",X"05",X"EF",X"B7",X"C8",X"57",
X"21",X"00",X"30",X"3A",X"04",X"30",X"4F",X"06",X"00",X"09",X"09",X"15",X"28",X"01",X"70",X"23",
X"70",X"C9",X"06",X"08",X"18",X"06",X"06",X"09",X"18",X"02",X"06",X"0A",X"0E",X"00",X"DF",X"C9",
X"06",X"08",X"18",X"06",X"06",X"09",X"18",X"02",X"06",X"0A",X"0E",X"00",X"E7",X"C9",X"01",X"00",
X"08",X"3A",X"04",X"30",X"B7",X"20",X"0C",X"DF",X"04",X"DF",X"04",X"DF",X"0E",X"3F",X"CD",X"2D",
X"03",X"AF",X"C9",X"E7",X"04",X"E7",X"04",X"E7",X"0E",X"3F",X"CD",X"39",X"03",X"AF",X"C9",X"CD",
X"56",X"02",X"3A",X"05",X"30",X"3D",X"21",X"EB",X"02",X"EF",X"C9",X"F7",X"02",X"00",X"03",X"09",
X"03",X"12",X"03",X"1B",X"03",X"24",X"03",X"CD",X"A2",X"02",X"0E",X"09",X"CD",X"2D",X"03",X"C9",
X"CD",X"A6",X"02",X"0E",X"12",X"CD",X"2D",X"03",X"C9",X"CD",X"AA",X"02",X"0E",X"24",X"CD",X"2D",
X"03",X"C9",X"CD",X"B0",X"02",X"0E",X"09",X"CD",X"39",X"03",X"C9",X"CD",X"B4",X"02",X"0E",X"12",
X"CD",X"39",X"03",X"C9",X"CD",X"B8",X"02",X"0E",X"24",X"CD",X"39",X"03",X"C9",X"3A",X"0E",X"30",
X"B1",X"32",X"0E",X"30",X"06",X"07",X"4F",X"DF",X"C9",X"3A",X"0F",X"30",X"B1",X"32",X"0F",X"30",
X"06",X"07",X"4F",X"E7",X"C9",X"06",X"06",X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",
X"C9",X"06",X"06",X"3A",X"04",X"30",X"B7",X"20",X"04",X"78",X"CF",X"4F",X"C9",X"78",X"D7",X"4F",
X"C9",X"3A",X"0E",X"30",X"A0",X"B1",X"32",X"0E",X"30",X"4F",X"06",X"07",X"DF",X"C9",X"3A",X"0F",
X"30",X"A0",X"B1",X"32",X"0F",X"30",X"4F",X"06",X"07",X"E7",X"C9",X"21",X"91",X"03",X"3D",X"87",
X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",X"B7",X"28",X"D2",X"18",
X"DD",X"08",X"FE",X"10",X"FD",X"20",X"FB",X"21",X"AD",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",
X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",X"B7",X"28",X"B6",X"18",X"C1",X"01",X"F7",X"02",
X"EF",X"04",X"DF",X"21",X"C9",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",
X"42",X"3A",X"04",X"30",X"B7",X"28",X"9A",X"18",X"A5",X"00",X"F6",X"00",X"ED",X"00",X"DB",X"21",
X"E7",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",
X"B7",X"CA",X"61",X"03",X"C3",X"6E",X"03",X"09",X"FF",X"12",X"FF",X"24",X"FF",X"C6",X"07",X"47",
X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",X"C9",X"C6",X"07",X"47",X"3A",X"04",X"30",
X"B7",X"78",X"20",X"02",X"CF",X"C9",X"D7",X"C9",X"3D",X"87",X"47",X"4D",X"3A",X"04",X"30",X"B7",
X"20",X"05",X"DF",X"4C",X"04",X"DF",X"C9",X"E7",X"4C",X"04",X"E7",X"C9",X"3D",X"87",X"67",X"3A",
X"04",X"30",X"B7",X"7C",X"20",X"07",X"CF",X"6F",X"7C",X"3C",X"CF",X"67",X"C9",X"D7",X"6F",X"7C",
X"3C",X"D7",X"67",X"C9",X"CD",X"56",X"02",X"7D",X"FE",X"04",X"D0",X"F5",X"21",X"83",X"04",X"3A",
X"05",X"30",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"2A",X"0C",X"30",X"7B",X"A5",
X"6F",X"7A",X"A4",X"67",X"22",X"0C",X"30",X"F1",X"B7",X"20",X"02",X"77",X"C9",X"21",X"83",X"04",
X"87",X"87",X"4F",X"87",X"81",X"4F",X"06",X"00",X"09",X"3A",X"05",X"30",X"3D",X"87",X"5F",X"16",
X"00",X"19",X"5E",X"23",X"56",X"2A",X"0C",X"30",X"7B",X"B5",X"6F",X"7A",X"B4",X"67",X"22",X"0C",
X"30",X"77",X"C9",X"3F",X"FF",X"FF",X"FC",X"FF",X"F3",X"FC",X"FF",X"F3",X"FF",X"CF",X"FF",X"80",
X"00",X"00",X"02",X"00",X"08",X"02",X"00",X"08",X"00",X"20",X"00",X"40",X"00",X"00",X"01",X"00",
X"04",X"01",X"00",X"04",X"00",X"10",X"00",X"C0",X"00",X"00",X"03",X"00",X"0C",X"03",X"00",X"0C",
X"00",X"30",X"00",X"0E",X"10",X"C6",X"07",X"47",X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",
X"E7",X"C9",X"06",X"0B",X"4D",X"3A",X"04",X"30",X"B7",X"20",X"05",X"DF",X"04",X"4C",X"DF",X"C9",
X"E7",X"04",X"4C",X"E7",X"C9",X"3A",X"04",X"30",X"B7",X"3E",X"0B",X"47",X"20",X"07",X"CF",X"6F",
X"78",X"3C",X"CF",X"67",X"C9",X"D7",X"6F",X"78",X"3C",X"D7",X"67",X"C9",X"4F",X"06",X"0D",X"3A",
X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",X"C9",X"BE",X"02",X"B0",X"0F",X"7D",X"0F",X"8E",
X"0F",X"5A",X"10",X"F4",X"0F",X"DA",X"05",X"08",X"17",X"DA",X"05",X"82",X"1B",X"99",X"16",X"D2",
X"0F",X"2F",X"16",X"76",X"17",X"DA",X"05",X"27",X"1B",X"B6",X"1D",X"DA",X"05",X"9D",X"1C",X"DA",
X"05",X"DA",X"05",X"2A",X"1C",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"05",
X"10",X"16",X"10",X"9F",X"0F",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"27",X"10",X"38",X"10",X"49",
X"10",X"DA",X"05",X"C1",X"0F",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",
X"05",X"48",X"1D",X"00",X"00",X"BD",X"0F",X"8A",X"0F",X"9B",X"0F",X"67",X"10",X"01",X"10",X"DD",
X"05",X"3B",X"17",X"DD",X"05",X"BE",X"1B",X"CB",X"16",X"DF",X"0F",X"62",X"16",X"8E",X"17",X"DD",
X"05",X"44",X"1B",X"F0",X"1D",X"DD",X"05",X"D5",X"1C",X"DD",X"05",X"DD",X"05",X"55",X"1C",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"12",X"10",X"23",X"10",X"AC",X"0F",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"34",X"10",X"45",X"10",X"56",X"10",X"DD",X"05",X"CE",X"0F",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"6F",X"1D",X"00",X"98",X"A0",
X"A8",X"D8",X"60",X"00",X"EC",X"00",X"B0",X"78",X"F0",X"C0",X"E8",X"00",X"B2",X"00",X"00",X"E0",
X"00",X"00",X"88",X"00",X"00",X"00",X"00",X"00",X"70",X"68",X"B8",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"D0",X"00",X"00",X"00",X"00",X"00",X"00",X"C8",X"3E",X"00",X"C9",X"3E",X"FF",X"C9",
X"DD",X"7E",X"00",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"01",X"CD",X"4C",X"06",X"AF",X"C9",X"DD",
X"7E",X"00",X"FE",X"FF",X"28",X"09",X"DD",X"36",X"09",X"02",X"CD",X"4C",X"06",X"AF",X"C9",X"0E",
X"00",X"3E",X"02",X"CD",X"ED",X"03",X"3E",X"FF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",
X"DD",X"36",X"09",X"03",X"CD",X"4C",X"06",X"AF",X"C9",X"0E",X"00",X"3E",X"03",X"CD",X"ED",X"03",
X"3E",X"FF",X"C9",X"DD",X"7E",X"0A",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"04",X"CD",X"72",X"07",
X"AF",X"C9",X"DD",X"7E",X"0A",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"05",X"CD",X"72",X"07",X"AF",
X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"C8",X"CD",X"3E",X"08",X"AF",X"C9",X"DD",X"35",X"01",X"C0",
X"3A",X"48",X"30",X"DD",X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"6F",X"06",X"DD",X"7E",X"07",
X"D6",X"01",X"FA",X"6F",X"06",X"DD",X"77",X"07",X"4F",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"DD",
X"35",X"00",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"37",X"07",
X"FE",X"1F",X"C2",X"45",X"07",X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",
X"0F",X"0F",X"0F",X"4F",X"06",X"00",X"21",X"9F",X"06",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"AF",
X"06",X"E5",X"06",X"07",X"07",X"FB",X"06",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"DD",
X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",
X"56",X"ED",X"53",X"44",X"30",X"DD",X"73",X"04",X"DD",X"72",X"05",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",X"60",X"09",X"09",X"5E",X"23",X"56",X"DD",X"73",X"0B",
X"DD",X"72",X"0C",X"18",X"35",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",
X"0A",X"09",X"7E",X"32",X"48",X"30",X"DD",X"77",X"01",X"18",X"1F",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"7E",X"DD",X"77",X"08",X"18",X"13",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",
X"06",X"DD",X"77",X"07",X"DD",X"77",X"0D",X"DD",X"77",X"0E",X"DD",X"6E",X"02",X"DD",X"66",X"03",
X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"C3",X"73",X"06",X"DD",X"7E",X"09",X"0E",X"00",X"CD",
X"ED",X"03",X"DD",X"36",X"00",X"FF",X"C9",X"CD",X"02",X"09",X"DD",X"7E",X"09",X"0E",X"00",X"CD",
X"ED",X"03",X"C3",X"26",X"09",X"C5",X"CD",X"02",X"09",X"C1",X"78",X"E6",X"1F",X"3D",X"07",X"4F",
X"06",X"00",X"DD",X"6E",X"04",X"DD",X"66",X"05",X"09",X"5E",X"23",X"56",X"EB",X"DD",X"7E",X"09",
X"CD",X"08",X"04",X"DD",X"4E",X"06",X"DD",X"71",X"07",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"C3",
X"26",X"09",X"DD",X"35",X"0F",X"C0",X"3A",X"48",X"30",X"DD",X"77",X"0F",X"DD",X"CB",X"0A",X"46",
X"C2",X"A5",X"07",X"DD",X"7E",X"0E",X"D6",X"01",X"FA",X"A5",X"07",X"DD",X"77",X"0E",X"DD",X"7E",
X"09",X"FE",X"04",X"28",X"08",X"DD",X"4E",X"0E",X"3E",X"02",X"CD",X"ED",X"03",X"DD",X"4E",X"0E",
X"3E",X"03",X"CD",X"ED",X"03",X"DD",X"35",X"0A",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"2B",
X"7E",X"47",X"E6",X"1F",X"28",X"1E",X"FE",X"1F",X"20",X"33",X"DD",X"7E",X"09",X"FE",X"04",X"28",
X"07",X"3E",X"02",X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",X"CD",X"ED",X"03",X"DD",
X"36",X"0A",X"FF",X"C9",X"CD",X"14",X"09",X"DD",X"7E",X"09",X"FE",X"04",X"28",X"07",X"3E",X"02",
X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",X"CD",X"ED",X"03",X"C9",X"C5",X"CD",X"14",
X"09",X"C1",X"78",X"E6",X"1F",X"3D",X"07",X"4F",X"06",X"00",X"DD",X"7E",X"09",X"FE",X"04",X"28",
X"12",X"DD",X"6E",X"04",X"DD",X"66",X"05",X"09",X"5E",X"23",X"56",X"EB",X"C5",X"3E",X"02",X"CD",
X"08",X"04",X"C1",X"DD",X"6E",X"0B",X"DD",X"66",X"0C",X"09",X"5E",X"23",X"56",X"EB",X"3E",X"03",
X"CD",X"08",X"04",X"DD",X"4E",X"0D",X"DD",X"71",X"0E",X"DD",X"7E",X"09",X"FE",X"04",X"28",X"05",
X"3E",X"02",X"CD",X"ED",X"03",X"3E",X"03",X"DD",X"4E",X"0D",X"CD",X"ED",X"03",X"C9",X"DD",X"35",
X"01",X"C0",X"3A",X"48",X"30",X"DD",X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"5A",X"08",X"DD",
X"7E",X"07",X"D6",X"01",X"FA",X"5A",X"08",X"DD",X"77",X"07",X"DD",X"35",X"00",X"C0",X"DD",X"6E",
X"02",X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"F0",X"08",X"FE",X"1F",X"C2",X"F6",X"08",
X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",
X"00",X"21",X"8A",X"08",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"9A",X"08",X"B8",X"08",X"CE",X"08",
X"EB",X"08",X"EB",X"08",X"EB",X"08",X"EB",X"08",X"EB",X"08",X"DD",X"6E",X"02",X"DD",X"66",X"03",
X"4E",X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"44",X"30",
X"DD",X"73",X"04",X"DD",X"72",X"05",X"18",X"23",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",
X"00",X"21",X"7C",X"0A",X"09",X"7E",X"32",X"48",X"30",X"DD",X"77",X"01",X"18",X"0D",X"DD",X"6E",
X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"06",X"DD",X"77",X"07",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"C3",X"5E",X"08",X"DD",X"36",X"00",X"FF",X"C9",
X"CD",X"02",X"09",X"C3",X"26",X"09",X"CD",X"02",X"09",X"DD",X"4E",X"06",X"DD",X"71",X"07",X"C3",
X"26",X"09",X"78",X"E6",X"E0",X"07",X"07",X"07",X"47",X"3E",X"01",X"18",X"01",X"07",X"10",X"FD",
X"DD",X"77",X"00",X"C9",X"78",X"E6",X"E0",X"07",X"07",X"07",X"47",X"3E",X"01",X"18",X"01",X"07",
X"10",X"FD",X"DD",X"77",X"0A",X"C9",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",
X"DD",X"74",X"03",X"C9",X"8C",X"09",X"90",X"09",X"94",X"09",X"98",X"09",X"9C",X"09",X"A0",X"09",
X"A4",X"09",X"A8",X"09",X"AC",X"09",X"B0",X"09",X"B4",X"09",X"B8",X"09",X"BC",X"09",X"C0",X"09",
X"C4",X"09",X"C8",X"09",X"CC",X"09",X"D0",X"09",X"D4",X"09",X"D8",X"09",X"DC",X"09",X"E0",X"09",
X"04",X"0A",X"08",X"0A",X"0C",X"0A",X"10",X"0A",X"14",X"0A",X"18",X"0A",X"1C",X"0A",X"20",X"0A",
X"24",X"0A",X"28",X"0A",X"2C",X"0A",X"30",X"0A",X"34",X"0A",X"38",X"0A",X"3C",X"0A",X"40",X"0A",
X"44",X"0A",X"48",X"0A",X"4C",X"0A",X"50",X"0A",X"54",X"0A",X"58",X"0A",X"6B",X"08",X"F2",X"07",
X"80",X"07",X"14",X"07",X"AE",X"06",X"4E",X"06",X"F3",X"05",X"9E",X"05",X"4E",X"05",X"01",X"05",
X"B9",X"04",X"76",X"04",X"36",X"04",X"F9",X"03",X"C0",X"03",X"8A",X"03",X"57",X"03",X"27",X"03",
X"FA",X"02",X"CF",X"02",X"A7",X"02",X"81",X"02",X"5D",X"02",X"3B",X"02",X"1B",X"02",X"FD",X"01",
X"E0",X"01",X"C5",X"01",X"AC",X"01",X"94",X"01",X"7D",X"01",X"68",X"01",X"53",X"01",X"40",X"01",
X"2E",X"01",X"1D",X"01",X"0D",X"01",X"FE",X"00",X"F0",X"00",X"E3",X"00",X"D6",X"00",X"CA",X"00",
X"BE",X"00",X"B4",X"00",X"AA",X"00",X"A0",X"00",X"97",X"00",X"8F",X"00",X"87",X"00",X"7F",X"00",
X"78",X"00",X"71",X"00",X"6B",X"00",X"65",X"00",X"5F",X"00",X"5A",X"00",X"55",X"00",X"50",X"00",
X"4C",X"00",X"47",X"00",X"6A",X"08",X"F1",X"07",X"7F",X"07",X"15",X"07",X"AD",X"06",X"4D",X"06",
X"F2",X"05",X"9D",X"05",X"4D",X"05",X"00",X"05",X"B8",X"04",X"75",X"04",X"35",X"04",X"F8",X"03",
X"BF",X"03",X"89",X"03",X"56",X"03",X"26",X"03",X"F9",X"02",X"CE",X"02",X"A6",X"02",X"80",X"02",
X"5C",X"02",X"3A",X"02",X"1A",X"02",X"FC",X"01",X"DF",X"01",X"C4",X"01",X"AB",X"01",X"93",X"01",
X"7C",X"01",X"67",X"01",X"52",X"01",X"3F",X"01",X"2D",X"01",X"1C",X"01",X"0C",X"01",X"FD",X"00",
X"EF",X"00",X"E2",X"00",X"D5",X"00",X"C9",X"00",X"BD",X"00",X"B3",X"00",X"A9",X"00",X"9F",X"00",
X"96",X"00",X"8E",X"00",X"86",X"00",X"7E",X"00",X"77",X"00",X"70",X"00",X"6A",X"00",X"64",X"00",
X"5E",X"00",X"59",X"00",X"54",X"00",X"4F",X"00",X"4B",X"00",X"46",X"00",X"46",X"3F",X"38",X"31",
X"2B",X"26",X"21",X"1C",X"18",X"15",X"12",X"0F",X"0D",X"0C",X"0B",X"0A",X"3A",X"04",X"30",X"FE",
X"00",X"C2",X"F5",X"0D",X"3E",X"01",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"02",X"2E",X"00",X"CD",
X"34",X"04",X"3E",X"03",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"01",X"CD",X"7B",X"03",X"3E",X"02",
X"CD",X"7B",X"03",X"3E",X"03",X"CD",X"7B",X"03",X"21",X"EA",X"0A",X"11",X"14",X"30",X"01",X"30",
X"00",X"ED",X"B0",X"3A",X"12",X"30",X"07",X"4F",X"07",X"81",X"4F",X"06",X"00",X"21",X"F3",X"0E",
X"09",X"11",X"16",X"30",X"CD",X"E0",X"0A",X"11",X"26",X"30",X"CD",X"E0",X"0A",X"11",X"36",X"30",
X"7E",X"12",X"CD",X"E7",X"0A",X"7E",X"12",X"23",X"13",X"C9",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"01",X"00",X"00",X"00",X"00",X"01",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"3A",X"04",X"30",X"FE",X"00",X"C2",
X"7B",X"0E",X"DD",X"21",X"14",X"30",X"CD",X"E0",X"05",X"DD",X"7E",X"08",X"FE",X"01",X"28",X"28",
X"FE",X"02",X"28",X"3B",X"DD",X"21",X"24",X"30",X"CD",X"EF",X"05",X"DD",X"21",X"34",X"30",X"CD",
X"09",X"06",X"3C",X"28",X"02",X"AF",X"C9",X"DD",X"21",X"14",X"30",X"3E",X"FF",X"DD",X"BE",X"00",
X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",X"C9",X"DD",X"21",X"14",X"30",X"CD",X"32",X"06",X"DD",
X"21",X"34",X"30",X"CD",X"41",X"06",X"DD",X"21",X"24",X"30",X"CD",X"41",X"06",X"18",X"15",X"DD",
X"21",X"14",X"30",X"CD",X"23",X"06",X"DD",X"21",X"24",X"30",X"CD",X"EF",X"05",X"DD",X"21",X"34",
X"30",X"CD",X"41",X"06",X"DD",X"21",X"14",X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"09",X"DD",
X"BE",X"0A",X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"C8",
X"DD",X"36",X"09",X"01",X"CD",X"06",X"0C",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",
X"DD",X"36",X"09",X"02",X"CD",X"06",X"0C",X"AF",X"C9",X"0E",X"00",X"3E",X"02",X"CD",X"ED",X"03",
X"3E",X"FF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",X"DD",X"36",X"09",X"03",X"CD",X"06",
X"0C",X"AF",X"C9",X"0E",X"00",X"3E",X"03",X"CD",X"ED",X"03",X"3E",X"FF",X"C9",X"DD",X"7E",X"0A",
X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"04",X"CD",X"E4",X"0C",X"AF",X"C9",X"DD",X"7E",X"0A",X"FE",
X"FF",X"C8",X"DD",X"36",X"09",X"05",X"CD",X"E4",X"0C",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",
X"C8",X"CD",X"48",X"0D",X"AF",X"C9",X"DD",X"35",X"01",X"C0",X"3A",X"7E",X"30",X"DD",X"77",X"01",
X"DD",X"CB",X"00",X"46",X"C2",X"29",X"0C",X"DD",X"7E",X"07",X"D6",X"01",X"FA",X"6F",X"06",X"DD",
X"77",X"07",X"4F",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"DD",X"35",X"00",X"C0",X"DD",X"6E",X"02",
X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"37",X"07",X"FE",X"1F",X"C2",X"45",X"07",X"23",
X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",X"00",
X"21",X"59",X"0C",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"69",X"0C",X"9F",X"0C",X"C1",X"0C",X"B5",
X"0C",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",
X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"7A",X"30",X"DD",
X"73",X"04",X"DD",X"72",X"05",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",
X"21",X"60",X"09",X"09",X"5E",X"23",X"56",X"DD",X"73",X"0B",X"DD",X"72",X"0C",X"18",X"35",X"DD",
X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",X"0A",X"09",X"7E",X"32",X"7E",X"30",
X"DD",X"77",X"01",X"18",X"1F",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"08",X"18",
X"13",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"06",X"DD",X"77",X"07",X"DD",X"77",
X"0D",X"DD",X"77",X"0E",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",X"DD",X"74",
X"03",X"C3",X"2D",X"0C",X"DD",X"35",X"0F",X"C0",X"3A",X"7E",X"30",X"DD",X"77",X"0F",X"DD",X"CB",
X"0A",X"46",X"C2",X"17",X"0D",X"DD",X"7E",X"0E",X"D6",X"01",X"FA",X"17",X"0D",X"DD",X"77",X"0E",
X"DD",X"7E",X"09",X"FE",X"04",X"28",X"08",X"DD",X"4E",X"0E",X"3E",X"02",X"CD",X"ED",X"03",X"DD",
X"4E",X"0E",X"3E",X"03",X"CD",X"ED",X"03",X"DD",X"35",X"0A",X"C0",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"2B",X"7E",X"47",X"E6",X"1F",X"CA",X"D4",X"07",X"FE",X"1F",X"C2",X"ED",X"07",X"DD",X"7E",
X"09",X"FE",X"04",X"28",X"07",X"3E",X"02",X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",
X"CD",X"ED",X"03",X"DD",X"36",X"0A",X"FF",X"C9",X"DD",X"35",X"01",X"C0",X"3A",X"7E",X"30",X"DD",
X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"64",X"0D",X"DD",X"7E",X"07",X"D6",X"01",X"FA",X"64",
X"0D",X"DD",X"77",X"07",X"DD",X"35",X"00",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"47",
X"E6",X"1F",X"CA",X"F0",X"08",X"FE",X"1F",X"C2",X"F6",X"08",X"23",X"DD",X"75",X"02",X"DD",X"74",
X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",X"00",X"21",X"94",X"0D",X"09",X"5E",
X"23",X"56",X"EB",X"E9",X"A4",X"0D",X"C2",X"0D",X"D8",X"0D",X"EB",X"08",X"EB",X"08",X"EB",X"08",
X"EB",X"08",X"EB",X"08",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",
X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"7A",X"30",X"DD",X"73",X"04",X"DD",X"72",X"05",
X"18",X"23",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",X"0A",X"09",X"7E",
X"32",X"7E",X"30",X"DD",X"77",X"01",X"18",X"0D",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",
X"77",X"06",X"DD",X"77",X"07",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",X"DD",
X"74",X"03",X"C3",X"68",X"0D",X"3E",X"01",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"02",X"2E",X"00",
X"CD",X"34",X"04",X"3E",X"03",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"01",X"CD",X"7B",X"03",X"3E",
X"02",X"CD",X"7B",X"03",X"3E",X"03",X"CD",X"7B",X"03",X"21",X"4B",X"0E",X"11",X"4A",X"30",X"01",
X"30",X"00",X"ED",X"B0",X"3A",X"80",X"30",X"07",X"4F",X"07",X"81",X"4F",X"06",X"00",X"21",X"F3",
X"0E",X"09",X"11",X"4C",X"30",X"CD",X"41",X"0E",X"11",X"5C",X"30",X"CD",X"41",X"0E",X"11",X"6C",
X"30",X"7E",X"12",X"CD",X"48",X"0E",X"7E",X"12",X"23",X"13",X"C9",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"01",X"00",X"00",X"00",X"00",X"01",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"DD",X"21",X"4A",X"30",X"CD",
X"9A",X"0B",X"DD",X"7E",X"08",X"FE",X"01",X"28",X"28",X"FE",X"02",X"28",X"3B",X"DD",X"21",X"5A",
X"30",X"CD",X"A9",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"C3",X"0B",X"3C",X"28",X"02",X"AF",X"C9",
X"DD",X"21",X"4A",X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",
X"C9",X"DD",X"21",X"4A",X"30",X"CD",X"EC",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"FB",X"0B",X"DD",
X"21",X"5A",X"30",X"CD",X"FB",X"0B",X"18",X"15",X"DD",X"21",X"4A",X"30",X"CD",X"DD",X"0B",X"DD",
X"21",X"5A",X"30",X"CD",X"A9",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"FB",X"0B",X"DD",X"21",X"4A",
X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"09",X"DD",X"BE",X"0A",X"20",X"04",X"DD",X"BE",X"10",
X"C8",X"AF",X"C9",X"6B",X"10",X"81",X"10",X"95",X"10",X"9D",X"10",X"CD",X"10",X"FB",X"10",X"BD",
X"13",X"0F",X"14",X"5F",X"14",X"23",X"11",X"34",X"11",X"43",X"11",X"6B",X"10",X"81",X"10",X"95",
X"10",X"52",X"11",X"EC",X"11",X"24",X"12",X"5C",X"12",X"AE",X"12",X"FE",X"12",X"6B",X"10",X"81",
X"10",X"95",X"10",X"BF",X"14",X"D1",X"14",X"0A",X"15",X"6B",X"10",X"81",X"10",X"95",X"10",X"FC",
X"10",X"11",X"11",X"22",X"11",X"6B",X"10",X"81",X"10",X"95",X"10",X"60",X"14",X"90",X"14",X"BE",
X"14",X"FF",X"12",X"15",X"13",X"29",X"13",X"31",X"13",X"40",X"13",X"49",X"13",X"4A",X"13",X"59",
X"13",X"62",X"13",X"6B",X"10",X"81",X"10",X"95",X"10",X"6B",X"10",X"81",X"10",X"95",X"10",X"63",
X"13",X"7F",X"13",X"80",X"13",X"81",X"13",X"9D",X"13",X"9E",X"13",X"9F",X"13",X"BB",X"13",X"BC",
X"13",X"6B",X"10",X"81",X"10",X"95",X"10",X"6B",X"10",X"81",X"10",X"95",X"10",X"3E",X"00",X"32",
X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"01",
X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",
X"08",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",
X"3E",X"03",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",
X"C9",X"3E",X"0C",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",
X"0B",X"C9",X"3E",X"05",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",
X"1A",X"0B",X"C9",X"3E",X"06",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",
X"CD",X"1A",X"0B",X"C9",X"3E",X"0A",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",
X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"0E",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",
X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"0F",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",
X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"12",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",
X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"13",X"32",X"12",X"30",X"32",X"80",X"30",
X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"14",X"32",X"12",X"30",X"32",X"80",
X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"02",X"32",X"12",X"30",X"32",
X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"1F",X"0F",X"3F",X"0F",X"5F",
X"09",X"7F",X"00",X"22",X"23",X"24",X"25",X"23",X"24",X"25",X"26",X"24",X"25",X"26",X"27",X"A8",
X"FF",X"1F",X"0F",X"3F",X"0F",X"5F",X"09",X"26",X"27",X"28",X"29",X"27",X"28",X"29",X"2A",X"28",
X"29",X"2A",X"2B",X"AC",X"FF",X"1F",X"08",X"3F",X"0F",X"5F",X"08",X"A2",X"FF",X"1F",X"0D",X"3F",
X"0A",X"5F",X"09",X"7F",X"00",X"2E",X"2E",X"20",X"30",X"30",X"20",X"32",X"32",X"20",X"30",X"30",
X"20",X"32",X"32",X"20",X"33",X"33",X"20",X"32",X"32",X"20",X"33",X"33",X"20",X"35",X"35",X"20",
X"33",X"33",X"20",X"35",X"35",X"20",X"37",X"37",X"20",X"3F",X"05",X"B5",X"FF",X"1F",X"0D",X"3F",
X"0A",X"5F",X"09",X"32",X"32",X"20",X"33",X"33",X"20",X"35",X"35",X"20",X"33",X"33",X"20",X"35",
X"35",X"20",X"37",X"37",X"20",X"35",X"35",X"20",X"37",X"37",X"20",X"39",X"39",X"20",X"37",X"37",
X"20",X"39",X"39",X"20",X"3A",X"3A",X"20",X"3F",X"05",X"B2",X"FF",X"FF",X"1F",X"0E",X"3F",X"0F",
X"5F",X"09",X"7F",X"02",X"6B",X"60",X"80",X"70",X"60",X"80",X"74",X"60",X"80",X"3F",X"05",X"B7",
X"FF",X"1F",X"0E",X"3F",X"0F",X"5F",X"09",X"64",X"60",X"80",X"6B",X"60",X"80",X"70",X"60",X"80",
X"B4",X"FF",X"FF",X"1F",X"0E",X"3F",X"0C",X"5F",X"09",X"7F",X"00",X"4E",X"52",X"55",X"5A",X"52",
X"55",X"5A",X"5E",X"FF",X"1F",X"0E",X"3F",X"0C",X"5F",X"09",X"49",X"4E",X"52",X"55",X"4E",X"52",
X"55",X"5A",X"FF",X"1F",X"08",X"3F",X"0C",X"5F",X"08",X"46",X"49",X"4E",X"52",X"49",X"4E",X"52",
X"55",X"FF",X"1F",X"0E",X"3F",X"0B",X"5F",X"09",X"7F",X"02",X"70",X"7F",X"00",X"70",X"7F",X"02",
X"72",X"7F",X"00",X"70",X"7F",X"02",X"73",X"7F",X"00",X"70",X"7F",X"02",X"75",X"7F",X"00",X"70",
X"7F",X"02",X"73",X"7F",X"00",X"70",X"7F",X"02",X"72",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",
X"00",X"70",X"7F",X"02",X"6E",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",X"00",X"70",X"7F",X"02",
X"72",X"7F",X"00",X"70",X"7F",X"02",X"73",X"7F",X"00",X"70",X"7F",X"02",X"75",X"7F",X"00",X"70",
X"7F",X"02",X"73",X"7F",X"00",X"70",X"7F",X"02",X"72",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",
X"00",X"70",X"7F",X"02",X"6E",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",X"00",X"70",X"7F",X"02",
X"72",X"7F",X"00",X"70",X"7F",X"02",X"6E",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",X"00",X"70",
X"7F",X"02",X"72",X"7F",X"00",X"70",X"7F",X"02",X"6E",X"7F",X"00",X"70",X"7F",X"02",X"70",X"7F",
X"00",X"70",X"7F",X"02",X"72",X"7F",X"00",X"70",X"7F",X"02",X"B0",X"FF",X"1F",X"08",X"3F",X"0B",
X"5F",X"08",X"70",X"70",X"72",X"70",X"73",X"70",X"75",X"70",X"73",X"70",X"72",X"70",X"70",X"70",
X"6E",X"70",X"70",X"70",X"72",X"70",X"73",X"70",X"75",X"70",X"73",X"70",X"72",X"70",X"70",X"70",
X"6E",X"70",X"70",X"70",X"72",X"70",X"6E",X"70",X"70",X"70",X"72",X"70",X"6E",X"70",X"70",X"70",
X"72",X"70",X"B0",X"FF",X"1F",X"02",X"3F",X"0B",X"5F",X"08",X"70",X"70",X"72",X"70",X"73",X"70",
X"75",X"70",X"73",X"70",X"72",X"70",X"70",X"70",X"6E",X"70",X"70",X"70",X"72",X"70",X"73",X"70",
X"75",X"70",X"73",X"70",X"72",X"70",X"70",X"70",X"6E",X"70",X"70",X"70",X"72",X"70",X"6E",X"70",
X"70",X"70",X"72",X"70",X"6E",X"70",X"70",X"70",X"72",X"70",X"B0",X"FF",X"1F",X"0E",X"3F",X"0A",
X"5F",X"09",X"7F",X"02",X"77",X"75",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",
X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",
X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"B7",X"60",
X"75",X"73",X"72",X"70",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"30",X"30",X"30",X"30",
X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"B0",X"FF",X"1F",X"02",
X"3F",X"0A",X"5F",X"08",X"77",X"75",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",
X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",
X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"37",X"B7",X"60",
X"75",X"73",X"72",X"70",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"2F",X"30",X"30",X"30",X"30",
X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"30",X"B0",X"FF",X"FF",X"1F",
X"0E",X"3F",X"07",X"5F",X"09",X"7F",X"00",X"22",X"23",X"24",X"25",X"26",X"27",X"28",X"29",X"2A");
begin
process(clk)
begin
if rising_edge(clk) then
data <= rom_data(to_integer(unsigned(addr)));
end if;
end process;
end architecture;

278
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_sound_prog2.vhd Normal file
View File

@@ -0,0 +1,278 @@
library ieee;
use ieee.std_logic_1164.all,ieee.numeric_std.all;
entity time_pilot_sound_prog2 is
port (
clk : in std_logic;
addr : in std_logic_vector(11 downto 0);
data : out std_logic_vector(7 downto 0)
);
end entity;
architecture prom of time_pilot_sound_prog2 is
type rom is array(0 to 4095) of std_logic_vector(7 downto 0);
signal rom_data: rom := (
X"21",X"00",X"30",X"06",X"00",X"C3",X"7C",X"01",X"32",X"00",X"50",X"3A",X"00",X"40",X"C9",X"FF",
X"32",X"00",X"70",X"3A",X"00",X"60",X"C9",X"FF",X"78",X"CF",X"79",X"32",X"00",X"40",X"C9",X"FF",
X"78",X"D7",X"79",X"32",X"00",X"60",X"C9",X"FF",X"87",X"85",X"6F",X"7C",X"CE",X"00",X"67",X"7E",
X"23",X"66",X"6F",X"E9",X"FF",X"FF",X"FF",X"FF",X"D9",X"08",X"CD",X"40",X"00",X"08",X"D9",X"C9",
X"3E",X"0E",X"CF",X"B7",X"28",X"26",X"32",X"0B",X"30",X"CD",X"2D",X"01",X"3A",X"0B",X"30",X"CB",
X"77",X"20",X"3F",X"3A",X"06",X"30",X"B7",X"3A",X"0B",X"30",X"C2",X"E6",X"00",X"21",X"06",X"30",
X"36",X"00",X"B7",X"F2",X"FE",X"00",X"CB",X"BF",X"CD",X"89",X"00",X"C9",X"21",X"00",X"30",X"06",
X"04",X"AF",X"77",X"23",X"10",X"FC",X"C9",X"21",X"00",X"30",X"06",X"02",X"0E",X"03",X"BE",X"28",
X"05",X"23",X"23",X"10",X"F9",X"41",X"79",X"90",X"C9",X"CD",X"77",X"00",X"C8",X"AF",X"77",X"23",
X"77",X"C9",X"3A",X"06",X"30",X"B7",X"20",X"27",X"3A",X"09",X"30",X"2A",X"07",X"30",X"BD",X"D8",
X"BC",X"D8",X"3E",X"FF",X"32",X"06",X"30",X"06",X"00",X"21",X"00",X"30",X"3A",X"0B",X"30",X"77",
X"23",X"70",X"23",X"70",X"23",X"70",X"3E",X"01",X"32",X"04",X"30",X"CD",X"BE",X"02",X"C9",X"3A",
X"0B",X"30",X"CB",X"B7",X"CD",X"77",X"00",X"28",X"04",X"23",X"36",X"00",X"C9",X"3A",X"09",X"30",
X"47",X"3A",X"07",X"30",X"B8",X"D0",X"21",X"00",X"30",X"3A",X"0B",X"30",X"77",X"23",X"36",X"00",
X"3E",X"FF",X"32",X"06",X"30",X"C9",X"3A",X"09",X"30",X"47",X"3A",X"07",X"30",X"B8",X"D0",X"AF",
X"32",X"06",X"30",X"3A",X"0B",X"30",X"21",X"00",X"30",X"77",X"23",X"36",X"00",X"C9",X"32",X"0B",
X"30",X"CD",X"77",X"00",X"28",X"04",X"23",X"36",X"00",X"C9",X"AF",X"CD",X"77",X"00",X"28",X"08",
X"3A",X"0B",X"30",X"77",X"23",X"36",X"00",X"C9",X"CD",X"2D",X"01",X"21",X"00",X"30",X"B7",X"C8",
X"3D",X"87",X"4F",X"06",X"00",X"09",X"3A",X"0B",X"30",X"77",X"23",X"70",X"C9",X"3A",X"00",X"30",
X"CD",X"4F",X"01",X"32",X"07",X"30",X"3A",X"02",X"30",X"CD",X"4F",X"01",X"32",X"08",X"30",X"3A",
X"0B",X"30",X"CD",X"4F",X"01",X"32",X"09",X"30",X"CD",X"61",X"01",X"32",X"0A",X"30",X"C9",X"21",
X"AD",X"05",X"CB",X"77",X"28",X"05",X"CB",X"B7",X"21",X"AD",X"05",X"06",X"00",X"4F",X"09",X"7E",
X"C9",X"2A",X"07",X"30",X"7C",X"BD",X"38",X"09",X"3A",X"09",X"30",X"BD",X"38",X"0C",X"3E",X"01",
X"C9",X"3A",X"09",X"30",X"BC",X"38",X"03",X"3E",X"02",X"C9",X"AF",X"C9",X"70",X"23",X"7C",X"FE",
X"34",X"20",X"F9",X"F9",X"ED",X"56",X"21",X"00",X"80",X"22",X"0C",X"30",X"77",X"01",X"3F",X"07",
X"DF",X"E7",X"32",X"0E",X"30",X"32",X"0F",X"30",X"CD",X"A2",X"02",X"CD",X"A6",X"02",X"CD",X"AA",
X"02",X"CD",X"B0",X"02",X"CD",X"B4",X"02",X"CD",X"B8",X"02",X"3A",X"06",X"30",X"B7",X"28",X"06",
X"FB",X"00",X"00",X"F3",X"18",X"0F",X"FB",X"3E",X"0F",X"CF",X"E6",X"40",X"20",X"F9",X"3E",X"0F",
X"CF",X"E6",X"40",X"28",X"F9",X"F3",X"3A",X"06",X"30",X"B7",X"20",X"2E",X"3E",X"00",X"32",X"04",
X"30",X"3A",X"01",X"30",X"B7",X"3A",X"00",X"30",X"28",X"05",X"CD",X"85",X"02",X"18",X"03",X"CD",
X"68",X"02",X"3E",X"01",X"32",X"04",X"30",X"3A",X"03",X"30",X"B7",X"3A",X"02",X"30",X"28",X"05",
X"CD",X"85",X"02",X"18",X"B5",X"CD",X"68",X"02",X"18",X"B0",X"3E",X"00",X"32",X"04",X"30",X"3A",
X"01",X"30",X"B7",X"3A",X"00",X"30",X"28",X"05",X"CD",X"3C",X"02",X"18",X"9D",X"CD",X"12",X"02",
X"18",X"98",X"CB",X"B7",X"32",X"00",X"30",X"CD",X"BE",X"02",X"3A",X"00",X"30",X"21",X"F9",X"04",
X"EF",X"B7",X"20",X"6B",X"21",X"01",X"30",X"36",X"01",X"11",X"53",X"05",X"3A",X"00",X"30",X"6F",
X"26",X"00",X"29",X"19",X"5E",X"23",X"56",X"ED",X"53",X"10",X"30",X"C9",X"B7",X"C8",X"2A",X"10",
X"30",X"CD",X"33",X"00",X"B7",X"C8",X"21",X"00",X"30",X"3D",X"28",X"06",X"36",X"00",X"AF",X"32",
X"06",X"30",X"23",X"36",X"00",X"C9",X"B7",X"C8",X"E6",X"03",X"C5",X"47",X"3A",X"04",X"30",X"4F",
X"87",X"81",X"80",X"32",X"05",X"30",X"C1",X"C9",X"F5",X"CD",X"BE",X"02",X"F1",X"E6",X"3F",X"21",
X"F9",X"04",X"EF",X"B7",X"C2",X"8F",X"02",X"21",X"01",X"30",X"3A",X"04",X"30",X"87",X"5F",X"16",
X"00",X"19",X"36",X"01",X"C9",X"B7",X"C8",X"E6",X"3F",X"21",X"53",X"05",X"EF",X"B7",X"C8",X"57",
X"21",X"00",X"30",X"3A",X"04",X"30",X"4F",X"06",X"00",X"09",X"09",X"15",X"28",X"01",X"70",X"23",
X"70",X"C9",X"06",X"08",X"18",X"06",X"06",X"09",X"18",X"02",X"06",X"0A",X"0E",X"00",X"DF",X"C9",
X"06",X"08",X"18",X"06",X"06",X"09",X"18",X"02",X"06",X"0A",X"0E",X"00",X"E7",X"C9",X"01",X"00",
X"08",X"3A",X"04",X"30",X"B7",X"20",X"0C",X"DF",X"04",X"DF",X"04",X"DF",X"0E",X"3F",X"CD",X"2D",
X"03",X"AF",X"C9",X"E7",X"04",X"E7",X"04",X"E7",X"0E",X"3F",X"CD",X"39",X"03",X"AF",X"C9",X"CD",
X"56",X"02",X"3A",X"05",X"30",X"3D",X"21",X"EB",X"02",X"EF",X"C9",X"F7",X"02",X"00",X"03",X"09",
X"03",X"12",X"03",X"1B",X"03",X"24",X"03",X"CD",X"A2",X"02",X"0E",X"09",X"CD",X"2D",X"03",X"C9",
X"CD",X"A6",X"02",X"0E",X"12",X"CD",X"2D",X"03",X"C9",X"CD",X"AA",X"02",X"0E",X"24",X"CD",X"2D",
X"03",X"C9",X"CD",X"B0",X"02",X"0E",X"09",X"CD",X"39",X"03",X"C9",X"CD",X"B4",X"02",X"0E",X"12",
X"CD",X"39",X"03",X"C9",X"CD",X"B8",X"02",X"0E",X"24",X"CD",X"39",X"03",X"C9",X"3A",X"0E",X"30",
X"B1",X"32",X"0E",X"30",X"06",X"07",X"4F",X"DF",X"C9",X"3A",X"0F",X"30",X"B1",X"32",X"0F",X"30",
X"06",X"07",X"4F",X"E7",X"C9",X"06",X"06",X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",
X"C9",X"06",X"06",X"3A",X"04",X"30",X"B7",X"20",X"04",X"78",X"CF",X"4F",X"C9",X"78",X"D7",X"4F",
X"C9",X"3A",X"0E",X"30",X"A0",X"B1",X"32",X"0E",X"30",X"4F",X"06",X"07",X"DF",X"C9",X"3A",X"0F",
X"30",X"A0",X"B1",X"32",X"0F",X"30",X"4F",X"06",X"07",X"E7",X"C9",X"21",X"91",X"03",X"3D",X"87",
X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",X"B7",X"28",X"D2",X"18",
X"DD",X"08",X"FE",X"10",X"FD",X"20",X"FB",X"21",X"AD",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",
X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",X"B7",X"28",X"B6",X"18",X"C1",X"01",X"F7",X"02",
X"EF",X"04",X"DF",X"21",X"C9",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",
X"42",X"3A",X"04",X"30",X"B7",X"28",X"9A",X"18",X"A5",X"00",X"F6",X"00",X"ED",X"00",X"DB",X"21",
X"E7",X"03",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"4B",X"42",X"3A",X"04",X"30",
X"B7",X"CA",X"61",X"03",X"C3",X"6E",X"03",X"09",X"FF",X"12",X"FF",X"24",X"FF",X"C6",X"07",X"47",
X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",X"C9",X"C6",X"07",X"47",X"3A",X"04",X"30",
X"B7",X"78",X"20",X"02",X"CF",X"C9",X"D7",X"C9",X"3D",X"87",X"47",X"4D",X"3A",X"04",X"30",X"B7",
X"20",X"05",X"DF",X"4C",X"04",X"DF",X"C9",X"E7",X"4C",X"04",X"E7",X"C9",X"3D",X"87",X"67",X"3A",
X"04",X"30",X"B7",X"7C",X"20",X"07",X"CF",X"6F",X"7C",X"3C",X"CF",X"67",X"C9",X"D7",X"6F",X"7C",
X"3C",X"D7",X"67",X"C9",X"CD",X"56",X"02",X"7D",X"FE",X"04",X"D0",X"F5",X"21",X"83",X"04",X"3A",
X"05",X"30",X"3D",X"87",X"5F",X"16",X"00",X"19",X"5E",X"23",X"56",X"2A",X"0C",X"30",X"7B",X"A5",
X"6F",X"7A",X"A4",X"67",X"22",X"0C",X"30",X"F1",X"B7",X"20",X"02",X"77",X"C9",X"21",X"83",X"04",
X"87",X"87",X"4F",X"87",X"81",X"4F",X"06",X"00",X"09",X"3A",X"05",X"30",X"3D",X"87",X"5F",X"16",
X"00",X"19",X"5E",X"23",X"56",X"2A",X"0C",X"30",X"7B",X"B5",X"6F",X"7A",X"B4",X"67",X"22",X"0C",
X"30",X"77",X"C9",X"3F",X"FF",X"FF",X"FC",X"FF",X"F3",X"FC",X"FF",X"F3",X"FF",X"CF",X"FF",X"80",
X"00",X"00",X"02",X"00",X"08",X"02",X"00",X"08",X"00",X"20",X"00",X"40",X"00",X"00",X"01",X"00",
X"04",X"01",X"00",X"04",X"00",X"10",X"00",X"C0",X"00",X"00",X"03",X"00",X"0C",X"03",X"00",X"0C",
X"00",X"30",X"00",X"0E",X"10",X"C6",X"07",X"47",X"3A",X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",
X"E7",X"C9",X"06",X"0B",X"4D",X"3A",X"04",X"30",X"B7",X"20",X"05",X"DF",X"04",X"4C",X"DF",X"C9",
X"E7",X"04",X"4C",X"E7",X"C9",X"3A",X"04",X"30",X"B7",X"3E",X"0B",X"47",X"20",X"07",X"CF",X"6F",
X"78",X"3C",X"CF",X"67",X"C9",X"D7",X"6F",X"78",X"3C",X"D7",X"67",X"C9",X"4F",X"06",X"0D",X"3A",
X"04",X"30",X"B7",X"20",X"02",X"DF",X"C9",X"E7",X"C9",X"BE",X"02",X"B0",X"0F",X"7D",X"0F",X"8E",
X"0F",X"5A",X"10",X"F4",X"0F",X"DA",X"05",X"08",X"17",X"DA",X"05",X"82",X"1B",X"99",X"16",X"D2",
X"0F",X"2F",X"16",X"76",X"17",X"DA",X"05",X"27",X"1B",X"B6",X"1D",X"DA",X"05",X"9D",X"1C",X"DA",
X"05",X"DA",X"05",X"2A",X"1C",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"05",
X"10",X"16",X"10",X"9F",X"0F",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"27",X"10",X"38",X"10",X"49",
X"10",X"DA",X"05",X"C1",X"0F",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",X"05",X"DA",
X"05",X"48",X"1D",X"00",X"00",X"BD",X"0F",X"8A",X"0F",X"9B",X"0F",X"67",X"10",X"01",X"10",X"DD",
X"05",X"3B",X"17",X"DD",X"05",X"BE",X"1B",X"CB",X"16",X"DF",X"0F",X"62",X"16",X"8E",X"17",X"DD",
X"05",X"44",X"1B",X"F0",X"1D",X"DD",X"05",X"D5",X"1C",X"DD",X"05",X"DD",X"05",X"55",X"1C",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"12",X"10",X"23",X"10",X"AC",X"0F",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"34",X"10",X"45",X"10",X"56",X"10",X"DD",X"05",X"CE",X"0F",X"DD",
X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"DD",X"05",X"6F",X"1D",X"00",X"98",X"A0",
X"A8",X"D8",X"60",X"00",X"EC",X"00",X"B0",X"78",X"F0",X"C0",X"E8",X"00",X"B2",X"00",X"00",X"E0",
X"00",X"00",X"88",X"00",X"00",X"00",X"00",X"00",X"70",X"68",X"B8",X"00",X"00",X"00",X"00",X"00",
X"00",X"00",X"D0",X"00",X"00",X"00",X"00",X"00",X"00",X"C8",X"3E",X"00",X"C9",X"3E",X"FF",X"C9",
X"DD",X"7E",X"00",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"01",X"CD",X"4C",X"06",X"AF",X"C9",X"DD",
X"7E",X"00",X"FE",X"FF",X"28",X"09",X"DD",X"36",X"09",X"02",X"CD",X"4C",X"06",X"AF",X"C9",X"0E",
X"00",X"3E",X"02",X"CD",X"ED",X"03",X"3E",X"FF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",
X"DD",X"36",X"09",X"03",X"CD",X"4C",X"06",X"AF",X"C9",X"0E",X"00",X"3E",X"03",X"CD",X"ED",X"03",
X"3E",X"FF",X"C9",X"DD",X"7E",X"0A",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"04",X"CD",X"72",X"07",
X"AF",X"C9",X"DD",X"7E",X"0A",X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"05",X"CD",X"72",X"07",X"AF",
X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"C8",X"CD",X"3E",X"08",X"AF",X"C9",X"DD",X"35",X"01",X"C0",
X"3A",X"48",X"30",X"DD",X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"6F",X"06",X"DD",X"7E",X"07",
X"D6",X"01",X"FA",X"6F",X"06",X"DD",X"77",X"07",X"4F",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"DD",
X"35",X"00",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"37",X"07",
X"FE",X"1F",X"C2",X"45",X"07",X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",
X"0F",X"0F",X"0F",X"4F",X"06",X"00",X"21",X"9F",X"06",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"AF",
X"06",X"E5",X"06",X"07",X"07",X"FB",X"06",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"DD",
X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",
X"56",X"ED",X"53",X"44",X"30",X"DD",X"73",X"04",X"DD",X"72",X"05",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",X"60",X"09",X"09",X"5E",X"23",X"56",X"DD",X"73",X"0B",
X"DD",X"72",X"0C",X"18",X"35",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",
X"0A",X"09",X"7E",X"32",X"48",X"30",X"DD",X"77",X"01",X"18",X"1F",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"7E",X"DD",X"77",X"08",X"18",X"13",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",
X"06",X"DD",X"77",X"07",X"DD",X"77",X"0D",X"DD",X"77",X"0E",X"DD",X"6E",X"02",X"DD",X"66",X"03",
X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"C3",X"73",X"06",X"DD",X"7E",X"09",X"0E",X"00",X"CD",
X"ED",X"03",X"DD",X"36",X"00",X"FF",X"C9",X"CD",X"02",X"09",X"DD",X"7E",X"09",X"0E",X"00",X"CD",
X"ED",X"03",X"C3",X"26",X"09",X"C5",X"CD",X"02",X"09",X"C1",X"78",X"E6",X"1F",X"3D",X"07",X"4F",
X"06",X"00",X"DD",X"6E",X"04",X"DD",X"66",X"05",X"09",X"5E",X"23",X"56",X"EB",X"DD",X"7E",X"09",
X"CD",X"08",X"04",X"DD",X"4E",X"06",X"DD",X"71",X"07",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"C3",
X"26",X"09",X"DD",X"35",X"0F",X"C0",X"3A",X"48",X"30",X"DD",X"77",X"0F",X"DD",X"CB",X"0A",X"46",
X"C2",X"A5",X"07",X"DD",X"7E",X"0E",X"D6",X"01",X"FA",X"A5",X"07",X"DD",X"77",X"0E",X"DD",X"7E",
X"09",X"FE",X"04",X"28",X"08",X"DD",X"4E",X"0E",X"3E",X"02",X"CD",X"ED",X"03",X"DD",X"4E",X"0E",
X"3E",X"03",X"CD",X"ED",X"03",X"DD",X"35",X"0A",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"2B",
X"7E",X"47",X"E6",X"1F",X"28",X"1E",X"FE",X"1F",X"20",X"33",X"DD",X"7E",X"09",X"FE",X"04",X"28",
X"07",X"3E",X"02",X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",X"CD",X"ED",X"03",X"DD",
X"36",X"0A",X"FF",X"C9",X"CD",X"14",X"09",X"DD",X"7E",X"09",X"FE",X"04",X"28",X"07",X"3E",X"02",
X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",X"CD",X"ED",X"03",X"C9",X"C5",X"CD",X"14",
X"09",X"C1",X"78",X"E6",X"1F",X"3D",X"07",X"4F",X"06",X"00",X"DD",X"7E",X"09",X"FE",X"04",X"28",
X"12",X"DD",X"6E",X"04",X"DD",X"66",X"05",X"09",X"5E",X"23",X"56",X"EB",X"C5",X"3E",X"02",X"CD",
X"08",X"04",X"C1",X"DD",X"6E",X"0B",X"DD",X"66",X"0C",X"09",X"5E",X"23",X"56",X"EB",X"3E",X"03",
X"CD",X"08",X"04",X"DD",X"4E",X"0D",X"DD",X"71",X"0E",X"DD",X"7E",X"09",X"FE",X"04",X"28",X"05",
X"3E",X"02",X"CD",X"ED",X"03",X"3E",X"03",X"DD",X"4E",X"0D",X"CD",X"ED",X"03",X"C9",X"DD",X"35",
X"01",X"C0",X"3A",X"48",X"30",X"DD",X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"5A",X"08",X"DD",
X"7E",X"07",X"D6",X"01",X"FA",X"5A",X"08",X"DD",X"77",X"07",X"DD",X"35",X"00",X"C0",X"DD",X"6E",
X"02",X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"F0",X"08",X"FE",X"1F",X"C2",X"F6",X"08",
X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",
X"00",X"21",X"8A",X"08",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"9A",X"08",X"B8",X"08",X"CE",X"08",
X"EB",X"08",X"EB",X"08",X"EB",X"08",X"EB",X"08",X"EB",X"08",X"DD",X"6E",X"02",X"DD",X"66",X"03",
X"4E",X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"44",X"30",
X"DD",X"73",X"04",X"DD",X"72",X"05",X"18",X"23",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",
X"00",X"21",X"7C",X"0A",X"09",X"7E",X"32",X"48",X"30",X"DD",X"77",X"01",X"18",X"0D",X"DD",X"6E",
X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"06",X"DD",X"77",X"07",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"23",X"DD",X"75",X"02",X"DD",X"74",X"03",X"C3",X"5E",X"08",X"DD",X"36",X"00",X"FF",X"C9",
X"CD",X"02",X"09",X"C3",X"26",X"09",X"CD",X"02",X"09",X"DD",X"4E",X"06",X"DD",X"71",X"07",X"C3",
X"26",X"09",X"78",X"E6",X"E0",X"07",X"07",X"07",X"47",X"3E",X"01",X"18",X"01",X"07",X"10",X"FD",
X"DD",X"77",X"00",X"C9",X"78",X"E6",X"E0",X"07",X"07",X"07",X"47",X"3E",X"01",X"18",X"01",X"07",
X"10",X"FD",X"DD",X"77",X"0A",X"C9",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",
X"DD",X"74",X"03",X"C9",X"8C",X"09",X"90",X"09",X"94",X"09",X"98",X"09",X"9C",X"09",X"A0",X"09",
X"A4",X"09",X"A8",X"09",X"AC",X"09",X"B0",X"09",X"B4",X"09",X"B8",X"09",X"BC",X"09",X"C0",X"09",
X"C4",X"09",X"C8",X"09",X"CC",X"09",X"D0",X"09",X"D4",X"09",X"D8",X"09",X"DC",X"09",X"E0",X"09",
X"04",X"0A",X"08",X"0A",X"0C",X"0A",X"10",X"0A",X"14",X"0A",X"18",X"0A",X"1C",X"0A",X"20",X"0A",
X"24",X"0A",X"28",X"0A",X"2C",X"0A",X"30",X"0A",X"34",X"0A",X"38",X"0A",X"3C",X"0A",X"40",X"0A",
X"44",X"0A",X"48",X"0A",X"4C",X"0A",X"50",X"0A",X"54",X"0A",X"58",X"0A",X"6B",X"08",X"F2",X"07",
X"80",X"07",X"14",X"07",X"AE",X"06",X"4E",X"06",X"F3",X"05",X"9E",X"05",X"4E",X"05",X"01",X"05",
X"B9",X"04",X"76",X"04",X"36",X"04",X"F9",X"03",X"C0",X"03",X"8A",X"03",X"57",X"03",X"27",X"03",
X"FA",X"02",X"CF",X"02",X"A7",X"02",X"81",X"02",X"5D",X"02",X"3B",X"02",X"1B",X"02",X"FD",X"01",
X"E0",X"01",X"C5",X"01",X"AC",X"01",X"94",X"01",X"7D",X"01",X"68",X"01",X"53",X"01",X"40",X"01",
X"2E",X"01",X"1D",X"01",X"0D",X"01",X"FE",X"00",X"F0",X"00",X"E3",X"00",X"D6",X"00",X"CA",X"00",
X"BE",X"00",X"B4",X"00",X"AA",X"00",X"A0",X"00",X"97",X"00",X"8F",X"00",X"87",X"00",X"7F",X"00",
X"78",X"00",X"71",X"00",X"6B",X"00",X"65",X"00",X"5F",X"00",X"5A",X"00",X"55",X"00",X"50",X"00",
X"4C",X"00",X"47",X"00",X"6A",X"08",X"F1",X"07",X"7F",X"07",X"15",X"07",X"AD",X"06",X"4D",X"06",
X"F2",X"05",X"9D",X"05",X"4D",X"05",X"00",X"05",X"B8",X"04",X"75",X"04",X"35",X"04",X"F8",X"03",
X"BF",X"03",X"89",X"03",X"56",X"03",X"26",X"03",X"F9",X"02",X"CE",X"02",X"A6",X"02",X"80",X"02",
X"5C",X"02",X"3A",X"02",X"1A",X"02",X"FC",X"01",X"DF",X"01",X"C4",X"01",X"AB",X"01",X"93",X"01",
X"7C",X"01",X"67",X"01",X"52",X"01",X"3F",X"01",X"2D",X"01",X"1C",X"01",X"0C",X"01",X"FD",X"00",
X"EF",X"00",X"E2",X"00",X"D5",X"00",X"C9",X"00",X"BD",X"00",X"B3",X"00",X"A9",X"00",X"9F",X"00",
X"96",X"00",X"8E",X"00",X"86",X"00",X"7E",X"00",X"77",X"00",X"70",X"00",X"6A",X"00",X"64",X"00",
X"5E",X"00",X"59",X"00",X"54",X"00",X"4F",X"00",X"4B",X"00",X"46",X"00",X"46",X"3F",X"38",X"31",
X"2B",X"26",X"21",X"1C",X"18",X"15",X"12",X"0F",X"0D",X"0C",X"0B",X"0A",X"3A",X"04",X"30",X"FE",
X"00",X"C2",X"F5",X"0D",X"3E",X"01",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"02",X"2E",X"00",X"CD",
X"34",X"04",X"3E",X"03",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"01",X"CD",X"7B",X"03",X"3E",X"02",
X"CD",X"7B",X"03",X"3E",X"03",X"CD",X"7B",X"03",X"21",X"EA",X"0A",X"11",X"14",X"30",X"01",X"30",
X"00",X"ED",X"B0",X"3A",X"12",X"30",X"07",X"4F",X"07",X"81",X"4F",X"06",X"00",X"21",X"F3",X"0E",
X"09",X"11",X"16",X"30",X"CD",X"E0",X"0A",X"11",X"26",X"30",X"CD",X"E0",X"0A",X"11",X"36",X"30",
X"7E",X"12",X"CD",X"E7",X"0A",X"7E",X"12",X"23",X"13",X"C9",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"01",X"00",X"00",X"00",X"00",X"01",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"01",X"01",X"00",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"3A",X"04",X"30",X"FE",X"00",X"C2",
X"7B",X"0E",X"DD",X"21",X"14",X"30",X"CD",X"E0",X"05",X"DD",X"7E",X"08",X"FE",X"01",X"28",X"28",
X"FE",X"02",X"28",X"3B",X"DD",X"21",X"24",X"30",X"CD",X"EF",X"05",X"DD",X"21",X"34",X"30",X"CD",
X"09",X"06",X"3C",X"28",X"02",X"AF",X"C9",X"DD",X"21",X"14",X"30",X"3E",X"FF",X"DD",X"BE",X"00",
X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",X"C9",X"DD",X"21",X"14",X"30",X"CD",X"32",X"06",X"DD",
X"21",X"34",X"30",X"CD",X"41",X"06",X"DD",X"21",X"24",X"30",X"CD",X"41",X"06",X"18",X"15",X"DD",
X"21",X"14",X"30",X"CD",X"23",X"06",X"DD",X"21",X"24",X"30",X"CD",X"EF",X"05",X"DD",X"21",X"34",
X"30",X"CD",X"41",X"06",X"DD",X"21",X"14",X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"09",X"DD",
X"BE",X"0A",X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"C8",
X"DD",X"36",X"09",X"01",X"CD",X"06",X"0C",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",
X"DD",X"36",X"09",X"02",X"CD",X"06",X"0C",X"AF",X"C9",X"0E",X"00",X"3E",X"02",X"CD",X"ED",X"03",
X"3E",X"FF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",X"28",X"09",X"DD",X"36",X"09",X"03",X"CD",X"06",
X"0C",X"AF",X"C9",X"0E",X"00",X"3E",X"03",X"CD",X"ED",X"03",X"3E",X"FF",X"C9",X"DD",X"7E",X"0A",
X"FE",X"FF",X"C8",X"DD",X"36",X"09",X"04",X"CD",X"E4",X"0C",X"AF",X"C9",X"DD",X"7E",X"0A",X"FE",
X"FF",X"C8",X"DD",X"36",X"09",X"05",X"CD",X"E4",X"0C",X"AF",X"C9",X"DD",X"7E",X"00",X"FE",X"FF",
X"C8",X"CD",X"48",X"0D",X"AF",X"C9",X"DD",X"35",X"01",X"C0",X"3A",X"7E",X"30",X"DD",X"77",X"01",
X"DD",X"CB",X"00",X"46",X"C2",X"29",X"0C",X"DD",X"7E",X"07",X"D6",X"01",X"FA",X"6F",X"06",X"DD",
X"77",X"07",X"4F",X"DD",X"7E",X"09",X"CD",X"ED",X"03",X"DD",X"35",X"00",X"C0",X"DD",X"6E",X"02",
X"DD",X"66",X"03",X"7E",X"47",X"E6",X"1F",X"CA",X"37",X"07",X"FE",X"1F",X"C2",X"45",X"07",X"23",
X"DD",X"75",X"02",X"DD",X"74",X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",X"00",
X"21",X"59",X"0C",X"09",X"5E",X"23",X"56",X"EB",X"E9",X"69",X"0C",X"9F",X"0C",X"C1",X"0C",X"B5",
X"0C",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"2A",X"07",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",
X"CB",X"21",X"06",X"00",X"21",X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"7A",X"30",X"DD",
X"73",X"04",X"DD",X"72",X"05",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",
X"21",X"60",X"09",X"09",X"5E",X"23",X"56",X"DD",X"73",X"0B",X"DD",X"72",X"0C",X"18",X"35",X"DD",
X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",X"0A",X"09",X"7E",X"32",X"7E",X"30",
X"DD",X"77",X"01",X"18",X"1F",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"08",X"18",
X"13",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",X"77",X"06",X"DD",X"77",X"07",X"DD",X"77",
X"0D",X"DD",X"77",X"0E",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",X"DD",X"74",
X"03",X"C3",X"2D",X"0C",X"DD",X"35",X"0F",X"C0",X"3A",X"7E",X"30",X"DD",X"77",X"0F",X"DD",X"CB",
X"0A",X"46",X"C2",X"17",X"0D",X"DD",X"7E",X"0E",X"D6",X"01",X"FA",X"17",X"0D",X"DD",X"77",X"0E",
X"DD",X"7E",X"09",X"FE",X"04",X"28",X"08",X"DD",X"4E",X"0E",X"3E",X"02",X"CD",X"ED",X"03",X"DD",
X"4E",X"0E",X"3E",X"03",X"CD",X"ED",X"03",X"DD",X"35",X"0A",X"C0",X"DD",X"6E",X"02",X"DD",X"66",
X"03",X"2B",X"7E",X"47",X"E6",X"1F",X"CA",X"D4",X"07",X"FE",X"1F",X"C2",X"ED",X"07",X"DD",X"7E",
X"09",X"FE",X"04",X"28",X"07",X"3E",X"02",X"0E",X"00",X"CD",X"ED",X"03",X"3E",X"03",X"0E",X"00",
X"CD",X"ED",X"03",X"DD",X"36",X"0A",X"FF",X"C9",X"DD",X"35",X"01",X"C0",X"3A",X"7E",X"30",X"DD",
X"77",X"01",X"DD",X"CB",X"00",X"46",X"C2",X"64",X"0D",X"DD",X"7E",X"07",X"D6",X"01",X"FA",X"64",
X"0D",X"DD",X"77",X"07",X"DD",X"35",X"00",X"C0",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"47",
X"E6",X"1F",X"CA",X"F0",X"08",X"FE",X"1F",X"C2",X"F6",X"08",X"23",X"DD",X"75",X"02",X"DD",X"74",
X"03",X"78",X"E6",X"E0",X"0F",X"0F",X"0F",X"0F",X"4F",X"06",X"00",X"21",X"94",X"0D",X"09",X"5E",
X"23",X"56",X"EB",X"E9",X"A4",X"0D",X"C2",X"0D",X"D8",X"0D",X"EB",X"08",X"EB",X"08",X"EB",X"08",
X"EB",X"08",X"EB",X"08",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"CB",X"21",X"06",X"00",X"21",
X"34",X"09",X"09",X"5E",X"23",X"56",X"ED",X"53",X"7A",X"30",X"DD",X"73",X"04",X"DD",X"72",X"05",
X"18",X"23",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"4E",X"06",X"00",X"21",X"7C",X"0A",X"09",X"7E",
X"32",X"7E",X"30",X"DD",X"77",X"01",X"18",X"0D",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"7E",X"DD",
X"77",X"06",X"DD",X"77",X"07",X"DD",X"6E",X"02",X"DD",X"66",X"03",X"23",X"DD",X"75",X"02",X"DD",
X"74",X"03",X"C3",X"68",X"0D",X"3E",X"01",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"02",X"2E",X"00",
X"CD",X"34",X"04",X"3E",X"03",X"2E",X"00",X"CD",X"34",X"04",X"3E",X"01",X"CD",X"7B",X"03",X"3E",
X"02",X"CD",X"7B",X"03",X"3E",X"03",X"CD",X"7B",X"03",X"21",X"4B",X"0E",X"11",X"4A",X"30",X"01",
X"30",X"00",X"ED",X"B0",X"3A",X"80",X"30",X"07",X"4F",X"07",X"81",X"4F",X"06",X"00",X"21",X"F3",
X"0E",X"09",X"11",X"4C",X"30",X"CD",X"41",X"0E",X"11",X"5C",X"30",X"CD",X"41",X"0E",X"11",X"6C",
X"30",X"7E",X"12",X"CD",X"48",X"0E",X"7E",X"12",X"23",X"13",X"C9",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"01",X"00",X"00",X"00",X"00",X"01",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"01",X"01",X"00",X"00",X"00",
X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"00",X"DD",X"21",X"4A",X"30",X"CD",
X"9A",X"0B",X"DD",X"7E",X"08",X"FE",X"01",X"28",X"28",X"FE",X"02",X"28",X"3B",X"DD",X"21",X"5A",
X"30",X"CD",X"A9",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"C3",X"0B",X"3C",X"28",X"02",X"AF",X"C9",
X"DD",X"21",X"4A",X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"04",X"DD",X"BE",X"10",X"C8",X"AF",
X"C9",X"DD",X"21",X"4A",X"30",X"CD",X"EC",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"FB",X"0B",X"DD",
X"21",X"5A",X"30",X"CD",X"FB",X"0B",X"18",X"15",X"DD",X"21",X"4A",X"30",X"CD",X"DD",X"0B",X"DD",
X"21",X"5A",X"30",X"CD",X"A9",X"0B",X"DD",X"21",X"6A",X"30",X"CD",X"FB",X"0B",X"DD",X"21",X"4A",
X"30",X"3E",X"FF",X"DD",X"BE",X"00",X"20",X"09",X"DD",X"BE",X"0A",X"20",X"04",X"DD",X"BE",X"10",
X"C8",X"AF",X"C9",X"6B",X"10",X"81",X"10",X"95",X"10",X"9D",X"10",X"CD",X"10",X"FB",X"10",X"BD",
X"13",X"0F",X"14",X"5F",X"14",X"23",X"11",X"34",X"11",X"43",X"11",X"6B",X"10",X"81",X"10",X"95",
X"10",X"52",X"11",X"EC",X"11",X"24",X"12",X"5C",X"12",X"AE",X"12",X"FE",X"12",X"6B",X"10",X"81",
X"10",X"95",X"10",X"BF",X"14",X"D1",X"14",X"0A",X"15",X"6B",X"10",X"81",X"10",X"95",X"10",X"FC",
X"10",X"11",X"11",X"22",X"11",X"6B",X"10",X"81",X"10",X"95",X"10",X"60",X"14",X"90",X"14",X"BE",
X"14",X"FF",X"12",X"15",X"13",X"29",X"13",X"31",X"13",X"40",X"13",X"49",X"13",X"4A",X"13",X"59",
X"13",X"62",X"13",X"6B",X"10",X"81",X"10",X"95",X"10",X"6B",X"10",X"81",X"10",X"95",X"10",X"63",
X"13",X"7F",X"13",X"80",X"13",X"81",X"13",X"9D",X"13",X"9E",X"13",X"9F",X"13",X"BB",X"13",X"BC",
X"13",X"6B",X"10",X"81",X"10",X"95",X"10",X"6B",X"10",X"81",X"10",X"95",X"10",X"3E",X"00",X"32",
X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",X"01",
X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",X"3E",
X"08",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",X"C9",
X"3E",X"03",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",X"0B",
X"C9",X"3E",X"0C",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",X"1A",
X"0B",X"C9",X"3E",X"05",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",X"CD",
X"1A",X"0B",X"C9",X"3E",X"06",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF",X"C9",
X"CD",X"1A",X"0B",X"C9",X"3E",X"0A",X"32",X"12",X"30",X"32",X"80",X"30",X"CD",X"8C",X"0A",X"AF");
begin
process(clk)
begin
if rising_edge(clk) then
data <= rom_data(to_integer(unsigned(addr)));
end if;
end process;
end architecture;

38
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_sprite_color_lut.vhd Normal file
View File

@@ -0,0 +1,38 @@
library ieee;
use ieee.std_logic_1164.all,ieee.numeric_std.all;
entity time_pilot_sprite_color_lut is
port (
clk : in std_logic;
addr : in std_logic_vector(7 downto 0);
data : out std_logic_vector(3 downto 0)
);
end entity;
architecture prom of time_pilot_sprite_color_lut is
type rom is array(0 to 255) of std_logic_vector(3 downto 0);
signal rom_data: rom := (
"0000","1101","1111","0101","0000","1110","0110","1010","0000","0100","1001","0001","0000","0100","1001","0001",
"0000","0100","1001","0001","0000","1100","0101","0001","0000","1110","0101","0001","0000","1101","0101","0001",
"0000","1011","0101","0001","0000","0001","1111","0100","0000","0001","1111","0100","0000","0001","1111","0100",
"0000","1000","0111","1100","0000","0001","1111","0100","0000","0001","1111","0100","0000","1010","0101","0001",
"0000","0101","1001","0001","0000","1011","1101","0101","0000","0110","0101","0001","0000","1010","0011","0001",
"0000","1100","0011","0001","0000","1110","0011","0001","0000","1101","0011","0001","0000","1011","0011","0001",
"0000","1110","1100","1111","0000","0101","0011","0001","0000","1110","0110","1001","0000","0100","1001","0101",
"0000","1001","1110","0110","0000","0100","1110","0101","0000","1001","1110","0101","0000","1011","0101","0001",
"0000","1100","0111","0001","0000","0101","1111","1001","0000","0101","0100","1001","0000","1010","0011","0001",
"0000","1100","0010","0011","0000","1100","0110","0011","0000","1100","0110","1001","0000","1100","0110","0001",
"0000","1110","0110","1100","0000","1100","0010","1111","0000","1100","0010","1001","0000","1100","0010","0001",
"0000","0001","1000","1111","0000","1110","0110","1111","0000","1001","1010","1111","0000","0101","0110","1111",
"0000","1011","1001","0101","0000","1010","0110","1100","0000","1010","0110","1001","0000","1010","0010","1001",
"0000","0110","0001","1111","0000","0100","0001","1111","0000","1010","0011","0001","0000","1010","0010","1100",
"0000","0101","1001","0001","0000","1010","0010","0001","0000","1110","0010","1001","0000","1110","0010","1100",
"0000","0001","0100","1111","0000","0001","0100","1111","0000","1111","1111","1111","0000","0000","0000","0000");
begin
process(clk)
begin
if rising_edge(clk) then
data <= rom_data(to_integer(unsigned(addr)));
end if;
end process;
end architecture;

1046
Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/time_pilot_sprite_grphx.vhd Normal file
View File

File diff suppressed because it is too large Load Diff

0
Arcade_MiST/Time Pilot Hardware/Time_Pilot_MiST/rtl/video_mixer.sv → Arcade_MiST/Konami Classic/Power_Surge_MiST/rtl/video_mixer.sv
View File

4
Arcade_MiST/Konami Classic/ReadMe.txt Normal file
View File

@@ -0,0 +1,4 @@
Games that should work on this Hardware
Chance Kun
Bikkuri Card

0
Arcade_MiST/Time Pilot Hardware/Time Pilot.jpg → Arcade_MiST/Konami Classic/Time Pilot.jpg
View File

Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 2.2 MiB

After

Width:  |  Height:  |  Size: 2.2 MiB

Some files were not shown because too many files have changed in this diff Show More