1
0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-29 04:51:01 +00:00

IremM62: 256/384 pixel wide switch

This commit is contained in:
Gyorgy Szombathelyi
2020-03-04 19:15:03 +01:00
parent 8493abb8a2
commit e3c642c295
6 changed files with 19 additions and 11 deletions

View File

@@ -50,6 +50,7 @@ architecture SYN of Graphics is
signal rgb_data : RGB_t;
-- before OSD is mixed in
signal video_o_s : to_VIDEO_t;
signal irem62_hsize : integer range 0 to 384;
begin
@@ -69,13 +70,15 @@ begin
graphics_o.hblank <= video_o_s.hblank;
graphics_o.vblank <= video_o_s.vblank;
--graphics_o.vblank <= from_video_ctl.vblank;
irem62_hsize <= 384 when hwsel = HW_LDRUN else 256;
pace_video_controller_inst : entity work.pace_video_controller
generic map
(
CONFIG => PACE_VIDEO_CONTROLLER_TYPE,
DELAY => PACE_VIDEO_PIPELINE_DELAY,
H_SIZE => PACE_VIDEO_H_SIZE,
--H_SIZE => PACE_VIDEO_H_SIZE,
V_SIZE => PACE_VIDEO_V_SIZE,
L_CROP => PACE_VIDEO_L_CROP,
R_CROP => PACE_VIDEO_R_CROP,
@@ -89,6 +92,7 @@ begin
(
-- clocking etc
video_i => video_i,
H_SIZE => irem62_hsize,
-- register interface
reg_i.h_scale => "000",

View File

@@ -42,14 +42,14 @@ package platform_pkg is
constant PACE_VIDEO_BORDER_RGB : RGB_t := RGB_BLACK;
constant M62_VIDEO_H_SIZE : integer := 384;
constant M62_VIDEO_H_OFFSET : integer := (512-M62_VIDEO_H_SIZE)/2;
-- constant M62_VIDEO_H_SIZE : integer := 384;
-- constant M62_VIDEO_H_OFFSET : integer := (512-M62_VIDEO_H_SIZE)/2;
constant M62_VIDEO_V_SIZE : integer := 256;
constant PACE_VIDEO_NUM_BITMAPS : natural := 0;
constant PACE_VIDEO_NUM_TILEMAPS : natural := 1;
constant PACE_VIDEO_NUM_SPRITES : natural := 32;
constant PACE_VIDEO_H_SIZE : integer := M62_VIDEO_H_SIZE;
-- constant PACE_VIDEO_H_SIZE : integer := M62_VIDEO_H_SIZE;
constant PACE_VIDEO_V_SIZE : integer := M62_VIDEO_V_SIZE;
constant PACE_VIDEO_L_CROP : integer := 0;
constant PACE_VIDEO_R_CROP : integer := PACE_VIDEO_L_CROP;

View File

@@ -78,7 +78,7 @@ begin
ld_r <= ctl_i.ld;
if video_ctl.hblank = '1' then
x := unsigned(reg_i.x) - M62_VIDEO_H_OFFSET + PACE_VIDEO_PIPELINE_DELAY - 3;
x := unsigned(reg_i.x) - video_ctl.video_h_offset + PACE_VIDEO_PIPELINE_DELAY - 3;
y := 256 + 128 - 18 - unsigned(reg_i.y);
-- hande sprite height, placement

View File

@@ -58,8 +58,8 @@ begin
ctl_o.tile_a(ctl_o.tile_a'left downto 13) <= (others => '0');
-- screen rotation
x <= std_logic_vector(M62_VIDEO_H_OFFSET + unsigned(video_ctl.x)) when unsigned(y) < 6*8 else
std_logic_vector(M62_VIDEO_H_OFFSET + unsigned(video_ctl.x) + unsigned(hscroll(8 downto 0)));
x <= std_logic_vector(video_ctl.video_h_offset + unsigned(video_ctl.x)) when unsigned(y) < 6*8 else
std_logic_vector(video_ctl.video_h_offset + unsigned(video_ctl.x) + unsigned(hscroll(8 downto 0)));
-- when rot_en = '0' else not video_ctl.y;
--y <= not video_ctl.y when rot_en = '0' else 32 + video_ctl.x;
y <= video_ctl.y; -- when rot_en = '0' else video_ctl.x;

View File

@@ -4,13 +4,13 @@ use ieee.numeric_std.all;
library work;
use work.video_controller_pkg.all;
use ieee.numeric_std.all;
entity pace_video_controller is
generic
(
CONFIG : PACEVideoController_t := PACE_VIDEO_NONE;
DELAY : integer := 1;
H_SIZE : integer;
V_SIZE : integer;
L_CROP : integer range 0 to 255;
R_CROP : integer range 0 to 255;
@@ -24,6 +24,7 @@ entity pace_video_controller is
(
-- clocking etc
video_i : in from_VIDEO_t;
H_SIZE : integer;
-- register interface
reg_i : in VIDEO_REG_t;
@@ -43,7 +44,7 @@ architecture SYN of pace_video_controller is
constant SIM_DELAY : time := 2 ns;
constant VIDEO_H_SIZE : integer := H_SIZE * H_SCALE;
signal VIDEO_H_SIZE : integer := H_SIZE * H_SCALE;
constant VIDEO_V_SIZE : integer := V_SIZE * V_SCALE;
subtype reg_t is integer range 0 to 2047;
@@ -99,8 +100,10 @@ architecture SYN of pace_video_controller is
begin
video_ctl_o.video_h_offset <= to_integer(shift_right(to_unsigned(512-VIDEO_H_SIZE, 9), 1));
-- registers
reg_proc: process (reset, clk)
reg_proc: process (reset, clk, VIDEO_H_SIZE)
begin
--if reset = '1' then

View File

@@ -81,6 +81,7 @@ package video_controller_pkg is
vblank : std_logic;
x : std_logic_vector(10 downto 0);
y : std_logic_vector(10 downto 0);
video_h_offset : integer range 0 to 511;
end record;
subtype BITMAP_D_t is std_logic_vector(23 downto 0);