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Nova2001: add Penguin-Kun Wars

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This commit is contained in:
Gyorgy Szombathelyi 2021-06-15 14:13:33 +02:00
parent dd8ef75e04
commit e4d7aabcd9
11 changed files with 131 additions and 42 deletions
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53
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/meta/Penguin-Kun Wars (US).mra Normal file
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@ -0,0 +1,53 @@
<misterromdescription>
<name>Penguin-Kun Wars (US)</name>
<region></region>
<homebrew>no</homebrew>
<bootleg>no</bootleg>
<version></version>
<alternative></alternative>
<platform></platform>
<series></series>
<year>1984</year>
<manufacturer>UPL</manufacturer>
<manufacturer>Taito</manufacturer>
<category>Ping-Pong</category>
<setname>pkunwar</setname>
<parent>ninjakun</parent>
<mameversion>0220</mameversion>
<rbf>ninjakun</rbf>
<resolution>15kHz</resolution>
<rotation>horizontal</rotation>
<flip></flip>
<players>2 (alternating)</players>
<joystick>2-way horizontal</joystick>
<special_controls></special_controls>
<num_buttons>2</num_buttons>
<button_names></button_names>
<switches default="FF,FB" base="8" page_id="1" page_name="Switches">
<dip bits="8,9" name="Coinage" ids="3C_1C,2C_1C,1C_2C,1C_1C"/>
<dip bits="10" name="Cabinet" ids="Upright,Cocktail"/>
<dip bits="11" name="Demo Sounds" ids="No,Yes"/>
<dip bits="12,13" name="Difficulty" ids="Hardest,Easy,Hard,Medium"/>
<dip bits="15" name="Free Play" ids="Yes,No"/>
</switches>
<rom index="1"><part>3</part></rom>
<rom index="0" zip="pkunwar.zip" md5="3b92989220c556eb9b89aa10d630e30a">
<!-- gfx1 -->
<part name="pkwar.01y"/>
<part name="pkwar.02y"/>
<part name="pkwar.03y"/>
<part name="pkwar.04y"/>
<!-- main cpu -->
<part name="pkwar.01r"/>
<part name="pkwar.02r"/>
<!-- sub cpu -->
<part name="pkwar.col"/>
<part repeat="0x5fe0">AA</part>
<part name="pkwar.03r"/>
</rom>
</misterromdescription>

17
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/NinjaKun_MiST.sv
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@ -67,6 +67,9 @@ always @(*) begin
CTR1 = ~{m_fireA, m_fireB, 2'b00, m_right, m_left, m_down, m_up};
CTR2 = ~{m_fire2A, m_fire2B, 2'b00, m_right2, m_left2, m_down2, m_up2};
CTR3 = ~{5'b00000, m_two_players, m_one_player, m_coin1 | m_coin2};
end else if (hwtype == `HW_PKUNWAR) begin
CTR1 = ~{2'b00, m_one_player, 2'b00, m_fireA, m_right, m_left };
CTR2 = ~{(m_coin1 | m_coin2), service, m_two_players, 2'b00, m_fire2A, m_right2, m_left2 };
end
end
@ -122,14 +125,14 @@ data_io data_io(
wire [24:0] cpu_ioctl_addr = ioctl_addr - 17'h10000;
reg port1_req, port2_req;
wire [14:0] cpu1_rom_addr, cpu2_rom_addr;
wire [15:0] cpu1_rom_addr, cpu2_rom_addr;
wire [15:0] cpu1_rom_do, cpu2_rom_do;
wire [12:0] sp_rom_addr;
wire [13:0] sp_rom_addr;
wire [31:0] sp_rom_do;
wire sp_rdy;
wire [12:0] fg_rom_addr;
wire [31:0] fg_rom_do;
wire [12:0] bg_rom_addr;
wire [13:0] bg_rom_addr;
wire [31:0] bg_rom_do;
sdram #(96) sdram(
@ -146,9 +149,9 @@ sdram #(96) sdram(
.port1_d ( {ioctl_dout, ioctl_dout} ),
.port1_q ( ),
.cpu1_addr ( ioctl_downl ? 16'hffff : {1'b0, cpu1_rom_addr[14:1]} ),
.cpu1_addr ( ioctl_downl ? 16'hffff : {1'b0, cpu1_rom_addr[15:1]} ),
.cpu1_q ( cpu1_rom_do ),
.cpu2_addr ( ioctl_downl ? 16'hffff : {1'b1, cpu2_rom_addr[14:1]} ),
.cpu2_addr ( ioctl_downl ? 16'hffff : {2'b01, cpu2_rom_addr[14:1]} ),
.cpu2_q ( cpu2_rom_do ),
// port2 for graphics
@ -162,10 +165,10 @@ sdram #(96) sdram(
.fg_addr ( ioctl_downl ? 15'h7fff : {1'b0, fg_rom_addr} ),
.fg_q ( fg_rom_do ),
.sp_addr ( ioctl_downl ? 15'h7fff : {1'b0, sp_rom_addr} ),
.sp_addr ( ioctl_downl ? 15'h7fff : sp_rom_addr ),
.sp_q ( sp_rom_do ),
.sp_rdy ( sp_rdy ),
.bg_addr ( ioctl_downl ? 15'h7fff : {1'b1, bg_rom_addr} ),
.bg_addr ( ioctl_downl ? 15'h7fff : bg_rom_addr ),
.bg_q ( bg_rom_do )
);

1
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/defs.v
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@ -1,3 +1,4 @@
`define HW_NINJAKUN 2'd0
`define HW_RAIDERS5 2'd1
`define HW_NOVA2001 2'd2
`define HW_PKUNWAR 2'd3

9
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_adec.v
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@ -45,6 +45,15 @@ always @(*) begin
CS_SH0 = (CP0AD[15:11] == 5'b1110_0);
CS_SH1 = 0;
SYNWR0 = 0;
SYNWR1 = 0;
end else if (HWTYPE == `HW_PKUNWAR) begin
CS_IN0 = 0;
CS_IN1 = 0;
CS_SH0 = (CP0AD[15:11] == 5'b1100_0);
CS_SH1 = 0;
SYNWR0 = 0;
SYNWR1 = 0;
end

6
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_io_video.v
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@ -21,12 +21,12 @@ module ninjakun_io_video
output VBLK,
output [7:0] POUT,
output [15:0] SNDOUT,
output [12:0] sp_rom_addr,
output [13:0] sp_rom_addr,
input [31:0] sp_rom_data,
input sp_rdy,
output [12:0] fg_rom_addr,
input [31:0] fg_rom_data,
output [12:0] bg_rom_addr,
output [13:0] bg_rom_addr,
input [31:0] bg_rom_data,
input [4:0] PALADR,
input PALWR,
@ -100,7 +100,7 @@ end
wire [7:0] PSDAT, FGDAT = CPADR[10] ? FGDAT16[15:8] : FGDAT16[7:0], BGDAT = CPADR[10] ? BGDAT16[15:8] : BGDAT16[7:0], SPDAT, PLDAT;
wire [15:0] FGDAT16, BGDAT16;
wire [9:0] BGOFS = CPADR[9:0]+{SCRPY[7:3],SCRPX[7:3]};
wire [10:0] BGADR = HWTYPE[1] ? CPADR : {CPADR[10],BGOFS};
wire [10:0] BGADR = HWTYPE[1] ? CPADR[10:0] : {CPADR[10],BGOFS};
dpram #(8,10) fgv_lo(MCLK, CS_FGV & CPWRT & ~CPADR[10], CPADR[9:0], CPODT, FGDAT16[ 7:0], MCLK, 1'b0, FGVAD, 8'd0, FGVDT[ 7:0]);
dpram #(8,10) fgv_hi(MCLK, CS_FGV & CPWRT & CPADR[10], CPADR[9:0], CPODT, FGDAT16[15:8], MCLK, 1'b0, FGVAD, 8'd0, FGVDT[15:8]);

5
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_main.v
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@ -15,7 +15,7 @@ module ninjakun_main(
output CPWRT,
output CPSEL,
output [14:0] CPU1ADDR,
output [15:0] CPU1ADDR,
input [7:0] CPU1DT,
output [14:0] CPU2ADDR,
input [7:0] CPU2DT
@ -111,7 +111,7 @@ ninjakun_adec adec(
wire [7:0] ROM0D, ROM1D;
assign CPU1ADDR = CP0AD[14:0];
assign CPU1ADDR = CP0AD;
assign ROM0D = CPU1DT;
assign CPU2ADDR = CP1AD[14:0];
assign ROM1D = CPU2DT;
@ -146,6 +146,7 @@ ninjakun_input inps(
assign CP0DT = CS_IN0 ? INPD0 :
CS_SH0 ? SHDT0 :
~CP0AD[15] ? ROM0D :
(HWTYPE == `HW_PKUNWAR && CP0AD[15:13] == 3'b111) ? ROM0D :
CP0ID;
assign CP1DT = CS_IN1 ? INPD1 :

8
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_psg.v
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@ -37,7 +37,7 @@ always @(posedge MCLK) begin
if (encnt == 7) encnt <= 0; // 6 MHz
`HW_NOVA2001:
if (encnt == 11) encnt <= 0; // 4 MHz
default: ;
default: ; // 3 MHz
endcase
case (S0c)
@ -68,6 +68,8 @@ wire [7:0] IOA_PSG1, IOB_PSG1;
assign SCRPX = HWTYPE == `HW_NOVA2001 ? IOA_PSG0 : IOA_PSG1;
assign SCRPY = HWTYPE == `HW_NOVA2001 ? IOB_PSG0 : IOB_PSG1;
wire IO_TYPE = HWTYPE == `HW_RAIDERS5 || HWTYPE == `HW_PKUNWAR;
YM2149 psg0(
.I_DA(ID),
.O_DA(OD0),
@ -79,8 +81,8 @@ YM2149 psg0(
.I_SEL_L(1'b0),
.O_AUDIO(S0x),
.O_CHAN(S0c),
.I_IOA(HWTYPE == `HW_RAIDERS5 ? {~VBLK, CTR1[6:0]} : DSW1),
.I_IOB(HWTYPE == `HW_RAIDERS5 ? CTR2 : DSW2),
.I_IOA(IO_TYPE ? {~VBLK, CTR1[6:0]} : DSW1),
.I_IOB(IO_TYPE ? CTR2 : DSW2),
.O_IOA(IOA_PSG0),
.O_IOB(IOB_PSG0),
.ENA(ENA),

16
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sadec.v
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@ -58,7 +58,21 @@ always @(*) begin
CS_BGV = ( CPADR[15:11] == 5'b1010_1 );
CS_SPA = ( CPADR[15:11] == 5'b1011_0 );
end
end else if (HWTYPE == `HW_PKUNWAR) begin
CS_SCRX = 0;
CS_SCRY = 0;
CS_PAL = 0;
CS_FGV = 0;
if (CPSEL) begin
CS_PSG = 0;
CS_BGV = 0;
CS_SPA = 0;
end else begin
CS_PSG = ( CPADR[15: 2] == 14'b1010_0000_0000_00 );
CS_BGV = ( CPADR[15:11] == 5'b1000_1 );
CS_SPA = ( CPADR[15:11] == 5'b1000_0 );
end
end
end
endmodule
endmodule

8
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sprite.v
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@ -13,7 +13,7 @@ module NINJAKUN_SP
output [10:0] SPAAD,
input [7:0] SPADT,
output [12:0] SPCAD,
output [13:0] SPCAD,
input [31:0] SPCDT,
input SPCFT,
@ -66,7 +66,7 @@ module NINJAKUN_SPENG
output [10:0] SPAAD,
input [7:0] SPADT,
output reg [12:0] SPCAD,
output reg [13:0] SPCAD,
input [31:0] SPCDT,
input SPCFT,
@ -101,7 +101,7 @@ wire [3:0] WOFS = {4{FLIPH}}^(WP[3:0]);
assign WPAD = {1'b0,XPOS}-{XPOSH,8'h0}+WOFS-1'd1;
assign WPEN = ~(WP[4]|(WPIX[3:0]==0));
reg [7:0] PTNO;
reg [8:0] PTNO;
reg CRS;
function [3:0] XOUT;
@ -135,7 +135,7 @@ reg [2:0] STATE;
always @( posedge MCLK ) begin
if (RESET) begin
STATE <= `WAIT;
SPCAD <= 13'h1fff;
SPCAD <= 14'h3fff;
end else
case (STATE)

6
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_top.v
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@ -22,16 +22,16 @@ module ninjakun_top
output PCLK_EN, // PIXEL CLOCK ENABLE
output [7:0] POUT, // PIXEL OUT
output [15:0] SNDOUT, // Sound Output (LPCM unsigned 16bits)
output [14:0] CPU1ADDR,
output [15:0] CPU1ADDR,
input [7:0] CPU1DT,
output [14:0] CPU2ADDR,
input [7:0] CPU2DT,
output [12:0] sp_rom_addr,
output [13:0] sp_rom_addr,
input [31:0] sp_rom_data,
input sp_rdy,
output [12:0] fg_rom_addr,
input [31:0] fg_rom_data,
output [12:0] bg_rom_addr,
output [13:0] bg_rom_addr,
input [31:0] bg_rom_data,
input [4:0] PALADR,
input PALWR,

44
Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_video.v
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@ -26,30 +26,28 @@ module NINJAKUN_VIDEO
output VBLK,
input DBGPD, // Palet Display (for Debug)
output [12:0] sp_rom_addr,
output [13:0] sp_rom_addr,
input [31:0] sp_rom_data,
input sp_rdy,
output [12:0] fg_rom_addr,
input [31:0] fg_rom_data,
output [12:0] bg_rom_addr,
output [13:0] bg_rom_addr,
input [31:0] bg_rom_data
);
`include "rtl/defs.v"
wire RAIDERS5 = HWTYPE == `HW_RAIDERS5;
assign VBLK = (PV>=193);
// ROMs
wire SPCFT = sp_rdy;
wire [12:0] SPCAD;
wire [13:0] SPCAD;
wire [31:0] SPCDT;
wire [12:0] FGCAD;
wire [31:0] FGCDT;
wire [12:0] BGCAD;
wire [13:0] BGCAD;
wire [31:0] BGCDT;
//NJFGROM sprom(~VCLKx4, SPCAD, SPCDT, ROMCL, ROMAD, ROMDT, ROMEN);
@ -74,11 +72,11 @@ NINJAKUN_FG fg(
FGCAD, FGCDT,
{FGPRI, FGOUT}
);
wire FGOPQ =(FGOUT[3:0]!=0);
wire FGPPQ = FGOPQ & (~FGPRI);
wire FGOPQ = HWTYPE != `HW_PKUNWAR & (FGOUT[3:0]!=0);
wire FGPPQ = HWTYPE != `HW_PKUNWAR & FGOPQ & (~FGPRI);
// Back-Ground Scanline Generator
wire [8:0] BGOUT;
wire [8:0] BGOUT, BGPRI;
NINJAKUN_BG bg(
MCLK, PCLK_EN, HWTYPE,
@ -86,14 +84,16 @@ NINJAKUN_BG bg(
BGSCX, BGSCY,
BGVAD, BGVDT,
BGCAD, BGCDT,
BGOUT
BGOUT, BGPRI
);
wire BGFRC = BGPRI && BGOUT[3:0] != 0;
// Sprite Scanline Generator
wire [8:0] SPOUT;
NINJAKUN_SP sp(
MCLK, PCLK_EN, RESET, RAIDERS5,
MCLK, PCLK_EN, RESET, (HWTYPE == `HW_PKUNWAR || HWTYPE == `HW_RAIDERS5),
PH, PV,
SPAAD, SPADT,
SPCAD, SPCDT, SPCFT,
@ -106,6 +106,7 @@ wire [8:0] PDOUT = (PV[7]|PV[8]) ? 9'd0 : {PV[6:2],PH[7:4]};
// Color Mixer
assign PALAD = DBGPD ? PDOUT :
BGFRC ? BGOUT :
FGPPQ ? FGOUT :
SPOPQ ? SPOUT :
FGOPQ ? FGOUT :
@ -175,18 +176,20 @@ module NINJAKUN_BG
output reg [9:0] BGVAD, // VRAM
input [15:0] BGVDT,
output reg [12:0] BGCAD,
output reg [13:0] BGCAD,
input [31:0] BGCDT,
output [8:0] BGOUT // OUTPUT
output [8:0] BGOUT, // OUTPUT
output reg BGPRI
);
wire [8:0] POSH = PH+BGSCX+(HWTYPE == `HW_NOVA2001 ? 9'd9 : 9'd2) /* synthesis keep */;
wire [8:0] POSH = PH+BGSCX+((HWTYPE == `HW_NOVA2001 || HWTYPE == `HW_PKUNWAR) ? 9'd9 : 9'd2) /* synthesis keep */;
wire [8:0] POSV = PV+BGSCY+9'd32;
wire [9:0] CHRNO = HWTYPE == `HW_RAIDERS5 ? {1'b0, BGVDT[8:0]} :
HWTYPE == `HW_NOVA2001 ? {2'b10, BGVDT[7:0]}:
{BGVDT[15:14],BGVDT[7:0]};
wire [10:0] CHRNO = HWTYPE == `HW_RAIDERS5 ? {2'b10, BGVDT[8:0]} :
HWTYPE == `HW_NOVA2001 ? {3'b110, BGVDT[7:0]}:
HWTYPE == `HW_PKUNWAR ? BGVDT[10:0]:
{1'b1,BGVDT[15:14],BGVDT[7:0]};
reg [31:0] CDT;
reg [3:0] PAL;
@ -194,7 +197,10 @@ reg [3:0] OUT;
always @( posedge MCLK ) begin
if (PCLK_EN)
case(POSH[2:0])
0: begin OUT <= CDT[7:4] ; PAL <= HWTYPE == `HW_RAIDERS5 ? BGVDT[15:12] : BGVDT[11:8]; end
0: begin OUT <= CDT[7:4] ;
PAL <= (HWTYPE == `HW_RAIDERS5 || HWTYPE == `HW_PKUNWAR) ? BGVDT[15:12] : BGVDT[11:8];
BGPRI <= HWTYPE == `HW_PKUNWAR && BGVDT[11];
end
1: begin OUT <= CDT[3:0] ; BGVAD <= {POSV[7:3],POSH[7:3]}; end
2: begin OUT <= CDT[15:12]; end
3: begin OUT <= CDT[11:8] ; end
@ -205,6 +211,6 @@ always @( posedge MCLK ) begin
endcase
end
assign BGOUT = HWTYPE == `HW_NOVA2001 ? {1'b1, (OUT == 4'h1 ? PAL : OUT)} : { 1'b1, PAL, OUT };
assign BGOUT = HWTYPE[1] ? {1'b1, (OUT == 4'h1 ? PAL : OUT)} : { 1'b1, PAL, OUT };
endmodule