Nova2001: add Raiders5

2026-02-03 23:22:42 +00:00 · 2021-06-13 01:40:24 +02:00
parent 426ea2e809
commit e912a2fefc
12 changed files with 336 additions and 182 deletions
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/meta/Ninjakun.mra
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/meta/Ninjakun.mra
@@ -41,20 +41,24 @@
 		<dip bits="15" name="Infinite Lives" ids="Yes,No"/>
 	</switches>

-	<rom index="1"></rom>
+	<rom index="1"><part>0</part></rom>
 	<rom index="0" zip="ninjakun.zip" md5="99e80f22f7a77cf1d574ce89486b385f">
+		<!-- gfx1 -->
 		<part crc="a74c4297" name="ninja-6.7n"/>
 		<part crc="53a72039" name="ninja-7.7p"/>
 		<part crc="4a99d857" name="ninja-8.7s"/>
 		<part crc="dede49e4" name="ninja-9.7t"/>
+		<!-- gfx2 -->
 		<part crc="0d55664a" name="ninja-10.2c"/>
 		<part crc="12ff9597" name="ninja-11.2d"/>
 		<part crc="e9b75807" name="ninja-12.4c"/>
 		<part crc="1760ed2c" name="ninja-13.4d"/>
+		<!-- main cpu -->
 		<part crc="1c1dc141" name="ninja-1.7a"/>
 		<part crc="39cc7d37" name="ninja-2.7b"/>
 		<part crc="d542bfe3" name="ninja-3.7d"/>
 		<part crc="a57385c6" name="ninja-4.7e"/>
+		<!-- sub cpu -->
 		<part crc="164a42c4" name="ninja-5.7h"/>
 		<part crc="39cc7d37" name="ninja-2.7b"/>
 		<part crc="d542bfe3" name="ninja-3.7d"/>
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/meta/Raiders5.mra
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/meta/Raiders5.mra
@@ -0,0 +1,58 @@
+<misterromdescription>
+	<name>Raiders5</name>
+	<region></region>
+	<homebrew>no</homebrew>
+	<bootleg>no</bootleg>
+	<version></version>
+	<alternative></alternative>
+	<platform></platform>
+	<series></series>
+	<year>1984</year>
+	<manufacturer>UPL</manufacturer>
+	<manufacturer>Taito</manufacturer>
+	<category>Platform - Climb</category>
+
+	<setname>raiders5</setname>
+	<parent>ninjakun</parent>
+	<mameversion>0220</mameversion>
+	<rbf>ninjakun</rbf>
+
+	<resolution>15kHz</resolution>
+	<rotation>horizontal</rotation>
+	<flip></flip>
+
+	<players>2 (alternating)</players>
+	<joystick>2-way horizontal</joystick>
+	<special_controls></special_controls>
+	<num_buttons>2</num_buttons>
+	<button_names></button_names>
+
+	<switches default="FE,F7" base="8" page_id="1" page_name="Switches">
+		<dip bits="0" name="Cabinet" ids="Upright,Cocktail"/>
+		<dip bits="1,2" name="Lives" ids="5,2,3,4"/>
+		<dip bits="3" name="First Bonus" ids="40000,30000"/>
+		<dip bits="4,5" name="Second Bonus" ids="No Bonus,Every 90000,Every 70000,Every 50000"/>
+		<dip bits="6" name="Excercise" ids="No,Yes"/>
+		<dip bits="7" name="Difficulty" ids="Hard,Normal"/>
+		<dip bits="11" name="High Score Names" ids="3 Letters,8 Letters"/>
+		<dip bits="12" name="Allow Continue" ids="No,Yes"/>
+		<dip bits="14" name="Free Play" ids="Yes,No"/>
+		<dip bits="15" name="Infinite Lives" ids="Yes,No"/>
+	</switches>
+
+	<rom index="1"><part>1</part></rom>
+	<rom index="0" zip="raiders5.zip" md5="83c877496c528fc21fe8a3ec67fea006">
+		<!-- gfx1 -->
+		<part name="raiders3.11f"/>
+		<part name="raiders4.11g"/>
+		<!-- gfx2 -->
+		<part name="raiders5.11n"/>
+		<part name="raiders5.11n"/>
+		<!-- main cpu -->
+		<part name="raiders5.1"/>
+		<part name="raiders5.2"/>
+		<!-- sub cpu -->
+		<part name="raiders5.2"/>
+		<part name="raiders5.2"/>
+	</rom>
+</misterromdescription>
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/NinjaKun_MiST.sv
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/NinjaKun_MiST.sv
@@ -34,6 +34,7 @@ localparam CONF_STR = {
 	"O2,Rotate Controls,Off,On;",
 	"O34,Scandoubler Fx,None,CRT 25%,CRT 50%,CRT 75%;",
 	"O5,Blend,Off,On;",
+	"O6,Service,Off,On;",
 	"DIP;",
 	"T0,Reset;",
 	"V,v1.00.",`BUILD_DATE
@@ -47,6 +48,21 @@ assign 		SDRAM_CKE = 1;
 wire        rotate = status[2];
 wire  [1:0] scanlines = status[4:3];
 wire        blend = status[5];
+wire        service = status[6];
+
+wire  [6:0] core_mod;
+wire        RAIDERS5 = core_mod == 1;
+
+reg   [7:0] CTR1, CTR2;
+
+always @(*) begin
+	CTR1 = ~{2'b11, m_one_player, 1'b0, m_fireA, m_fireB, m_right, m_left };
+	CTR2 = ~{~(m_coin1 | m_coin2), ~service, m_two_players, 1'b0, m_fire2A, m_fire2B, m_right2, m_left2 };
+	if (RAIDERS5) begin
+		CTR1 = ~{1'b0, 1'b0, m_one_player, m_fireA, m_up, m_down, m_right, m_left };
+		CTR2 = ~{(m_coin1 | m_coin2), service, m_two_players, m_fire2A, m_up2, m_down2, m_right2, m_left2};
+	end
+end

 wire CLOCK_48, pll_locked;
 pll pll(
@@ -175,8 +191,9 @@ wire [11:0] POUT;
 ninjakun_top ninjakun_top(
 	.RESET(reset),
 	.MCLK(CLOCK_48),
-	.CTR1(~{2'b11, m_one_player, 1'b0, m_fireA, m_fireB, m_right, m_left }),
-	.CTR2(~{~(m_coin1 | m_coin2), 1'b1, m_two_players, 1'b0, m_fireB, m_fire2B, m_right2, m_left2 }),
+	.RAIDERS5(RAIDERS5),
+	.CTR1(CTR1),
+	.CTR2(CTR2),
 	.DSW1(status[15:8]),
 	.DSW2(status[23:16]),
 	.PH(HPOS),
@@ -244,6 +261,7 @@ user_io #(.STRLEN(($size(CONF_STR)>>3)))user_io(
 	.SPI_MOSI       (SPI_DI         ),
 	.buttons        (buttons        ),
 	.switches       (switches       ),
+	.core_mod       (core_mod       ),
 	.scandoubler_disable (scandoublerD	  ),
 	.ypbpr          (ypbpr          ),
 	.no_csync       (no_csync       ),
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_adec.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_adec.v
@@ -1,5 +1,6 @@
 module ninjakun_adec
 (
+	input        RAIDERS5,
 	input [15:0] CP0AD,
 	input			 CP0WR,

@@ -16,13 +17,26 @@ module ninjakun_adec
 	output		 SYNWR1
 );

-assign CS_IN0 = (CP0AD[15:2] == 14'b1010_0000_0000_00); 
-assign CS_IN1 = (CP1AD[15:2] == 14'b1010_0000_0000_00); 
+always @(*) begin
+	CS_IN0 = (CP0AD[15:2] == 14'b1010_0000_0000_00);
+	CS_IN1 = (CP1AD[15:2] == 14'b1010_0000_0000_00);

-assign CS_SH0 = (CP0AD[15:11] == 5'b1110_0); 
-assign CS_SH1 = (CP1AD[15:11] == 5'b1110_0); 
+	CS_SH0 = (CP0AD[15:11] == 5'b1110_0);
+	CS_SH1 = (CP1AD[15:11] == 5'b1110_0);

-assign SYNWR0 = CS_IN0 & (CP0AD[1:0]==2) & CP0WR;
-assign SYNWR1 = CS_IN1 & (CP1AD[1:0]==2) & CP1WR;
+	SYNWR0 = CS_IN0 & (CP0AD[1:0]==2) & CP0WR;
+	SYNWR1 = CS_IN1 & (CP1AD[1:0]==2) & CP1WR;
+
+	if (RAIDERS5) begin
+		CS_IN0 = 0;
+		CS_IN1 = 0;
+
+		CS_SH0 = (CP0AD[15:11] == 5'b1110_0);
+		CS_SH1 = (CP1AD[15:11] == 5'b1010_0);
+
+		SYNWR0 = 0;
+		SYNWR1 = 0;
+	end
+end

 endmodule 
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_cpumux.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_cpumux.v
@@ -6,6 +6,7 @@ module ninjakun_cpumux
 	input   [7:0]	CPIDT,
 	output    		CPRED,
 	output    		CPWRT,
+	output          CPSEL,

 	output reg		CP0CL,
 	output reg		CP0CE_P,
@@ -26,6 +27,7 @@ module ninjakun_cpumux
 	input    		CP1WR
 );

+assign     CPSEL = CSIDE;
 reg  [7:0] CP0DT, CP1DT;
 reg  [3:0] PHASE;
 reg		  CSIDE;
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_io_video.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_io_video.v
@@ -2,28 +2,32 @@

 module ninjakun_io_video
 (
-	input				MCLK,
-	input				PCLK_EN,
-	input				RESET,
-	input	  [8:0]	PH,
-	input	  [8:0]	PV,
-	input  [15:0]	CPADR,
-	input   [7:0]	CPODT,
-	output  [7:0]	CPIDT,
-	input    		CPRED,
-	input    		CPWRT,
-	input   [7:0]  DSW1,
-	input   [7:0]  DSW2,
-	output			VBLK,
-	output  [7:0]	POUT,
-	output [15:0]	SNDOUT,
-	output [12:0]	sp_rom_addr,
-	input  [31:0]	sp_rom_data,
+	input         MCLK,
+	input         RAIDERS5,
+	input         PCLK_EN,
+	input         RESET,
+	input   [8:0] PH,
+	input   [8:0] PV,
+	input  [15:0] CPADR,
+	input   [7:0] CPODT,
+	output  [7:0] CPIDT,
+	input         CPRED,
+	input         CPWRT,
+	input         CPSEL,
+	input   [7:0] DSW1,
+	input   [7:0] DSW2,
+	input   [7:0] CTR1,
+	input   [7:0] CTR2,
+	output        VBLK,
+	output  [7:0] POUT,
+	output [15:0] SNDOUT,
+	output [12:0] sp_rom_addr,
+	input  [31:0] sp_rom_data,
 	input         sp_rdy,
-	output [12:0]	fg_rom_addr,
-	input  [31:0]	fg_rom_data,
-	output [12:0]	bg_rom_addr,
-	input  [31:0]	bg_rom_data
+	output [12:0] fg_rom_addr,
+	input  [31:0] fg_rom_data,
+	output [12:0] bg_rom_addr,
+	input  [31:0] bg_rom_data
 );

 wire  [9:0]	FGVAD;
@@ -32,12 +36,16 @@ wire  [9:0]	BGVAD;
 wire [15:0]	BGVDT;
 wire [10:0]	SPAAD;
 wire  [7:0]	SPADT;
-wire  [7:0]	SCRPX, SCRPY;
+wire  [7:0]	SCRPX = RAIDERS5 ? SCRPX_CPU : SCRPX_PSG, SCRPY = RAIDERS5 ? SCRPY_CPU : SCRPY_PSG;
+wire  [7:0]	SCRPX_PSG, SCRPY_PSG;
+reg   [7:0] SCRPX_CPU, SCRPY_CPU;
 wire  [8:0]	PALET;
+
 NINJAKUN_VIDEO video (
 	.RESET(RESET),
 	.MCLK(MCLK),
 	.PCLK_EN(PCLK_EN),
+	.RAIDERS5(RAIDERS5),
 	.PH(PH),
 	.PV(PV),
 	.PALAD(PALET),	// Pixel Output (Palet Index)
@@ -60,15 +68,28 @@ NINJAKUN_VIDEO video (
 	.bg_rom_data(bg_rom_data)
 );

-wire CS_PSG, CS_FGV, CS_BGV, CS_SPA, CS_PAL;
+wire CS_SCRX, CS_SCRY, CS_PSG, CS_FGV, CS_BGV, CS_SPA, CS_PAL;
 ninjakun_sadec sadec(
+	.RAIDERS5(RAIDERS5),
 	.CPADR(CPADR),
+	.CPSEL(CPSEL),
+	.CS_SCRX(CS_SCRX),
+	.CS_SCRY(CS_SCRY),
 	.CS_PSG(CS_PSG),
 	.CS_FGV(CS_FGV),
 	.CS_BGV(CS_BGV),
 	.CS_SPA(CS_SPA),
 	.CS_PAL(CS_PAL)
 );
+always @(posedge MCLK) begin
+	if (RESET) begin
+		SCRPX_CPU <= 0;
+		SCRPY_CPU <= 0;
+	end else begin
+		if (CS_SCRX) SCRPX_CPU <= CPODT;
+		if (CS_SCRY) SCRPY_CPU <= CPODT;
+	end
+end

 wire  [7:0] PSDAT, FGDAT = CPADR[10] ? FGDAT16[15:8] : FGDAT16[7:0], BGDAT = CPADR[10] ? BGDAT16[15:8] : BGDAT16[7:0], SPDAT, PLDAT;
 wire [15:0] FGDAT16, BGDAT16;
@@ -98,6 +119,7 @@ dataselector_5D_8B cpxdsel(

 ninjakun_psg psg(
 	.MCLK(MCLK),
+	.RAIDERS5(RAIDERS5),
 	.ADR(CPADR[1:0]),
 	.CS(CS_PSG),
 	.WR(CPWRT),
@@ -107,8 +129,11 @@ ninjakun_psg psg(
 	.RD(CPRED),
 	.DSW1(DSW1),
 	.DSW2(DSW2),
-	.SCRPX(SCRPX),
-	.SCRPY(SCRPY),
+	.CTR1(CTR1),
+	.CTR2(CTR2),
+	.VBLK(VBLK),
+	.SCRPX(SCRPX_PSG),
+	.SCRPY(SCRPY_PSG),
 	.SNDO(SNDOUT)
 );

--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_main.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_main.v
@@ -1,7 +1,8 @@
 module ninjakun_main(
-	input				RESET,
-	input       MCLK,
-	input				VBLK,
+	input        RESET,
+	input        MCLK,
+	input        RAIDERS5,
+	input        VBLK,

 	input	  [7:0]	CTR1,
 	input	  [7:0]	CTR2,
@@ -11,6 +12,7 @@ module ninjakun_main(
 	input	  [7:0]	CPIDT,
 	output			CPRED,
 	output			CPWRT,
+	output          CPSEL,

 	output [14:0]	CPU1ADDR,
 	input  [7:0]	CPU1DT,
@@ -72,6 +74,7 @@ ninjakun_cpumux ioshare(
 	.CPIDT(CPIDT),
 	.CPRED(CPRED),
 	.CPWRT(CPWRT),
+	.CPSEL(CPSEL),
 	.CP0CE_P(CP0CE_P),
 	.CP0CE_N(CP0CE_N),
 	.CP0AD(CP0AD),
@@ -91,6 +94,7 @@ ninjakun_cpumux ioshare(
 wire CS_SH0, CS_SH1, CS_IN0, CS_IN1;
 wire SYNWR0, SYNWR1;
 ninjakun_adec adec(
+	.RAIDERS5(RAIDERS5),
 	.CP0AD(CP0AD), 
 	.CP0WR(CP0WR),
 	.CP1AD(CP1AD), 
@@ -113,8 +117,8 @@ assign ROM1D = CPU2DT;
 wire [7:0] SHDT0, SHDT1;

 dpram #(8,11) shmem(
-	MCLK, CS_SH0 & CP0WR, { CP0AD[10] ,CP0AD[9:0]}, CP0OD, SHDT0,
-	MCLK, CS_SH1 & CP1WR, {~CP1AD[10], CP1AD[9:0]}, CP1OD, SHDT1);
+	MCLK, CS_SH0 & CP0WR, {            CP0AD[10] ,CP0AD[9:0]}, CP0OD, SHDT0,
+	MCLK, CS_SH1 & CP1WR, {RAIDERS5 ^ ~CP1AD[10], CP1AD[9:0]}, CP1OD, SHDT1);

 wire [7:0] INPD0, INPD1;
 ninjakun_input inps(
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_psg.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_psg.v
@@ -1,18 +1,22 @@
 module ninjakun_psg
 (
-	input				MCLK,
-	input	 [1:0]	ADR,
-	input				CS,
-	input				WR,
-	input	 [7:0]	ID,
-	output [7:0]	OD,
-	input				RESET,
-	input				RD,
-	input	 [7:0]	DSW1,
-	input	 [7:0]	DSW2,
-	output [7:0]	SCRPX,
-	output [7:0]	SCRPY,
-	output [15:0]	SNDO
+	input         MCLK,
+	input         RAIDERS5,
+	input   [1:0] ADR,
+	input         CS,
+	input         WR,
+	input   [7:0] ID,
+	output  [7:0] OD,
+	input         RESET,
+	input         RD,
+	input   [7:0] DSW1,
+	input   [7:0] DSW2,
+	input   [7:0] CTR1,
+	input   [7:0] CTR2,
+	input         VBLK,
+	output  [7:0] SCRPX,
+	output  [7:0] SCRPY,
+	output [15:0] SNDO
 );

 wire [7:0] OD0, OD1;
@@ -60,8 +64,8 @@ YM2149 psg0(
 	.I_SEL_L(1'b0),
 	.O_AUDIO(S0x),
 	.O_CHAN(S0c),
-	.I_IOA(DSW1),
-	.I_IOB(DSW2),
+	.I_IOA(RAIDERS5 ? {~VBLK, CTR1[6:0]} : DSW1),
+	.I_IOB(RAIDERS5 ? CTR2 : DSW2),
 	.ENA(ENA),
 	.RESET_L(~RESET),
 	.CLK(MCLK)
@@ -78,8 +82,8 @@ YM2149 psg1(
 	.I_SEL_L(1'b0),
 	.O_AUDIO(S1x),
 	.O_CHAN(S1c),
-	.I_IOA(8'd0),
-	.I_IOB(8'd0),
+	.I_IOA(RAIDERS5 ? DSW1 : 8'd0),
+	.I_IOB(RAIDERS5 ? DSW2 : 8'd0),
 	.O_IOA(SCRPX),
 	.O_IOB(SCRPY),
 	.ENA(ENA),
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sadec.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sadec.v
@@ -2,18 +2,46 @@

 module ninjakun_sadec
 (
+	input        RAIDERS5,
 	input [15:0] CPADR,
-	output		 CS_PSG,
-	output		 CS_FGV,
-	output		 CS_BGV,
-	output		 CS_SPA,
-	output		 CS_PAL
+	input        CPSEL,
+	output       CS_SCRX,
+	output       CS_SCRY,
+	output       CS_PSG,
+	output       CS_FGV,
+	output       CS_BGV,
+	output       CS_SPA,
+	output       CS_PAL
 );

-assign CS_PSG = ( CPADR[15: 2] == 14'b1000_0000_0000_00 );
-assign CS_FGV = ( CPADR[15:11] ==  5'b1100_0 ); 
-assign CS_BGV = ( CPADR[15:11] ==  5'b1100_1 ); 
-assign CS_SPA = ( CPADR[15:11] ==  5'b1101_0 ); 
-assign CS_PAL = ( CPADR[15:11] ==  5'b1101_1 ); 
+always @(*) begin
+	CS_PSG = ( CPADR[15: 2] == 14'b1000_0000_0000_00 );
+	CS_FGV = ( CPADR[15:11] ==  5'b1100_0 );
+	CS_BGV = ( CPADR[15:11] ==  5'b1100_1 );
+	CS_SPA = ( CPADR[15:11] ==  5'b1101_0 );
+	CS_PAL = ( CPADR[15:11] ==  5'b1101_1 );
+	CS_SCRX = 0;
+	CS_SCRY = 0;
+
+	if (RAIDERS5) begin
+		if (CPSEL) begin
+			CS_SCRX = ( CPADR == 16'he000 );
+			CS_SCRY = ( CPADR == 16'he001 );
+			CS_PSG = ( CPADR[15: 2] == 14'b1000_0000_0000_00 );
+			CS_FGV = 0;
+			CS_BGV = 0;
+			CS_SPA = 0;
+			CS_PAL = 0;
+		end else begin
+			CS_SCRX = ( CPADR == 16'ha000 );
+			CS_SCRY = ( CPADR == 16'ha001 );
+			CS_PSG = ( CPADR[15: 2] == 14'b1100_0000_0000_00 );
+			CS_FGV = ( CPADR[15:11] ==  5'b1000_1 );
+			CS_BGV = ( CPADR[15:11] ==  5'b1001_0 );
+			CS_SPA = ( CPADR[15:11] ==  5'b1000_0 );
+			CS_PAL = ( CPADR[15:11] ==  5'b1101_0 );
+		end
+	end
+end

 endmodule 
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sprite.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_sprite.v
@@ -2,24 +2,25 @@

 module NINJAKUN_SP
 (
-	input       MCLK,
-	input       PCLK_EN,
-	input				RESET,
+	input         MCLK,
+	input         PCLK_EN,
+	input         RESET,
+	input         RAIDERS5,

-	input   [8:0]	PH,
-	input	  [8:0]	PV,
+	input   [8:0] PH,
+	input   [8:0] PV,

-	output [10:0]	SPAAD,
-	input   [7:0]	SPADT,
+	output [10:0] SPAAD,
+	input   [7:0] SPADT,

-	output [12:0]	SPCAD,
-	input  [31:0]	SPCDT,
-	input				SPCFT,
+	output [12:0] SPCAD,
+	input  [31:0] SPCDT,
+	input         SPCFT,

-	output  [8:0]	SPOUT
+	output  [8:0] SPOUT
 );

-wire 		  WPEN;
+wire       WPEN;
 wire [8:0] WPAD;
 wire [7:0] WPIX;

@@ -42,7 +43,7 @@ always @(posedge MCLK) begin
 end

 NINJAKUN_SPENG eng (
-	MCLK, RESET, PH, PV,
+	MCLK, RESET, RAIDERS5, PH, PV,
 	SPAAD, SPADT,
 	SPCAD, SPCDT, SPCFT,
 	 WPAD,  WPIX, WPEN
@@ -55,34 +56,38 @@ endmodule

 module NINJAKUN_SPENG
 (
-	input				MCLK,
-	input				RESET,
+	input         MCLK,
+	input         RESET,
+	input         RAIDERS5,

-	input	 [8:0]	PH,
-	input  [8:0]	PV,
+	input   [8:0] PH,
+	input   [8:0] PV,

-	output [10:0]	SPAAD,
-	input  [7:0]	SPADT,
+	output [10:0] SPAAD,
+	input   [7:0] SPADT,

-	output reg [12:0]	SPCAD,
-	input  [31:0]	SPCDT,
-	input				SPCFT,
+	output reg [12:0] SPCAD,
+	input  [31:0] SPCDT,
+	input         SPCFT,

-	output [8:0]	WPAD,
-	output [7:0]	WPIX,
-	output			WPEN
+	output [8:0]  WPAD,
+	output [7:0]  WPIX,
+	output        WPEN
 );

 reg  [5:0] SPRNO;
 reg  [1:0] SPRIX;
-assign	  SPAAD = {SPRNO, 3'h0, SPRIX};
+assign     SPAAD = {SPRNO, 3'h0, SPRIX};

 reg  [7:0] ATTR;
-wire [3:0] PALNO = ATTR[3:0];
-wire 		  FLIPH = ATTR[4];
-wire 		  FLIPV = ATTR[5];
-wire 		  XPOSH = ATTR[6];
-wire 		  DSABL = ATTR[7];
+//wire [3:0] PALNO = RAIDERS5 ? ATTR[7:4] : ATTR[3:0];
+reg  [3:0] PALNO;
+reg        FLIPH;
+reg        FLIPV;
+//wire 		  FLIPH = ATTR[4];
+//wire 		  FLIPV = ATTR[5];
+wire       XPOSH = !RAIDERS5 & ATTR[6];
+wire       DSABL = RAIDERS5 ? ATTR[3] : ATTR[7];

 reg  [7:0] YPOS;
 reg  [7:0] NV;
@@ -93,11 +98,11 @@ wire       YHIT = (HV[7:4]==4'b1111) & (~DSABL);
 reg  [7:0] XPOS;
 reg  [4:0] WP;
 wire [3:0] WOFS = {4{FLIPH}}^(WP[3:0]);
-assign 	  WPAD = {1'b0,XPOS}-{XPOSH,8'h0}+WOFS-1'd1;
-assign 	  WPEN = ~(WP[4]|(WPIX[3:0]==0));
+assign     WPAD = {1'b0,XPOS}-{XPOSH,8'h0}+WOFS-1'd1;
+assign     WPEN = ~(WP[4]|(WPIX[3:0]==0));

 reg  [7:0] PTNO;
-reg		  CRS;
+reg        CRS;

 function [3:0] XOUT;
 input  [2:0] N;
@@ -151,12 +156,23 @@ always @( posedge MCLK ) begin
 		end
 	 `FETCH1: begin
 			ATTR   = SPADT; /* ATTR must block assign */
+			if (!RAIDERS5) begin
+				PALNO <= SPADT[3:0];
+				FLIPH <= SPADT[4];
+				FLIPV <= SPADT[5];
+			end else begin
+				PALNO <= SPADT[7:4];
+			end
 			SPRIX <= 0;
 			STATE <= YHIT ? `FETCH2 : `NEXT;
 		end

 	 `FETCH2: begin
-			PTNO  <= SPADT;
+			if (RAIDERS5) begin
+				FLIPH <= SPADT[0];
+				FLIPV <= SPADT[1];
+			end
+			PTNO  <= RAIDERS5 ? { ATTR[2:0], SPADT[7:2] } : SPADT;
 			SPRIX <= 1;
 			STATE <= `FETCH3;
 		end
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_top.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_top.v
@@ -11,6 +11,7 @@ module ninjakun_top
 (
 	input          RESET,      // RESET
 	input          MCLK,       // Master Clock (48.0MHz)
+	input          RAIDERS5,
 	input	  [7:0]	CTR1,			// Control Panel
 	input	  [7:0]	CTR2,
 	input	  [7:0]	DSW1,			// DipSW
@@ -40,11 +41,13 @@ assign PCLK_EN = CLKDIV[2:0] == 3'b111;

 wire [15:0] CPADR;
 wire  [7:0] CPODT, CPIDT;
+wire        CPSEL;
 wire        CPRED, CPWRT, VBLK;

 ninjakun_main ninjakun_main(
 	.RESET(RESET),
 	.MCLK(MCLK),
+	.RAIDERS5(RAIDERS5),
 	.VBLK(VBLK),
 	.CTR1(CTR1),
 	.CTR2(CTR2),
@@ -53,6 +56,7 @@ ninjakun_main ninjakun_main(
 	.CPIDT(CPIDT),
 	.CPRED(CPRED),
 	.CPWRT(CPWRT),
+	.CPSEL(CPSEL),
 	.CPU1ADDR(CPU1ADDR),
 	.CPU1DT(CPU1DT),
 	.CPU2ADDR(CPU2ADDR),
@@ -68,6 +72,7 @@ wire  [8:0] PALET;
 wire  [7:0] SCRPX, SCRPY;
 ninjakun_io_video ninjakun_io_video(
 	.MCLK(MCLK),
+	.RAIDERS5(RAIDERS5),
 	.PCLK_EN(PCLK_EN),
 	.RESET(RESET),
 	.PH(PH),
@@ -77,8 +82,11 @@ ninjakun_io_video ninjakun_io_video(
 	.CPIDT(CPIDT),
 	.CPRED(CPRED),
 	.CPWRT(CPWRT),
+	.CPSEL(CPSEL),
 	.DSW1(DSW1),
 	.DSW2(DSW2),
+	.CTR1(CTR1),
+	.CTR2(CTR2),
 	.VBLK(VBLK),
 	.POUT(POUT),
 	.SNDOUT(SNDOUT),
--- a/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_video.v
+++ b/Arcade_MiST/Nova2001_Hardware/NinjaKun_MiST/rtl/ninjakun_video.v
@@ -2,28 +2,29 @@

 module NINJAKUN_VIDEO
 (
-	input					RESET,
-	input					MCLK,
-	input					PCLK_EN,
+	input         RESET,
+	input         MCLK,
+	input         PCLK_EN,
+	input         RAIDERS5,
 	
-	input   [8:0]		PH,
-	input   [8:0]		PV,
+	input   [8:0] PH,
+	input   [8:0] PV,

-	output  [8:0]		PALAD,	// Pixel Output (Palet Index)
+	output  [8:0] PALAD,	// Pixel Output (Palet Index)

-	output  [9:0]		FGVAD,	// FG
-	input  [15:0]		FGVDT,
+	output  [9:0] FGVAD,	// FG
+	input  [15:0] FGVDT,

-	output  [9:0]		BGVAD,	// BG
-	input  [15:0]		BGVDT,
-	input   [7:0]		BGSCX,
-	input   [7:0]		BGSCY,
+	output  [9:0] BGVAD,	// BG
+	input  [15:0] BGVDT,
+	input   [7:0] BGSCX,
+	input   [7:0] BGSCY,

-	output [10:0]		SPAAD,	// Sprite
-	input   [7:0]		SPADT,
+	output [10:0] SPAAD,	// Sprite
+	input   [7:0] SPADT,

-	output				VBLK,
-	input					DBGPD,	// Palet Display (for Debug)
+	output        VBLK,
+	input         DBGPD,	// Palet Display (for Debug)

 	output [12:0] sp_rom_addr,
 	input  [31:0] sp_rom_data,
@@ -63,7 +64,7 @@ assign BGCDT = bg_rom_data;
 wire		  FGPRI;
 wire [8:0] FGOUT;
 NINJAKUN_FG fg(
-  MCLK, PCLK_EN,
+  MCLK, PCLK_EN, RAIDERS5,
 	PH, PV,
 	FGVAD, FGVDT,
 	FGCAD, FGCDT,
@@ -74,8 +75,9 @@ wire FGPPQ = FGOPQ & (~FGPRI);

 // Back-Ground Scanline Generator
 wire [8:0] BGOUT;
+
 NINJAKUN_BG bg(
-	MCLK, PCLK_EN,
+	MCLK, PCLK_EN, RAIDERS5,
 	PH, PV,
 	BGSCX, BGSCY,
 	BGVAD, BGVDT,
@@ -85,8 +87,9 @@ NINJAKUN_BG bg(

 // Sprite Scanline Generator
 wire [8:0] SPOUT;
+
 NINJAKUN_SP sp(
-	MCLK, PCLK_EN, RESET,
+	MCLK, PCLK_EN, RESET, RAIDERS5,
 	PH, PV,
 	SPAAD, SPADT,
 	SPCAD, SPCDT, SPCFT,
@@ -98,38 +101,37 @@ wire SPOPQ = (SPOUT[3:0]!=0);
 wire [8:0] PDOUT = (PV[7]|PV[8]) ? 9'd0 : {PV[6:2],PH[7:4]};

 // Color Mixer
-DSEL4_9B cmix( PALAD,
-	DBGPD, PDOUT,
-	FGPPQ, FGOUT,
-   SPOPQ, SPOUT,
-	FGOPQ, FGOUT,
-			 BGOUT
-);
+assign PALAD = DBGPD ? PDOUT :
+               FGPPQ ? FGOUT :
+               SPOPQ ? SPOUT :
+               FGOPQ ? FGOUT :
+               BGOUT;

 endmodule

 // ForeGround Scanline Generator
 module NINJAKUN_FG
 (
-	input					MCLK,
-	input					PCLK_EN,
+	input         MCLK,
+	input         PCLK_EN,
+	input         RAIDERS5,

-	input   [8:0]		PH,		// CRTC
-	input	  [8:0]		PV,
+	input   [8:0] PH,		// CRTC
+	input   [8:0] PV,

-	output reg [9:0]	FGVAD,	// VRAM
-	input	 [15:0]		FGVDT,
+	output reg [9:0] FGVAD,	// VRAM
+	input  [15:0] FGVDT,

-	output reg [12:0]	FGCAD,
-	input  [31:0]		FGCDT,
+	output reg [12:0] FGCAD,
+	input  [31:0] FGCDT,

-	output  [9:0]		FGOUT		// PIXEL OUT : {PRIO,PALNO[8:0]}
+	output  [9:0] FGOUT		// PIXEL OUT : {PRIO,PALNO[8:0]}
 );

 wire  [8:0] POSH  = PH+9'd8+9'd1;
 wire  [8:0] POSV  = PV+9'd32;

-wire  [9:0] CHRNO = {1'b0,FGVDT[13],FGVDT[7:0]};
+wire  [9:0] CHRNO = RAIDERS5 ? {2'b00, FGVDT[7:0]} : {1'b0,FGVDT[13],FGVDT[7:0]};
 reg  [31:0] CDT;

 reg   [4:0] PAL;
@@ -137,7 +139,7 @@ reg   [3:0] OUT;
 always @( posedge MCLK ) begin
 	if (PCLK_EN)
 	case(POSH[2:0])
-	 0: begin OUT <= CDT[7:4]  ; PAL   <= FGVDT[12:8]; end
+	 0: begin OUT <= CDT[7:4]  ; PAL   <= RAIDERS5 ? {1'b0, FGVDT[15:12]} : FGVDT[12:8]; end
 	 1: begin OUT <= CDT[3:0]  ; FGVAD <= {POSV[7:3],POSH[7:3]}; end
 	 2: begin OUT <= CDT[15:12]; end
 	 3: begin OUT <= CDT[11:8] ; end
@@ -156,28 +158,29 @@ endmodule
 // BackGround Scanline Generator
 module NINJAKUN_BG
 (
-	input					MCLK,
-	input					PCLK_EN,
+	input         MCLK,
+	input         PCLK_EN,
+	input         RAIDERS5,

-	input   [8:0]		PH,		// CRTC
-	input	  [8:0]		PV,
+	input   [8:0] PH,		// CRTC
+	input   [8:0] PV,

-	input   [7:0]		BGSCX,	// SCRREG
-	input	  [7:0]		BGSCY,
+	input   [7:0] BGSCX,	// SCRREG
+	input   [7:0] BGSCY,

-	output reg [9:0]	BGVAD,	// VRAM
-	input	 [15:0]		BGVDT,
+	output reg [9:0] BGVAD,	// VRAM
+	input  [15:0] BGVDT,

-	output reg [12:0]	BGCAD,
-	input  [31:0]		BGCDT,
-	
-	output  [8:0]		BGOUT		// OUTPUT
+	output reg [12:0] BGCAD,
+	input  [31:0] BGCDT,
+
+	output  [8:0] BGOUT		// OUTPUT
 );

 wire  [8:0] POSH  = PH+BGSCX+9'd2;
 wire  [8:0] POSV  = PV+BGSCY+9'd32;

-wire  [9:0] CHRNO = {BGVDT[15:14],BGVDT[7:0]};
+wire  [9:0] CHRNO = RAIDERS5 ? {1'b0, BGVDT[8:0]} : {BGVDT[15:14],BGVDT[7:0]};
 reg  [31:0] CDT;

 reg   [3:0] PAL;
@@ -185,7 +188,7 @@ reg   [3:0] OUT;
 always @( posedge MCLK ) begin
 	if (PCLK_EN)
 	case(POSH[2:0])
-	 0: begin OUT <= CDT[7:4]  ; PAL   <= BGVDT[11:8]; end
+	 0: begin OUT <= CDT[7:4]  ; PAL   <= RAIDERS5 ? BGVDT[15:12] : BGVDT[11:8]; end
 	 1: begin OUT <= CDT[3:0]  ; BGVAD <= {POSV[7:3],POSH[7:3]}; end
 	 2: begin OUT <= CDT[15:12]; end
 	 3: begin OUT <= CDT[11:8] ; end
@@ -199,33 +202,3 @@ end
 assign BGOUT = { 1'b1, PAL, OUT };

 endmodule
-
-
-module DSEL4_9B
-(
-	output [8:0] OUT,
-
-	input 		 EN1,
-	input  [8:0] IN1,
-
-	input 		 EN2,
-	input  [8:0] IN2,
-
-	input 		 EN3,
-	input  [8:0] IN3,
-
-	input 		 EN4,
-	input  [8:0] IN4,
-
-	input  [8:0] IND
-);
-
-assign OUT = EN1 ? IN1: 
-				 EN2 ? IN2: 
-				 EN3 ? IN3: 
-				 EN4 ? IN4:
- 				       IND;
-
-endmodule
-
-