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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-04-29 13:32:38 +00:00

Fixing Title Screen

This commit is contained in:
Marcel
2020-09-13 12:26:19 +02:00
committed by GitHub
parent 14618de338
commit f920885e1a

View File

@@ -181,13 +181,13 @@ end
wire [7:0] W_3P_DO, W_3N_DO;
vid1 vid1 (
.clk(CLK_12M & ROM_3PN_CE),
.addr({1'b0,WO_DB[7:0],I_VF_CNT[2:0]}),
.addr({I_4H_Q0,WO_DB[7:0],I_VF_CNT[2:0]}),
.data(W_3P_DO)
);
vid2 vid2 (
.clk(CLK_12M & ROM_3PN_CE),
.addr({1'b0,WO_DB[7:0],I_VF_CNT[2:0]}),
.addr({I_4H_Q0,WO_DB[7:0],I_VF_CNT[2:0]}),
.data(W_3N_DO)
);