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43 lines
2.0 KiB
Markdown
43 lines
2.0 KiB
Markdown
# jt5205 hardware by Jose Tejada (@topapate)
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You can show your appreciation through
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* [Patreon](https://patreon.com/topapate), by supporting releases
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* [Paypal](https://paypal.me/topapate), with a donation
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JT5205 is an ADPCM sound source written in Verilog, fully compatible with OKI MSM5205.
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## Port Description
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Name | Direction | Width | Purpose
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---------|-----------|-------|--------------------------------------
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rst | input | | active-high asynchronous reset signal
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clk | input | | clock
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cen | input | | clock enable.
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sel | input | 2 | selects the data rate
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din | input | 4 | input data
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sound | output | 12 | signed sound output
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## Usage
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This is a pin-to-pin compatible module with OKI MSM5205. If you are just going to use it on a retro core you don't need to know the internals of it just hook it up and be sure that the effective clock rate, i.e. clk&cen signal, is the intended 384kHz (or whatever your system needs).
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If you hear a periodic noise when there should be no output, check whether your target system was leaving the MSM5205 halted at reset when no output was needed. If The part is not reset it will keep processing the output and a constant 0 input will produce a repetitive noise.
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## FPGA arcade cores using this module:
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* [Double Dragon](https://github.com/jotego/jtdd), by the same author
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* [Tora e no michi](https://github.com/jotego/jt_gng), by the same author
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## Related Projects
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Other sound chips from the same author
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Chip | Repository
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-----------------------|------------
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YM2203, YM2612, YM2610 | [JT12](https://github.com/jotego/jt12)
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YM2151 | [JT51](https://github.com/jotego/jt51)
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YM3526 | [JTOPL](https://github.com/jotego/jtopl)
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YM2149 | [JT49](https://github.com/jotego/jt49)
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sn76489an | [JT89](https://github.com/jotego/jt89)
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OKI 6295 | [JT6295](https://github.com/jotego/jt6295)
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OKI MSM5205 | [JT5205](https://github.com/jotego/jt5205) |