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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-21 01:57:28 +00:00
Gyorgy Szombathelyi a9e7fcf946 Remove generated build_id.v files
They're always conflicting after a synthesis
2019-06-05 17:42:30 +02:00
..
2019-06-04 17:43:34 +02:00
2019-06-05 17:42:30 +02:00
2019-06-04 17:43:34 +02:00
2018-11-30 20:08:44 +01:00
2019-06-04 17:43:34 +02:00
2019-06-04 17:43:34 +02:00
2019-06-04 17:43:34 +02:00
2018-12-02 16:51:09 +01:00

WIP 

VGA Only
Keyboard not complete

36k Ram
Rom 1+2+3
AY8912