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Gehstock.Mist_FPGA/Sharp - MZ-80K_MiST/Output/mz80k_mist.map.rpt
Gehstock bb2ee068da New Try with MZ80K
2018-06-24 13:33:25 +02:00

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Analysis & Synthesis report for mz80k_mist
Sun Jun 24 13:30:13 2018
Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Analysis & Synthesis Summary
3. Analysis & Synthesis Settings
4. Parallel Compilation
5. Analysis & Synthesis Source Files Read
6. Analysis & Synthesis Resource Usage Summary
7. Analysis & Synthesis Resource Utilization by Entity
8. Analysis & Synthesis RAM Summary
9. Analysis & Synthesis IP Cores Summary
10. Logic Cells Representing Combinational Loops
11. Registers Removed During Synthesis
12. Removed Registers Triggering Further Register Optimizations
13. General Register Statistics
14. Inverted Register Statistics
15. Registers Packed Into Inferred Megafunctions
16. Multiplexer Restructuring Statistics (Restructuring Performed)
17. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated
18. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated
19. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated
20. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated
21. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated
22. Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated
23. Source assignments for mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component|altsyncram_f7a1:auto_generated
24. Source assignments for mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated
25. Source assignments for mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component|altsyncram_atg1:auto_generated
26. Source assignments for video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0|altsyncram_dud1:auto_generated
27. Parameter Settings for User Entity Instance: pll:pll|altpll:altpll_component
28. Parameter Settings for User Entity Instance: mist_io:mist_io
29. Parameter Settings for User Entity Instance: video_mixer:video_mixer
30. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler
31. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x
32. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in
33. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0
34. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component
35. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1
36. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component
37. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out
38. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0
39. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component
40. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1
41. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component
42. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2
43. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component
44. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3
45. Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component
46. Parameter Settings for User Entity Instance: video_mixer:video_mixer|osd:osd
47. Parameter Settings for User Entity Instance: sigma_delta_dac:sigma_delta_dac
48. Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|fz80:z80|seq:seq
49. Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component
50. Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component
51. Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component
52. Parameter Settings for Inferred Entity Instance: video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0
53. altpll Parameter Settings by Entity Instance
54. altsyncram Parameter Settings by Entity Instance
55. Port Connectivity Checks: "keyboard:keyboard"
56. Port Connectivity Checks: "mz80k_top:mz80k_top|ram2:ram2_2"
57. Port Connectivity Checks: "mz80k_top:mz80k_top|monrom:mon_rom"
58. Port Connectivity Checks: "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom"
59. Port Connectivity Checks: "mz80k_top:mz80k_top|vga:vga1"
60. Port Connectivity Checks: "mz80k_top:mz80k_top|ps2:ps2_1"
61. Port Connectivity Checks: "mz80k_top:mz80k_top|i8253:i8253_1"
62. Port Connectivity Checks: "mz80k_top:mz80k_top|fz80:z80|alu:alu"
63. Port Connectivity Checks: "mz80k_top:mz80k_top|fz80:z80"
64. Port Connectivity Checks: "mz80k_top:mz80k_top"
65. Port Connectivity Checks: "sigma_delta_dac:sigma_delta_dac"
66. Port Connectivity Checks: "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Blend:blender"
67. Port Connectivity Checks: "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x"
68. Port Connectivity Checks: "video_mixer:video_mixer"
69. Port Connectivity Checks: "mist_io:mist_io"
70. Port Connectivity Checks: "pll:pll"
71. Elapsed Time Per Partition
72. Analysis & Synthesis Messages
73. Analysis & Synthesis Suppressed Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+--------------------------------------------+
; Analysis & Synthesis Status ; Successful - Sun Jun 24 13:30:13 2018 ;
; Quartus II 64-Bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; mz80k_mist ;
; Top-level Entity Name ; mz80k_mist ;
; Family ; Cyclone III ;
; Total logic elements ; 3,152 ;
; Total combinational functions ; 2,886 ;
; Dedicated logic registers ; 891 ;
; Total registers ; 891 ;
; Total pins ; 31 ;
; Total virtual pins ; 0 ;
; Total memory bits ; 311,296 ;
; Embedded Multiplier 9-bit elements ; 0 ;
; Total PLLs ; 1 ;
+------------------------------------+--------------------------------------------+
+----------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Option ; Setting ; Default Value ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Device ; EP3C25E144C8 ; ;
; Top-level entity name ; mz80k_mist ; mz80k_mist ;
; Family name ; Cyclone III ; Cyclone IV GX ;
; Verilog Show LMF Mapping Messages ; Off ; ;
; Verilog Version ; SystemVerilog_2005 ; Verilog_2001 ;
; Use smart compilation ; Off ; Off ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
; Enable compact report table ; Off ; Off ;
; Restructure Multiplexers ; Auto ; Auto ;
; Create Debugging Nodes for IP Cores ; Off ; Off ;
; Preserve fewer node names ; On ; On ;
; Disable OpenCore Plus hardware evaluation ; Off ; Off ;
; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
; State Machine Processing ; Auto ; Auto ;
; Safe State Machine ; Off ; Off ;
; Extract Verilog State Machines ; On ; On ;
; Extract VHDL State Machines ; On ; On ;
; Ignore Verilog initial constructs ; Off ; Off ;
; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
; Infer RAMs from Raw Logic ; On ; On ;
; Parallel Synthesis ; On ; On ;
; DSP Block Balancing ; Auto ; Auto ;
; NOT Gate Push-Back ; On ; On ;
; Power-Up Don't Care ; On ; On ;
; Remove Redundant Logic Cells ; Off ; Off ;
; Remove Duplicate Registers ; On ; On ;
; Ignore CARRY Buffers ; Off ; Off ;
; Ignore CASCADE Buffers ; Off ; Off ;
; Ignore GLOBAL Buffers ; Off ; Off ;
; Ignore ROW GLOBAL Buffers ; Off ; Off ;
; Ignore LCELL Buffers ; Off ; Off ;
; Ignore SOFT Buffers ; On ; On ;
; Limit AHDL Integers to 32 Bits ; Off ; Off ;
; Optimization Technique ; Balanced ; Balanced ;
; Carry Chain Length ; 70 ; 70 ;
; Auto Carry Chains ; On ; On ;
; Auto Open-Drain Pins ; On ; On ;
; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
; Auto ROM Replacement ; On ; On ;
; Auto RAM Replacement ; On ; On ;
; Auto DSP Block Replacement ; On ; On ;
; Auto Shift Register Replacement ; Auto ; Auto ;
; Allow Shift Register Merging across Hierarchies ; Auto ; Auto ;
; Auto Clock Enable Replacement ; On ; On ;
; Strict RAM Replacement ; Off ; Off ;
; Allow Synchronous Control Signals ; On ; On ;
; Force Use of Synchronous Clear Signals ; Off ; Off ;
; Auto RAM Block Balancing ; On ; On ;
; Auto RAM to Logic Cell Conversion ; Off ; Off ;
; Auto Resource Sharing ; Off ; Off ;
; Allow Any RAM Size For Recognition ; Off ; Off ;
; Allow Any ROM Size For Recognition ; Off ; Off ;
; Allow Any Shift Register Size For Recognition ; Off ; Off ;
; Use LogicLock Constraints during Resource Balancing ; On ; On ;
; Ignore translate_off and synthesis_off directives ; Off ; Off ;
; Timing-Driven Synthesis ; On ; On ;
; Report Parameter Settings ; On ; On ;
; Report Source Assignments ; On ; On ;
; Report Connectivity Checks ; On ; On ;
; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
; Synchronization Register Chain Length ; 2 ; 2 ;
; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
; HDL message level ; Level2 ; Level2 ;
; Suppress Register Optimization Related Messages ; Off ; Off ;
; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
; Number of Swept Nodes Reported in Synthesis Report ; 5000 ; 5000 ;
; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
; Clock MUX Protection ; On ; On ;
; Auto Gated Clock Conversion ; Off ; Off ;
; Block Design Naming ; Auto ; Auto ;
; SDC constraint protection ; Off ; Off ;
; Synthesis Effort ; Auto ; Auto ;
; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
; Pre-Mapping Resynthesis Optimization ; Off ; Off ;
; Analysis & Synthesis Message Level ; Medium ; Medium ;
; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
; Resource Aware Inference For Block RAM ; On ; On ;
; Synthesis Seed ; 1 ; 1 ;
+----------------------------------------------------------------------------+--------------------+--------------------+
+------------------------------------------+
; Parallel Compilation ;
+----------------------------+-------------+
; Processors ; Number ;
+----------------------------+-------------+
; Number detected on machine ; 8 ;
; Maximum allowed ; 4 ;
; ; ;
; Average used ; 1.00 ;
; Maximum used ; 4 ;
; ; ;
; Usage by Processor ; % Time Used ;
; Processor 1 ; 100.0% ;
; Processors 2-4 ; < 0.1% ;
; Processors 5-8 ; 0.0% ;
+----------------------------+-------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------+---------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------+---------+
; rtl/mz80k_mist.sv ; yes ; User SystemVerilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/mz80k_mist.sv ; ;
; rtl/mz80k_top.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/mz80k_top.v ; ;
; rtl/vga.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/vga.v ; ;
; rtl/i8253.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/i8253.v ; ;
; rtl/ps2.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/ps2.v ; ;
; rtl/fz80.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/fz80.v ; ;
; rtl/video_mixer.sv ; yes ; User SystemVerilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/video_mixer.sv ; ;
; rtl/sigma_delta_dac.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/sigma_delta_dac.v ; ;
; rtl/scandoubler.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/scandoubler.v ; ;
; rtl/osd.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/osd.v ; ;
; rtl/mist_io.v ; yes ; User Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/mist_io.v ; ;
; rtl/hq2x.sv ; yes ; User SystemVerilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/hq2x.sv ; ;
; rtl/keyboard.sv ; yes ; User SystemVerilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/keyboard.sv ; ;
; rtl/pll.v ; yes ; User Wizard-Generated File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/pll.v ; ;
; rtl/cg_rom.v ; yes ; User Wizard-Generated File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/cg_rom.v ; ;
; rtl/ram2.v ; yes ; User Wizard-Generated File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/ram2.v ; ;
; rtl/monrom.v ; yes ; User Wizard-Generated File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/monrom.v ; ;
; rtl/build_id.v ; yes ; Auto-Found Verilog HDL File ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/build_id.v ; ;
; altpll.tdf ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/altpll.tdf ; ;
; aglobal131.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/aglobal131.inc ; ;
; stratix_pll.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/stratix_pll.inc ; ;
; stratixii_pll.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/stratixii_pll.inc ; ;
; cycloneii_pll.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/cycloneii_pll.inc ; ;
; db/pll_altpll.v ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/pll_altpll.v ; ;
; altsyncram.tdf ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/altsyncram.tdf ; ;
; stratix_ram_block.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/stratix_ram_block.inc ; ;
; lpm_mux.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/lpm_mux.inc ; ;
; lpm_decode.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/lpm_decode.inc ; ;
; a_rdenreg.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/a_rdenreg.inc ; ;
; altrom.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/altrom.inc ; ;
; altram.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/altram.inc ; ;
; altdpram.inc ; yes ; Megafunction ; c:/intelfpga/13.1/quartus/libraries/megafunctions/altdpram.inc ; ;
; db/altsyncram_c5o1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_c5o1.tdf ; ;
; db/altsyncram_28o1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_28o1.tdf ; ;
; db/altsyncram_f7a1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_f7a1.tdf ; ;
; db/altsyncram_vli1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_vli1.tdf ; ;
; db/decode_dra.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/decode_dra.tdf ; ;
; db/mux_tlb.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/mux_tlb.tdf ; ;
; db/altsyncram_atg1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_atg1.tdf ; ;
; db/altsyncram_dud1.tdf ; yes ; Auto-Generated Megafunction ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/db/altsyncram_dud1.tdf ; ;
+----------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------+---------+
+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+----------------------------------------------------------------------------+
; Resource ; Usage ;
+---------------------------------------------+----------------------------------------------------------------------------+
; Estimated Total logic elements ; 3,152 ;
; ; ;
; Total combinational functions ; 2886 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 1641 ;
; -- 3 input functions ; 721 ;
; -- <=2 input functions ; 524 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 2361 ;
; -- arithmetic mode ; 525 ;
; ; ;
; Total registers ; 891 ;
; -- Dedicated logic registers ; 891 ;
; -- I/O registers ; 0 ;
; ; ;
; I/O pins ; 31 ;
; Total memory bits ; 311296 ;
; Embedded Multiplier 9-bit elements ; 0 ;
; Total PLLs ; 1 ;
; -- PLLs ; 1 ;
; ; ;
; Maximum fan-out node ; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] ;
; Maximum fan-out ; 422 ;
; Total fan-out ; 13647 ;
; Average fan-out ; 3.50 ;
+---------------------------------------------+----------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+-------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------+--------------+
; |mz80k_mist ; 2886 (15) ; 891 (8) ; 311296 ; 0 ; 0 ; 0 ; 31 ; 0 ; |mz80k_mist ; work ;
; |mist_io:mist_io| ; 225 (225) ; 154 (154) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mist_io:mist_io ; work ;
; |mz80k_top:mz80k_top| ; 1949 (106) ; 537 (48) ; 294912 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top ; work ;
; |fz80:z80| ; 1286 (645) ; 250 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80 ; work ;
; |alu:alu| ; 122 (122) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|alu:alu ; work ;
; |asu:asu| ; 79 (79) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|asu:asu ; work ;
; |reg_2:reg_adrh| ; 9 (9) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2:reg_adrh ; work ;
; |reg_2:reg_adrl| ; 9 (9) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2:reg_adrl ; work ;
; |reg_2s:reg_sph| ; 9 (9) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2s:reg_sph ; work ;
; |reg_2s:reg_spl| ; 12 (12) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2s:reg_spl ; work ;
; |reg_a:reg_a| ; 18 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_a:reg_a ; work ;
; |reg_dual2:reg_b| ; 18 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_b ; work ;
; |reg_dual2:reg_c| ; 18 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_c ; work ;
; |reg_dual2:reg_d| ; 19 (19) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_d ; work ;
; |reg_dual2:reg_e| ; 18 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_e ; work ;
; |reg_f:reg_f| ; 33 (33) ; 12 (12) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_f:reg_f ; work ;
; |reg_pch:reg_pch| ; 32 (32) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_pch:reg_pch ; work ;
; |reg_pcl:reg_pcl| ; 30 (30) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_pcl:reg_pcl ; work ;
; |reg_quad3:reg_h| ; 54 (54) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h ; work ;
; |reg_quad3:reg_l| ; 56 (56) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l ; work ;
; |reg_r:reg_r| ; 16 (16) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_r:reg_r ; work ;
; |reg_simple:reg_data| ; 0 (0) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_simple:reg_data ; work ;
; |reg_simplec:reg_i| ; 9 (9) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_simplec:reg_i ; work ;
; |seq:seq| ; 80 (80) ; 19 (19) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|seq:seq ; work ;
; |i8253:i8253_1| ; 198 (198) ; 122 (122) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|i8253:i8253_1 ; work ;
; |monrom:mon_rom| ; 20 (0) ; 4 (0) ; 262144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom ; work ;
; |altsyncram:altsyncram_component| ; 20 (0) ; 4 (0) ; 262144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component ; work ;
; |altsyncram_vli1:auto_generated| ; 20 (0) ; 4 (4) ; 262144 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated ; work ;
; |decode_dra:decode3| ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated|decode_dra:decode3 ; work ;
; |mux_tlb:mux2| ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated|mux_tlb:mux2 ; work ;
; |ps2:ps2_1| ; 258 (236) ; 92 (68) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|ps2:ps2_1 ; work ;
; |ps2_recieve:ps2_recieve1| ; 22 (22) ; 24 (24) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1 ; work ;
; |ram2:ram2_2| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|ram2:ram2_2 ; work ;
; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component ; work ;
; |altsyncram_atg1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component|altsyncram_atg1:auto_generated ; work ;
; |vga:vga1| ; 81 (81) ; 21 (21) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|vga:vga1 ; work ;
; |cg_rom:cg_rom| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom ; work ;
; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component ; work ;
; |altsyncram_f7a1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component|altsyncram_f7a1:auto_generated ; work ;
; |pll:pll| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|pll:pll ; work ;
; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|pll:pll|altpll:altpll_component ; work ;
; |pll_altpll:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|pll:pll|altpll:altpll_component|pll_altpll:auto_generated ; work ;
; |sigma_delta_dac:sigma_delta_dac| ; 6 (6) ; 6 (6) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|sigma_delta_dac:sigma_delta_dac ; work ;
; |video_mixer:video_mixer| ; 691 (368) ; 186 (3) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|video_mixer:video_mixer ; work ;
; |osd:osd| ; 323 (323) ; 183 (183) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|video_mixer:video_mixer|osd:osd ; work ;
; |altsyncram:osd_buffer_rtl_0| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0 ; work ;
; |altsyncram_dud1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |mz80k_mist|video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0|altsyncram_dud1:auto_generated ; work ;
+-------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+----------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+----------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+----------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+----------------+
; mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; 32768 ; 8 ; -- ; -- ; 262144 ; ./roms/Mon.hex ;
; mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component|altsyncram_atg1:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; 2048 ; 8 ; -- ; -- ; 16384 ; None ;
; mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component|altsyncram_f7a1:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; 2048 ; 8 ; -- ; -- ; 16384 ; ./roms/cg.hex ;
; video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0|altsyncram_dud1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ;
+----------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+----------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis IP Cores Summary ;
+--------+--------------+---------+--------------+--------------+--------------------------------------------------------+------------------------------------------------------+
; Vendor ; IP Core Name ; Version ; Release Date ; License Type ; Entity Instance ; IP Include File ;
+--------+--------------+---------+--------------+--------------+--------------------------------------------------------+------------------------------------------------------+
; Altera ; RAM: 1-PORT ; N/A ; N/A ; N/A ; |mz80k_mist|mz80k_top:mz80k_top|monrom:mon_rom ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/monrom.v ;
; Altera ; RAM: 1-PORT ; N/A ; N/A ; N/A ; |mz80k_mist|mz80k_top:mz80k_top|ram2:ram2_2 ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/ram2.v ;
; Altera ; ROM: 1-PORT ; N/A ; N/A ; N/A ; |mz80k_mist|mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/cg_rom.v ;
; Altera ; ALTPLL ; N/A ; N/A ; N/A ; |mz80k_mist|pll:pll ; D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/rtl/pll.v ;
+--------+--------------+---------+--------------+--------------+--------------------------------------------------------+------------------------------------------------------+
+-------------------------------------------------------------+
; Logic Cells Representing Combinational Loops ;
+--------------------------------------------------------+----+
; Logic Cell Name ; ;
+--------------------------------------------------------+----+
; mz80k_top:mz80k_top|vram_select~0 ; ;
; rtl~0 ; ;
; rtl~1 ; ;
; mz80k_top:mz80k_top|fz80:z80|i[5]~1 ; ;
; mz80k_top:mz80k_top|fz80:z80|i[4]~2 ; ;
; mz80k_top:mz80k_top|cpu_data_in~1 ; ;
; mz80k_top:mz80k_top|cpu_data_in~2 ; ;
; mz80k_top:mz80k_top|cpu_data_in~3 ; ;
; mz80k_top:mz80k_top|cpu_data_in~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|comb~1 ; ;
; rtl~2 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[6]~4 ; ;
; rtl~3 ; ;
; rtl~4 ; ;
; rtl~5 ; ;
; mz80k_top:mz80k_top|fz80:z80|i[7]~0 ; ;
; rtl~6 ; ;
; mz80k_top:mz80k_top|fz80:z80|i[2]~3 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[2]~1 ; ;
; rtl~7 ; ;
; rtl~8 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[3]~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[5]~3 ; ;
; rtl~9 ; ;
; rtl~10 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[7]~5 ; ;
; mz80k_top:mz80k_top|fz80:z80|im[4]~2 ; ;
; rtl~11 ; ;
; mz80k_top:mz80k_top|fz80:z80|comb~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|q~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|sela_sp~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|sela_hl~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|selal[2]~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|Mux22~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|selah[1]~1 ; ;
; mz80k_top:mz80k_top|fz80:z80|selah[2]~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|Mux8~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|Mux9~0 ; ;
; mz80k_top:mz80k_top|fz80:z80|Mux10~0 ; ;
; Number of logic cells representing combinational loops ; 39 ;
+--------------------------------------------------------+----+
Note: All cells listed above may not be present at the end of synthesis due to various synthesis optimizations.
+-------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis ;
+-----------------------------------------------------------------------------+-------------------------------------------------------+
; Register name ; Reason for Removal ;
+-----------------------------------------------------------------------------+-------------------------------------------------------+
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrout_en ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|pixsz4[6,7] ; Stuck at GND due to stuck port data_in ;
; video_mixer:video_mixer|scandoubler:scandoubler|pixsz2[7] ; Stuck at GND due to stuck port data_in ;
; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_lock_sync ; Stuck at VCC due to stuck port data_in ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|iff1 ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[0..9] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_h[0..10] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs_out ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|req_line_reset ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[10,11] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs2 ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_line[0,1] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|vs ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs_rise[0..11] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hcnt[0..10] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[0..11] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[0..11] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|ls ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|hs ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|ce_div[0..2] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|ce_cnt[0..2] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|pixsz4[0..5] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|pixsz2[0..6] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|phase[0..2] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|ce_x1 ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|ce_x4 ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|pix_len[0..7] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|old_ce ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|y[0,1] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|prevbuf ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|old_reset_line ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|y[2..7] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|old_reset_frame ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|i[0,1] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Next1[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Next0[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Curr1[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Curr0[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Prev1[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Prev0[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|D[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|H[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|F[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|B[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|G[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|A[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|nextpatt[0..7] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrout_addr2[0..9] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrout_addr1[0,1] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrdata[0..8] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[0..8] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrin_addr2[0..8] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrpix[0..8] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Next2[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Prev2[0..17] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Curr2_addr2[0..8] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Curr2_addr1 ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[2..7] ; Lost fanout ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrin_en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[0]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[1]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[2]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[3]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[4]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[5]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[6]~en ; Lost fanout ;
; mz80k_top:mz80k_top|ps2:ps2_1|data[7]~en ; Lost fanout ;
; mist_io:mist_io|b_data[1..7] ; Merged with mist_io:mist_io|b_data[0] ;
; video_mixer:video_mixer|osd:osd|pixsz[24..31] ; Merged with video_mixer:video_mixer|osd:osd|pixsz[23] ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|eschalt ; Stuck at GND due to stuck port data_in ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|nmiack ; Stuck at GND due to stuck port data_in ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|intack ; Stuck at GND due to stuck port data_in ;
; mz80k_top:mz80k_top|vga:vga1|counter[1] ; Lost fanout ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|intmode[0,1] ; Lost fanout ;
; mz80k_top:mz80k_top|i8253:i8253_1|mode0[1] ; Lost fanout ;
; mz80k_top:mz80k_top|i8253:i8253_1|mode1[1] ; Lost fanout ;
; mist_io:mist_io|b_data[0] ; Stuck at GND due to stuck port data_in ;
; mz80k_top:mz80k_top|clk_count[25..32] ; Lost fanout ;
; Total Number of Removed Registers = 495 ; ;
+-----------------------------------------------------------------------------+-------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations ;
+----------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------+
; Register name ; Reason for Removal ; Registers Removed due to This Register ;
+----------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------+
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|wrout_en ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|phase[0], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|phase[1], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|ce_x4, ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[0], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[1], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[2], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[3], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[4], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[5], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|offs[6] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[9] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs2, ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[6], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[7], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[8], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[9], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[10], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[11] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_h[10] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[6], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[7], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[8], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[9], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[10], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|hs_ls[11] ;
; video_mixer:video_mixer|scandoubler:scandoubler|pixsz4[6] ; Stuck at GND ; video_mixer:video_mixer|scandoubler:scandoubler|pixsz2[5], ;
; ; due to stuck port data_in ; video_mixer:video_mixer|scandoubler:scandoubler|pixsz2[6], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|old_ce ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|y[1] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|old_reset_line, ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|old_reset_frame ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[2] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[4], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[6] ;
; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[3] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[5], ;
; ; ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|pattern[7] ;
; mz80k_top:mz80k_top|fz80:z80|seq:seq|nmiack ; Stuck at GND ; mz80k_top:mz80k_top|fz80:z80|seq:seq|intmode[0], ;
; ; due to stuck port data_in ; mz80k_top:mz80k_top|fz80:z80|seq:seq|intmode[1] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[5] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[5] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[4] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[4] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[3] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[3] ;
; video_mixer:video_mixer|scandoubler:scandoubler|sd_hcnt[2] ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|hs_max[2] ;
; video_mixer:video_mixer|scandoubler:scandoubler|vs ; Lost Fanouts ; video_mixer:video_mixer|scandoubler:scandoubler|ce_x1 ;
+----------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 891 ;
; Number of registers using Synchronous Clear ; 138 ;
; Number of registers using Synchronous Load ; 142 ;
; Number of registers using Asynchronous Clear ; 160 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 565 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+-------------------------------------------------------------------------------+
; Inverted Register Statistics ;
+---------------------------------------------------------------------+---------+
; Inverted Register ; Fan out ;
+---------------------------------------------------------------------+---------+
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl8[5] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[5] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[5] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[5] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl8[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl3[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl4[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl1[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl0[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl8[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tble[0] ; 7 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl3[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl1[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl7[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl4[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl0[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl9[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl8[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl1[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl0[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl3[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl4[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl7[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl9[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl3[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl7[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl4[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl1[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl0[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[7] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbld[7] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl9[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl8[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tblc[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl2[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl1[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl0[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl3[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl5[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl6[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl4[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|key_tbl7[3] ; 2 ;
; mz80k_top:mz80k_top|i8253:i8253_1|max0[0] ; 2 ;
; mz80k_top:mz80k_top|i8253:i8253_1|max2[0] ; 2 ;
; mz80k_top:mz80k_top|i8253:i8253_1|max1[0] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[4] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[0] ; 13 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[10] ; 14 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[7] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[1] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[2] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[3] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[5] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[6] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[8] ; 2 ;
; mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[9] ; 1 ;
; Total number of inverted registers = 72 ; ;
+---------------------------------------------------------------------+---------+
+----------------------------------------------------------------------------------------------------------+
; Registers Packed Into Inferred Megafunctions ;
+------------------------------------------------+--------------------------------------------------+------+
; Register Name ; Megafunction ; Type ;
+------------------------------------------------+--------------------------------------------------+------+
; video_mixer:video_mixer|osd:osd|osd_byte[0..7] ; video_mixer:video_mixer|osd:osd|osd_buffer_rtl_0 ; RAM ;
+------------------------------------------------+--------------------------------------------------+------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed) ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------+
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|video_mixer:video_mixer|osd:osd|bcnt[1] ;
; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |mz80k_mist|video_mixer:video_mixer|osd:osd|bcnt[10] ;
; 3:1 ; 8 bits ; 16 LEs ; 0 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|seq:seq|inst_reg[3] ;
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_simplec:reg_i|q[4] ;
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2:reg_adrl|q[5] ;
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2:reg_adrh|q[1] ;
; 3:1 ; 32 bits ; 64 LEs ; 32 LEs ; 32 LEs ; Yes ; |mz80k_mist|video_mixer:video_mixer|osd:osd|pixcnt[16] ;
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|reset_cnt[1] ;
; 3:1 ; 16 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|i8253:i8253_1|count0[0] ;
; 3:1 ; 16 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|i8253:i8253_1|count1[3] ;
; 3:1 ; 16 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|i8253:i8253_1|count2[0] ;
; 4:1 ; 6 bits ; 12 LEs ; 6 LEs ; 6 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_f:reg_f|q1[0] ;
; 4:1 ; 6 bits ; 12 LEs ; 6 LEs ; 6 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_f:reg_f|q0[6] ;
; 4:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_a:reg_a|q1[4] ;
; 4:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_a:reg_a|q0[4] ;
; 4:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|seq:seq|state[2] ;
; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_r:reg_r|q[2] ;
; 4:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2s:reg_sph|q[1] ;
; 4:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_2s:reg_spl|q[1] ;
; 4:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; Yes ; |mz80k_mist|mist_io:mist_io|ps2_kbd_tx_state[1] ;
; 4:1 ; 7 bits ; 14 LEs ; 7 LEs ; 7 LEs ; Yes ; |mz80k_mist|mist_io:mist_io|ps2_kbd_tx_byte[5] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_b|q1[2] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_b|q0[4] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_c|q1[1] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_c|q0[3] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_d|q1[6] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_d|q0[6] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_e|q1[4] ;
; 5:1 ; 8 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_e|q0[4] ;
; 15:1 ; 2 bits ; 20 LEs ; 14 LEs ; 6 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|ps2:ps2_1|data[1]~reg0 ;
; 7:1 ; 8 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|qx[5] ;
; 7:1 ; 8 bits ; 32 LEs ; 16 LEs ; 16 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l|qx[2] ;
; 8:1 ; 2 bits ; 10 LEs ; 4 LEs ; 6 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|seq:seq|ifd ;
; 7:1 ; 8 bits ; 32 LEs ; 32 LEs ; 0 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|i8253:i8253_1|data[5] ;
; 10:1 ; 8 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|qy[1] ;
; 10:1 ; 8 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l|qy[6] ;
; 259:1 ; 4 bits ; 688 LEs ; 0 LEs ; 688 LEs ; Yes ; |mz80k_mist|mist_io:mist_io|status[5] ;
; 13:1 ; 8 bits ; 64 LEs ; 16 LEs ; 48 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|q1[7] ;
; 13:1 ; 8 bits ; 64 LEs ; 16 LEs ; 48 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|q0[3] ;
; 13:1 ; 8 bits ; 64 LEs ; 16 LEs ; 48 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l|q1[4] ;
; 13:1 ; 8 bits ; 64 LEs ; 16 LEs ; 48 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l|q0[7] ;
; 3:1 ; 11 bits ; 22 LEs ; 11 LEs ; 11 LEs ; Yes ; |mz80k_mist|mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1|key_data[4] ;
; 4:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h|Mux2 ;
; 4:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_l|Mux4 ;
; 4:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux4 ;
; 4:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux3 ;
; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |mz80k_mist|video_mixer:video_mixer|pr[6] ;
; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |mz80k_mist|video_mixer:video_mixer|pb[0] ;
; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |mz80k_mist|video_mixer:video_mixer|y[2] ;
; 8:1 ; 8 bits ; 40 LEs ; 32 LEs ; 8 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux17 ;
; 8:1 ; 8 bits ; 40 LEs ; 40 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux8 ;
; 8:1 ; 16 bits ; 80 LEs ; 64 LEs ; 16 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux44 ;
; 16:1 ; 4 bits ; 40 LEs ; 40 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux28 ;
; 16:1 ; 4 bits ; 40 LEs ; 40 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|fz80:z80|Mux27 ;
; 6:1 ; 5 bits ; 20 LEs ; 15 LEs ; 5 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|cpu_data_in[1] ;
; 6:1 ; 2 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |mz80k_mist|mz80k_top:mz80k_top|cpu_data_in[6] ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component|altsyncram_f7a1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------------+
; Source assignments for mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component|altsyncram_atg1:auto_generated ;
+---------------------------------+--------------------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+---------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+---------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------+
; Source assignments for video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0|altsyncram_dud1:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+-----------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+-----------------------------------------------------+
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pll:pll|altpll:altpll_component ;
+-------------------------------+-----------------------+----------------------+
; Parameter Name ; Value ; Type ;
+-------------------------------+-----------------------+----------------------+
; OPERATION_MODE ; NORMAL ; Untyped ;
; PLL_TYPE ; AUTO ; Untyped ;
; LPM_HINT ; CBX_MODULE_PREFIX=pll ; Untyped ;
; QUALIFY_CONF_DONE ; OFF ; Untyped ;
; COMPENSATE_CLOCK ; CLK0 ; Untyped ;
; SCAN_CHAIN ; LONG ; Untyped ;
; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
; INCLK0_INPUT_FREQUENCY ; 37037 ; Signed Integer ;
; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
; GATE_LOCK_SIGNAL ; NO ; Untyped ;
; GATE_LOCK_COUNTER ; 0 ; Untyped ;
; LOCK_HIGH ; 1 ; Untyped ;
; LOCK_LOW ; 1 ; Untyped ;
; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
; SKIP_VCO ; OFF ; Untyped ;
; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
; BANDWIDTH ; 0 ; Untyped ;
; BANDWIDTH_TYPE ; AUTO ; Untyped ;
; SPREAD_FREQUENCY ; 0 ; Untyped ;
; DOWN_SPREAD ; 0 ; Untyped ;
; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
; SELF_RESET_ON_LOSS_LOCK ; OFF ; Untyped ;
; CLK9_MULTIPLY_BY ; 0 ; Untyped ;
; CLK8_MULTIPLY_BY ; 0 ; Untyped ;
; CLK7_MULTIPLY_BY ; 0 ; Untyped ;
; CLK6_MULTIPLY_BY ; 0 ; Untyped ;
; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
; CLK4_MULTIPLY_BY ; 1 ; Untyped ;
; CLK3_MULTIPLY_BY ; 1 ; Untyped ;
; CLK2_MULTIPLY_BY ; 1 ; Untyped ;
; CLK1_MULTIPLY_BY ; 25 ; Signed Integer ;
; CLK0_MULTIPLY_BY ; 50 ; Signed Integer ;
; CLK9_DIVIDE_BY ; 0 ; Untyped ;
; CLK8_DIVIDE_BY ; 0 ; Untyped ;
; CLK7_DIVIDE_BY ; 0 ; Untyped ;
; CLK6_DIVIDE_BY ; 0 ; Untyped ;
; CLK5_DIVIDE_BY ; 1 ; Untyped ;
; CLK4_DIVIDE_BY ; 1 ; Untyped ;
; CLK3_DIVIDE_BY ; 1 ; Untyped ;
; CLK2_DIVIDE_BY ; 1 ; Untyped ;
; CLK1_DIVIDE_BY ; 54 ; Signed Integer ;
; CLK0_DIVIDE_BY ; 27 ; Signed Integer ;
; CLK9_PHASE_SHIFT ; 0 ; Untyped ;
; CLK8_PHASE_SHIFT ; 0 ; Untyped ;
; CLK7_PHASE_SHIFT ; 0 ; Untyped ;
; CLK6_PHASE_SHIFT ; 0 ; Untyped ;
; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
; CLK4_PHASE_SHIFT ; 0 ; Untyped ;
; CLK3_PHASE_SHIFT ; 0 ; Untyped ;
; CLK2_PHASE_SHIFT ; 0 ; Untyped ;
; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
; CLK0_PHASE_SHIFT ; 0 ; Untyped ;
; CLK5_TIME_DELAY ; 0 ; Untyped ;
; CLK4_TIME_DELAY ; 0 ; Untyped ;
; CLK3_TIME_DELAY ; 0 ; Untyped ;
; CLK2_TIME_DELAY ; 0 ; Untyped ;
; CLK1_TIME_DELAY ; 0 ; Untyped ;
; CLK0_TIME_DELAY ; 0 ; Untyped ;
; CLK9_DUTY_CYCLE ; 50 ; Untyped ;
; CLK8_DUTY_CYCLE ; 50 ; Untyped ;
; CLK7_DUTY_CYCLE ; 50 ; Untyped ;
; CLK6_DUTY_CYCLE ; 50 ; Untyped ;
; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
; CLK4_DUTY_CYCLE ; 50 ; Untyped ;
; CLK3_DUTY_CYCLE ; 50 ; Untyped ;
; CLK2_DUTY_CYCLE ; 50 ; Untyped ;
; CLK1_DUTY_CYCLE ; 50 ; Signed Integer ;
; CLK0_DUTY_CYCLE ; 50 ; Signed Integer ;
; CLK9_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK8_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK7_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK6_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK5_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK4_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK3_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK2_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK1_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK0_USE_EVEN_COUNTER_MODE ; OFF ; Untyped ;
; CLK9_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK8_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK7_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK6_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK5_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK4_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK3_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK2_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK1_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; CLK0_USE_EVEN_COUNTER_VALUE ; OFF ; Untyped ;
; LOCK_WINDOW_UI ; 0.05 ; Untyped ;
; LOCK_WINDOW_UI_BITS ; UNUSED ; Untyped ;
; VCO_RANGE_DETECTOR_LOW_BITS ; UNUSED ; Untyped ;
; VCO_RANGE_DETECTOR_HIGH_BITS ; UNUSED ; Untyped ;
; DPA_MULTIPLY_BY ; 0 ; Untyped ;
; DPA_DIVIDE_BY ; 1 ; Untyped ;
; DPA_DIVIDER ; 0 ; Untyped ;
; EXTCLK3_MULTIPLY_BY ; 1 ; Untyped ;
; EXTCLK2_MULTIPLY_BY ; 1 ; Untyped ;
; EXTCLK1_MULTIPLY_BY ; 1 ; Untyped ;
; EXTCLK0_MULTIPLY_BY ; 1 ; Untyped ;
; EXTCLK3_DIVIDE_BY ; 1 ; Untyped ;
; EXTCLK2_DIVIDE_BY ; 1 ; Untyped ;
; EXTCLK1_DIVIDE_BY ; 1 ; Untyped ;
; EXTCLK0_DIVIDE_BY ; 1 ; Untyped ;
; EXTCLK3_PHASE_SHIFT ; 0 ; Untyped ;
; EXTCLK2_PHASE_SHIFT ; 0 ; Untyped ;
; EXTCLK1_PHASE_SHIFT ; 0 ; Untyped ;
; EXTCLK0_PHASE_SHIFT ; 0 ; Untyped ;
; EXTCLK3_TIME_DELAY ; 0 ; Untyped ;
; EXTCLK2_TIME_DELAY ; 0 ; Untyped ;
; EXTCLK1_TIME_DELAY ; 0 ; Untyped ;
; EXTCLK0_TIME_DELAY ; 0 ; Untyped ;
; EXTCLK3_DUTY_CYCLE ; 50 ; Untyped ;
; EXTCLK2_DUTY_CYCLE ; 50 ; Untyped ;
; EXTCLK1_DUTY_CYCLE ; 50 ; Untyped ;
; EXTCLK0_DUTY_CYCLE ; 50 ; Untyped ;
; VCO_MULTIPLY_BY ; 0 ; Untyped ;
; VCO_DIVIDE_BY ; 0 ; Untyped ;
; SCLKOUT0_PHASE_SHIFT ; 0 ; Untyped ;
; SCLKOUT1_PHASE_SHIFT ; 0 ; Untyped ;
; VCO_MIN ; 0 ; Untyped ;
; VCO_MAX ; 0 ; Untyped ;
; VCO_CENTER ; 0 ; Untyped ;
; PFD_MIN ; 0 ; Untyped ;
; PFD_MAX ; 0 ; Untyped ;
; M_INITIAL ; 0 ; Untyped ;
; M ; 0 ; Untyped ;
; N ; 1 ; Untyped ;
; M2 ; 1 ; Untyped ;
; N2 ; 1 ; Untyped ;
; SS ; 1 ; Untyped ;
; C0_HIGH ; 0 ; Untyped ;
; C1_HIGH ; 0 ; Untyped ;
; C2_HIGH ; 0 ; Untyped ;
; C3_HIGH ; 0 ; Untyped ;
; C4_HIGH ; 0 ; Untyped ;
; C5_HIGH ; 0 ; Untyped ;
; C6_HIGH ; 0 ; Untyped ;
; C7_HIGH ; 0 ; Untyped ;
; C8_HIGH ; 0 ; Untyped ;
; C9_HIGH ; 0 ; Untyped ;
; C0_LOW ; 0 ; Untyped ;
; C1_LOW ; 0 ; Untyped ;
; C2_LOW ; 0 ; Untyped ;
; C3_LOW ; 0 ; Untyped ;
; C4_LOW ; 0 ; Untyped ;
; C5_LOW ; 0 ; Untyped ;
; C6_LOW ; 0 ; Untyped ;
; C7_LOW ; 0 ; Untyped ;
; C8_LOW ; 0 ; Untyped ;
; C9_LOW ; 0 ; Untyped ;
; C0_INITIAL ; 0 ; Untyped ;
; C1_INITIAL ; 0 ; Untyped ;
; C2_INITIAL ; 0 ; Untyped ;
; C3_INITIAL ; 0 ; Untyped ;
; C4_INITIAL ; 0 ; Untyped ;
; C5_INITIAL ; 0 ; Untyped ;
; C6_INITIAL ; 0 ; Untyped ;
; C7_INITIAL ; 0 ; Untyped ;
; C8_INITIAL ; 0 ; Untyped ;
; C9_INITIAL ; 0 ; Untyped ;
; C0_MODE ; BYPASS ; Untyped ;
; C1_MODE ; BYPASS ; Untyped ;
; C2_MODE ; BYPASS ; Untyped ;
; C3_MODE ; BYPASS ; Untyped ;
; C4_MODE ; BYPASS ; Untyped ;
; C5_MODE ; BYPASS ; Untyped ;
; C6_MODE ; BYPASS ; Untyped ;
; C7_MODE ; BYPASS ; Untyped ;
; C8_MODE ; BYPASS ; Untyped ;
; C9_MODE ; BYPASS ; Untyped ;
; C0_PH ; 0 ; Untyped ;
; C1_PH ; 0 ; Untyped ;
; C2_PH ; 0 ; Untyped ;
; C3_PH ; 0 ; Untyped ;
; C4_PH ; 0 ; Untyped ;
; C5_PH ; 0 ; Untyped ;
; C6_PH ; 0 ; Untyped ;
; C7_PH ; 0 ; Untyped ;
; C8_PH ; 0 ; Untyped ;
; C9_PH ; 0 ; Untyped ;
; L0_HIGH ; 1 ; Untyped ;
; L1_HIGH ; 1 ; Untyped ;
; G0_HIGH ; 1 ; Untyped ;
; G1_HIGH ; 1 ; Untyped ;
; G2_HIGH ; 1 ; Untyped ;
; G3_HIGH ; 1 ; Untyped ;
; E0_HIGH ; 1 ; Untyped ;
; E1_HIGH ; 1 ; Untyped ;
; E2_HIGH ; 1 ; Untyped ;
; E3_HIGH ; 1 ; Untyped ;
; L0_LOW ; 1 ; Untyped ;
; L1_LOW ; 1 ; Untyped ;
; G0_LOW ; 1 ; Untyped ;
; G1_LOW ; 1 ; Untyped ;
; G2_LOW ; 1 ; Untyped ;
; G3_LOW ; 1 ; Untyped ;
; E0_LOW ; 1 ; Untyped ;
; E1_LOW ; 1 ; Untyped ;
; E2_LOW ; 1 ; Untyped ;
; E3_LOW ; 1 ; Untyped ;
; L0_INITIAL ; 1 ; Untyped ;
; L1_INITIAL ; 1 ; Untyped ;
; G0_INITIAL ; 1 ; Untyped ;
; G1_INITIAL ; 1 ; Untyped ;
; G2_INITIAL ; 1 ; Untyped ;
; G3_INITIAL ; 1 ; Untyped ;
; E0_INITIAL ; 1 ; Untyped ;
; E1_INITIAL ; 1 ; Untyped ;
; E2_INITIAL ; 1 ; Untyped ;
; E3_INITIAL ; 1 ; Untyped ;
; L0_MODE ; BYPASS ; Untyped ;
; L1_MODE ; BYPASS ; Untyped ;
; G0_MODE ; BYPASS ; Untyped ;
; G1_MODE ; BYPASS ; Untyped ;
; G2_MODE ; BYPASS ; Untyped ;
; G3_MODE ; BYPASS ; Untyped ;
; E0_MODE ; BYPASS ; Untyped ;
; E1_MODE ; BYPASS ; Untyped ;
; E2_MODE ; BYPASS ; Untyped ;
; E3_MODE ; BYPASS ; Untyped ;
; L0_PH ; 0 ; Untyped ;
; L1_PH ; 0 ; Untyped ;
; G0_PH ; 0 ; Untyped ;
; G1_PH ; 0 ; Untyped ;
; G2_PH ; 0 ; Untyped ;
; G3_PH ; 0 ; Untyped ;
; E0_PH ; 0 ; Untyped ;
; E1_PH ; 0 ; Untyped ;
; E2_PH ; 0 ; Untyped ;
; E3_PH ; 0 ; Untyped ;
; M_PH ; 0 ; Untyped ;
; C1_USE_CASC_IN ; OFF ; Untyped ;
; C2_USE_CASC_IN ; OFF ; Untyped ;
; C3_USE_CASC_IN ; OFF ; Untyped ;
; C4_USE_CASC_IN ; OFF ; Untyped ;
; C5_USE_CASC_IN ; OFF ; Untyped ;
; C6_USE_CASC_IN ; OFF ; Untyped ;
; C7_USE_CASC_IN ; OFF ; Untyped ;
; C8_USE_CASC_IN ; OFF ; Untyped ;
; C9_USE_CASC_IN ; OFF ; Untyped ;
; CLK0_COUNTER ; G0 ; Untyped ;
; CLK1_COUNTER ; G0 ; Untyped ;
; CLK2_COUNTER ; G0 ; Untyped ;
; CLK3_COUNTER ; G0 ; Untyped ;
; CLK4_COUNTER ; G0 ; Untyped ;
; CLK5_COUNTER ; G0 ; Untyped ;
; CLK6_COUNTER ; E0 ; Untyped ;
; CLK7_COUNTER ; E1 ; Untyped ;
; CLK8_COUNTER ; E2 ; Untyped ;
; CLK9_COUNTER ; E3 ; Untyped ;
; L0_TIME_DELAY ; 0 ; Untyped ;
; L1_TIME_DELAY ; 0 ; Untyped ;
; G0_TIME_DELAY ; 0 ; Untyped ;
; G1_TIME_DELAY ; 0 ; Untyped ;
; G2_TIME_DELAY ; 0 ; Untyped ;
; G3_TIME_DELAY ; 0 ; Untyped ;
; E0_TIME_DELAY ; 0 ; Untyped ;
; E1_TIME_DELAY ; 0 ; Untyped ;
; E2_TIME_DELAY ; 0 ; Untyped ;
; E3_TIME_DELAY ; 0 ; Untyped ;
; M_TIME_DELAY ; 0 ; Untyped ;
; N_TIME_DELAY ; 0 ; Untyped ;
; EXTCLK3_COUNTER ; E3 ; Untyped ;
; EXTCLK2_COUNTER ; E2 ; Untyped ;
; EXTCLK1_COUNTER ; E1 ; Untyped ;
; EXTCLK0_COUNTER ; E0 ; Untyped ;
; ENABLE0_COUNTER ; L0 ; Untyped ;
; ENABLE1_COUNTER ; L0 ; Untyped ;
; CHARGE_PUMP_CURRENT ; 2 ; Untyped ;
; LOOP_FILTER_R ; 1.000000 ; Untyped ;
; LOOP_FILTER_C ; 5 ; Untyped ;
; CHARGE_PUMP_CURRENT_BITS ; 9999 ; Untyped ;
; LOOP_FILTER_R_BITS ; 9999 ; Untyped ;
; LOOP_FILTER_C_BITS ; 9999 ; Untyped ;
; VCO_POST_SCALE ; 0 ; Untyped ;
; CLK2_OUTPUT_FREQUENCY ; 0 ; Untyped ;
; CLK1_OUTPUT_FREQUENCY ; 0 ; Untyped ;
; CLK0_OUTPUT_FREQUENCY ; 0 ; Untyped ;
; INTENDED_DEVICE_FAMILY ; Cyclone III ; Untyped ;
; PORT_CLKENA0 ; PORT_UNUSED ; Untyped ;
; PORT_CLKENA1 ; PORT_UNUSED ; Untyped ;
; PORT_CLKENA2 ; PORT_UNUSED ; Untyped ;
; PORT_CLKENA3 ; PORT_UNUSED ; Untyped ;
; PORT_CLKENA4 ; PORT_UNUSED ; Untyped ;
; PORT_CLKENA5 ; PORT_UNUSED ; Untyped ;
; PORT_EXTCLKENA0 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_EXTCLKENA1 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_EXTCLKENA2 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_EXTCLKENA3 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_EXTCLK0 ; PORT_UNUSED ; Untyped ;
; PORT_EXTCLK1 ; PORT_UNUSED ; Untyped ;
; PORT_EXTCLK2 ; PORT_UNUSED ; Untyped ;
; PORT_EXTCLK3 ; PORT_UNUSED ; Untyped ;
; PORT_CLKBAD0 ; PORT_UNUSED ; Untyped ;
; PORT_CLKBAD1 ; PORT_UNUSED ; Untyped ;
; PORT_CLK0 ; PORT_USED ; Untyped ;
; PORT_CLK1 ; PORT_USED ; Untyped ;
; PORT_CLK2 ; PORT_UNUSED ; Untyped ;
; PORT_CLK3 ; PORT_UNUSED ; Untyped ;
; PORT_CLK4 ; PORT_UNUSED ; Untyped ;
; PORT_CLK5 ; PORT_UNUSED ; Untyped ;
; PORT_CLK6 ; PORT_UNUSED ; Untyped ;
; PORT_CLK7 ; PORT_UNUSED ; Untyped ;
; PORT_CLK8 ; PORT_UNUSED ; Untyped ;
; PORT_CLK9 ; PORT_UNUSED ; Untyped ;
; PORT_SCANDATA ; PORT_UNUSED ; Untyped ;
; PORT_SCANDATAOUT ; PORT_UNUSED ; Untyped ;
; PORT_SCANDONE ; PORT_UNUSED ; Untyped ;
; PORT_SCLKOUT1 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_SCLKOUT0 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_ACTIVECLOCK ; PORT_UNUSED ; Untyped ;
; PORT_CLKLOSS ; PORT_UNUSED ; Untyped ;
; PORT_INCLK1 ; PORT_UNUSED ; Untyped ;
; PORT_INCLK0 ; PORT_USED ; Untyped ;
; PORT_FBIN ; PORT_UNUSED ; Untyped ;
; PORT_PLLENA ; PORT_UNUSED ; Untyped ;
; PORT_CLKSWITCH ; PORT_UNUSED ; Untyped ;
; PORT_ARESET ; PORT_USED ; Untyped ;
; PORT_PFDENA ; PORT_UNUSED ; Untyped ;
; PORT_SCANCLK ; PORT_UNUSED ; Untyped ;
; PORT_SCANACLR ; PORT_UNUSED ; Untyped ;
; PORT_SCANREAD ; PORT_UNUSED ; Untyped ;
; PORT_SCANWRITE ; PORT_UNUSED ; Untyped ;
; PORT_ENABLE0 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_ENABLE1 ; PORT_CONNECTIVITY ; Untyped ;
; PORT_LOCKED ; PORT_USED ; Untyped ;
; PORT_CONFIGUPDATE ; PORT_UNUSED ; Untyped ;
; PORT_FBOUT ; PORT_CONNECTIVITY ; Untyped ;
; PORT_PHASEDONE ; PORT_UNUSED ; Untyped ;
; PORT_PHASESTEP ; PORT_UNUSED ; Untyped ;
; PORT_PHASEUPDOWN ; PORT_UNUSED ; Untyped ;
; PORT_SCANCLKENA ; PORT_UNUSED ; Untyped ;
; PORT_PHASECOUNTERSELECT ; PORT_UNUSED ; Untyped ;
; PORT_VCOOVERRANGE ; PORT_CONNECTIVITY ; Untyped ;
; PORT_VCOUNDERRANGE ; PORT_CONNECTIVITY ; Untyped ;
; M_TEST_SOURCE ; 5 ; Untyped ;
; C0_TEST_SOURCE ; 5 ; Untyped ;
; C1_TEST_SOURCE ; 5 ; Untyped ;
; C2_TEST_SOURCE ; 5 ; Untyped ;
; C3_TEST_SOURCE ; 5 ; Untyped ;
; C4_TEST_SOURCE ; 5 ; Untyped ;
; C5_TEST_SOURCE ; 5 ; Untyped ;
; C6_TEST_SOURCE ; 5 ; Untyped ;
; C7_TEST_SOURCE ; 5 ; Untyped ;
; C8_TEST_SOURCE ; 5 ; Untyped ;
; C9_TEST_SOURCE ; 5 ; Untyped ;
; CBXI_PARAMETER ; pll_altpll ; Untyped ;
; VCO_FREQUENCY_CONTROL ; AUTO ; Untyped ;
; VCO_PHASE_SHIFT_STEP ; 0 ; Untyped ;
; WIDTH_CLOCK ; 5 ; Signed Integer ;
; WIDTH_PHASECOUNTERSELECT ; 4 ; Untyped ;
; USING_FBMIMICBIDIR_PORT ; OFF ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; SCAN_CHAIN_MIF_FILE ; UNUSED ; Untyped ;
; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
+-------------------------------+-----------------------+----------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mist_io:mist_io ;
+----------------+-------+-------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------+
; STRLEN ; 63 ; Signed Integer ;
; PS2DIV ; 100 ; Signed Integer ;
+----------------+-------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer ;
+----------------+------------+----------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+------------+----------------------------------------+
; LINE_LENGTH ; 480 ; Signed Integer ;
; HALF_DEPTH ; 1 ; Signed Integer ;
; OSD_COLOR ; 111 ; Unsigned Binary ;
; OSD_X_OFFSET ; 0000000000 ; Unsigned Binary ;
; OSD_Y_OFFSET ; 0000000000 ; Unsigned Binary ;
+----------------+------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler ;
+----------------+-------+---------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------+
; LENGTH ; 480 ; Signed Integer ;
; HALF_DEPTH ; 1 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; LENGTH ; 480 ; Signed Integer ;
; HALF_DEPTH ; 1 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; LENGTH ; 480 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0 ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 480 ; Signed Integer ;
; AWIDTH ; 8 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 9 ; Signed Integer ;
; NUMWORDS_A ; 480 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 9 ; Signed Integer ;
; NUMWORDS_B ; 480 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_c5o1 ; Untyped ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1 ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 480 ; Signed Integer ;
; AWIDTH ; 8 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 9 ; Signed Integer ;
; NUMWORDS_A ; 480 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 9 ; Signed Integer ;
; NUMWORDS_B ; 480 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_c5o1 ; Untyped ;
+------------------------------------+----------------------+----------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out ;
+----------------+-------+-------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------------------------+
; LENGTH ; 480 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0 ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 960 ; Signed Integer ;
; AWIDTH ; 9 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 10 ; Signed Integer ;
; NUMWORDS_A ; 960 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 10 ; Signed Integer ;
; NUMWORDS_B ; 960 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_28o1 ; Untyped ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1 ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 960 ; Signed Integer ;
; AWIDTH ; 9 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 10 ; Signed Integer ;
; NUMWORDS_A ; 960 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 10 ; Signed Integer ;
; NUMWORDS_B ; 960 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_28o1 ; Untyped ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2 ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 960 ; Signed Integer ;
; AWIDTH ; 9 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 10 ; Signed Integer ;
; NUMWORDS_A ; 960 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 10 ; Signed Integer ;
; NUMWORDS_B ; 960 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_28o1 ; Untyped ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3 ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; NUMWORDS ; 960 ; Signed Integer ;
; AWIDTH ; 9 ; Signed Integer ;
; DWIDTH ; 8 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 9 ; Signed Integer ;
; WIDTHAD_A ; 10 ; Signed Integer ;
; NUMWORDS_A ; 960 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 9 ; Signed Integer ;
; WIDTHAD_B ; 10 ; Signed Integer ;
; NUMWORDS_B ; 960 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; BYPASS ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; BYPASS ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_28o1 ; Untyped ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: video_mixer:video_mixer|osd:osd ;
+----------------+------------+------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+------------+------------------------------------------------+
; OSD_X_OFFSET ; 0000000000 ; Unsigned Binary ;
; OSD_Y_OFFSET ; 0000000000 ; Unsigned Binary ;
; OSD_COLOR ; 111 ; Unsigned Binary ;
+----------------+------------+------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sigma_delta_dac:sigma_delta_dac ;
+----------------+-------+-----------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------+
; MSBI ; 2 ; Signed Integer ;
+----------------+-------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|fz80:z80|seq:seq ;
+----------------+-------+----------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------------------------------+
; S_IF1 ; 0000 ; Unsigned Binary ;
; S_IF2 ; 0001 ; Unsigned Binary ;
; S_IMM1 ; 0010 ; Unsigned Binary ;
; S_IMM2 ; 0011 ; Unsigned Binary ;
; S_MR1 ; 0100 ; Unsigned Binary ;
; S_MR2 ; 0101 ; Unsigned Binary ;
; S_DISP ; 0110 ; Unsigned Binary ;
; S_IN ; 0111 ; Unsigned Binary ;
; S_IACK ; 1000 ; Unsigned Binary ;
; S_MW1 ; 1100 ; Unsigned Binary ;
; S_MW2 ; 1101 ; Unsigned Binary ;
; S_OUT ; 1111 ; Unsigned Binary ;
+----------------+-------+----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+-------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+-------------------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; ROM ; Untyped ;
; WIDTH_A ; 8 ; Signed Integer ;
; WIDTHAD_A ; 11 ; Signed Integer ;
; NUMWORDS_A ; 2048 ; Signed Integer ;
; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 1 ; Untyped ;
; WIDTHAD_B ; 1 ; Untyped ;
; NUMWORDS_B ; 1 ; Untyped ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; ./roms/cg.hex ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_f7a1 ; Untyped ;
+------------------------------------+----------------------+-------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+-----------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+-----------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; SINGLE_PORT ; Untyped ;
; WIDTH_A ; 8 ; Signed Integer ;
; WIDTHAD_A ; 15 ; Signed Integer ;
; NUMWORDS_A ; 32768 ; Signed Integer ;
; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 1 ; Untyped ;
; WIDTHAD_B ; 1 ; Untyped ;
; NUMWORDS_B ; 1 ; Untyped ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; ./roms/Mon.hex ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_vli1 ; Untyped ;
+------------------------------------+----------------------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+--------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+--------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; SINGLE_PORT ; Untyped ;
; WIDTH_A ; 8 ; Signed Integer ;
; WIDTHAD_A ; 11 ; Signed Integer ;
; NUMWORDS_A ; 2048 ; Signed Integer ;
; OUTDATA_REG_A ; CLOCK0 ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 1 ; Untyped ;
; WIDTHAD_B ; 1 ; Untyped ;
; NUMWORDS_B ; 1 ; Untyped ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_atg1 ; Untyped ;
+------------------------------------+----------------------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+--------------------------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 8 ; Untyped ;
; WIDTHAD_A ; 11 ; Untyped ;
; NUMWORDS_A ; 2048 ; Untyped ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 8 ; Untyped ;
; WIDTHAD_B ; 11 ; Untyped ;
; NUMWORDS_B ; 2048 ; Untyped ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Untyped ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
; WIDTH_ECCSTATUS ; 3 ; Untyped ;
; DEVICE_FAMILY ; Cyclone III ; Untyped ;
; CBXI_PARAMETER ; altsyncram_dud1 ; Untyped ;
+------------------------------------+----------------------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------+
; altpll Parameter Settings by Entity Instance ;
+-------------------------------+---------------------------------+
; Name ; Value ;
+-------------------------------+---------------------------------+
; Number of entity instances ; 1 ;
; Entity Instance ; pll:pll|altpll:altpll_component ;
; -- OPERATION_MODE ; NORMAL ;
; -- PLL_TYPE ; AUTO ;
; -- PRIMARY_CLOCK ; INCLK0 ;
; -- INCLK0_INPUT_FREQUENCY ; 37037 ;
; -- INCLK1_INPUT_FREQUENCY ; 0 ;
; -- VCO_MULTIPLY_BY ; 0 ;
; -- VCO_DIVIDE_BY ; 0 ;
+-------------------------------+---------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; altsyncram Parameter Settings by Entity Instance ;
+-------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+
; Name ; Value ;
+-------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances ; 10 ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 480 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 480 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 480 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 480 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 960 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 960 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 960 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 960 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 960 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 960 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 9 ;
; -- NUMWORDS_A ; 960 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 9 ;
; -- NUMWORDS_B ; 960 ;
; -- ADDRESS_REG_B ; CLOCK0 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; ROM ;
; -- WIDTH_A ; 8 ;
; -- NUMWORDS_A ; 2048 ;
; -- OUTDATA_REG_A ; CLOCK0 ;
; -- WIDTH_B ; 1 ;
; -- NUMWORDS_B ; 1 ;
; -- ADDRESS_REG_B ; CLOCK1 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; SINGLE_PORT ;
; -- WIDTH_A ; 8 ;
; -- NUMWORDS_A ; 32768 ;
; -- OUTDATA_REG_A ; CLOCK0 ;
; -- WIDTH_B ; 1 ;
; -- NUMWORDS_B ; 1 ;
; -- ADDRESS_REG_B ; CLOCK1 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; SINGLE_PORT ;
; -- WIDTH_A ; 8 ;
; -- NUMWORDS_A ; 2048 ;
; -- OUTDATA_REG_A ; CLOCK0 ;
; -- WIDTH_B ; 1 ;
; -- NUMWORDS_B ; 1 ;
; -- ADDRESS_REG_B ; CLOCK1 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
; Entity Instance ; video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0 ;
; -- OPERATION_MODE ; DUAL_PORT ;
; -- WIDTH_A ; 8 ;
; -- NUMWORDS_A ; 2048 ;
; -- OUTDATA_REG_A ; UNREGISTERED ;
; -- WIDTH_B ; 8 ;
; -- NUMWORDS_B ; 2048 ;
; -- ADDRESS_REG_B ; CLOCK1 ;
; -- OUTDATA_REG_B ; UNREGISTERED ;
; -- RAM_BLOCK_TYPE ; AUTO ;
; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ;
+-------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "keyboard:keyboard" ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; reset ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; reset[-1] ; Input ; Info ; Stuck at GND ;
; joystick ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|ram2:ram2_2" ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; address ; Input ; Warning ; Input port expression (12 bits) is wider than the input port (11 bits) it drives. The 1 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|monrom:mon_rom" ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; address ; Input ; Warning ; Input port expression (16 bits) is wider than the input port (15 bits) it drives. The 1 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom" ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; address ; Input ; Warning ; Input port expression (12 bits) is wider than the input port (11 bits) it drives. The 1 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; clken ; Input ; Info ; Stuck at VCC ;
+---------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|vga:vga1" ;
+------------+--------+----------+----------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------------+--------+----------+----------------------------------------------------------------------------------------------------------+
; VGA_VBLANK ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
+------------+--------+----------+----------------------------------------------------------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|ps2:ps2_1" ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; addr ; Input ; Warning ; Input port expression (4 bits) is smaller than the input port (8 bits) it drives. Extra input bit(s) "addr[7..4]" will be connected to GND. ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|i8253:i8253_1" ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; out2 ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------+--------+----------+-------------------------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|fz80:z80|alu:alu" ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; co[5..4] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; co[2..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top|fz80:z80" ;
+------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; iorq ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; nmireq ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; nmireq[-1] ; Input ; Info ; Stuck at GND ;
; intreq ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; intreq[-1] ; Input ; Info ; Stuck at GND ;
; intack_out ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; mr ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
+------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mz80k_top:mz80k_top" ;
+--------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; SW ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; SCREEN ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
+--------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "sigma_delta_dac:sigma_delta_dac" ;
+-----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+-----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; RESET ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; RESET[-1] ; Input ; Info ; Stuck at GND ;
+-----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Blend:blender" ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Result[8..6] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; Result[2..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x" ;
+--------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; read_x ; Input ; Warning ; Input port expression (11 bits) is wider than the input port (10 bits) it drives. The 1 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
+--------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "video_mixer:video_mixer" ;
+-------------------------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+-------------------------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; scandoubler_disable ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; scandoubler_disable[-1] ; Input ; Info ; Stuck at VCC ;
; ypbpr_full ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; ypbpr_full[-1] ; Input ; Info ; Stuck at VCC ;
; mono ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; mono[-1] ; Input ; Info ; Stuck at GND ;
; line_start ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (1 bits) it drives. The 31 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; line_start[-1] ; Input ; Info ; Stuck at GND ;
+-------------------------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mist_io:mist_io" ;
+--------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; conf_str[497..496] ; Input ; Info ; Stuck at VCC ;
; conf_str[494..493] ; Input ; Info ; Stuck at VCC ;
; conf_str[486..485] ; Input ; Info ; Stuck at VCC ;
; conf_str[478..476] ; Input ; Info ; Stuck at VCC ;
; conf_str[470..468] ; Input ; Info ; Stuck at VCC ;
; conf_str[451..450] ; Input ; Info ; Stuck at VCC ;
; conf_str[444..443] ; Input ; Info ; Stuck at VCC ;
; conf_str[437..435] ; Input ; Info ; Stuck at VCC ;
; conf_str[429..428] ; Input ; Info ; Stuck at VCC ;
; conf_str[417..416] ; Input ; Info ; Stuck at VCC ;
; conf_str[413..411] ; Input ; Info ; Stuck at VCC ;
; conf_str[409..408] ; Input ; Info ; Stuck at VCC ;
; conf_str[403..402] ; Input ; Info ; Stuck at VCC ;
; conf_str[396..395] ; Input ; Info ; Stuck at VCC ;
; conf_str[386..385] ; Input ; Info ; Stuck at VCC ;
; conf_str[381..379] ; Input ; Info ; Stuck at VCC ;
; conf_str[377..376] ; Input ; Info ; Stuck at VCC ;
; conf_str[371..368] ; Input ; Info ; Stuck at VCC ;
; conf_str[365..364] ; Input ; Info ; Stuck at VCC ;
; conf_str[355..354] ; Input ; Info ; Stuck at VCC ;
; conf_str[345..344] ; Input ; Info ; Stuck at VCC ;
; conf_str[313..312] ; Input ; Info ; Stuck at VCC ;
; conf_str[310..309] ; Input ; Info ; Stuck at VCC ;
; conf_str[307..306] ; Input ; Info ; Stuck at VCC ;
; conf_str[302..301] ; Input ; Info ; Stuck at VCC ;
; conf_str[299..296] ; Input ; Info ; Stuck at VCC ;
; conf_str[294..293] ; Input ; Info ; Stuck at VCC ;
; conf_str[289..288] ; Input ; Info ; Stuck at VCC ;
; conf_str[286..285] ; Input ; Info ; Stuck at VCC ;
; conf_str[281..280] ; Input ; Info ; Stuck at VCC ;
; conf_str[275..274] ; Input ; Info ; Stuck at VCC ;
; conf_str[261..260] ; Input ; Info ; Stuck at VCC ;
; conf_str[257..256] ; Input ; Info ; Stuck at VCC ;
; conf_str[251..250] ; Input ; Info ; Stuck at VCC ;
; conf_str[246..245] ; Input ; Info ; Stuck at VCC ;
; conf_str[238..235] ; Input ; Info ; Stuck at VCC ;
; conf_str[227..226] ; Input ; Info ; Stuck at VCC ;
; conf_str[213..212] ; Input ; Info ; Stuck at VCC ;
; conf_str[210..209] ; Input ; Info ; Stuck at VCC ;
; conf_str[203..202] ; Input ; Info ; Stuck at VCC ;
; conf_str[198..197] ; Input ; Info ; Stuck at VCC ;
; conf_str[190..187] ; Input ; Info ; Stuck at VCC ;
; conf_str[181..179] ; Input ; Info ; Stuck at VCC ;
; conf_str[177..176] ; Input ; Info ; Stuck at VCC ;
; conf_str[165..164] ; Input ; Info ; Stuck at VCC ;
; conf_str[155..154] ; Input ; Info ; Stuck at VCC ;
; conf_str[142..141] ; Input ; Info ; Stuck at VCC ;
; conf_str[134..132] ; Input ; Info ; Stuck at VCC ;
; conf_str[129..128] ; Input ; Info ; Stuck at VCC ;
; conf_str[126..125] ; Input ; Info ; Stuck at VCC ;
; conf_str[118..116] ; Input ; Info ; Stuck at VCC ;
; conf_str[109..107] ; Input ; Info ; Stuck at VCC ;
; conf_str[105..104] ; Input ; Info ; Stuck at VCC ;
; conf_str[98..97] ; Input ; Info ; Stuck at VCC ;
; conf_str[91..90] ; Input ; Info ; Stuck at VCC ;
; conf_str[86..84] ; Input ; Info ; Stuck at VCC ;
; conf_str[82..81] ; Input ; Info ; Stuck at VCC ;
; conf_str[77..76] ; Input ; Info ; Stuck at VCC ;
; conf_str[67..65] ; Input ; Info ; Stuck at VCC ;
; conf_str[61..60] ; Input ; Info ; Stuck at VCC ;
; conf_str[51..49] ; Input ; Info ; Stuck at VCC ;
; conf_str[45..44] ; Input ; Info ; Stuck at VCC ;
; conf_str[37..35] ; Input ; Info ; Stuck at VCC ;
; conf_str[29..28] ; Input ; Info ; Stuck at VCC ;
; conf_str[21..20] ; Input ; Info ; Stuck at VCC ;
; conf_str[18..17] ; Input ; Info ; Stuck at VCC ;
; conf_str[13..12] ; Input ; Info ; Stuck at VCC ;
; conf_str[5..4] ; Input ; Info ; Stuck at VCC ;
; conf_str[499..498] ; Input ; Info ; Stuck at GND ;
; conf_str[490..487] ; Input ; Info ; Stuck at GND ;
; conf_str[484..481] ; Input ; Info ; Stuck at GND ;
; conf_str[475..474] ; Input ; Info ; Stuck at GND ;
; conf_str[472..471] ; Input ; Info ; Stuck at GND ;
; conf_str[467..462] ; Input ; Info ; Stuck at GND ;
; conf_str[460..455] ; Input ; Info ; Stuck at GND ;
; conf_str[453..452] ; Input ; Info ; Stuck at GND ;
; conf_str[440..438] ; Input ; Info ; Stuck at GND ;
; conf_str[434..430] ; Input ; Info ; Stuck at GND ;
; conf_str[427..423] ; Input ; Info ; Stuck at GND ;
; conf_str[421..420] ; Input ; Info ; Stuck at GND ;
; conf_str[415..414] ; Input ; Info ; Stuck at GND ;
; conf_str[405..404] ; Input ; Info ; Stuck at GND ;
; conf_str[392..391] ; Input ; Info ; Stuck at GND ;
; conf_str[389..387] ; Input ; Info ; Stuck at GND ;
; conf_str[384..382] ; Input ; Info ; Stuck at GND ;
; conf_str[373..372] ; Input ; Info ; Stuck at GND ;
; conf_str[367..366] ; Input ; Info ; Stuck at GND ;
; conf_str[363..362] ; Input ; Info ; Stuck at GND ;
; conf_str[360..358] ; Input ; Info ; Stuck at GND ;
; conf_str[353..351] ; Input ; Info ; Stuck at GND ;
; conf_str[349..346] ; Input ; Info ; Stuck at GND ;
; conf_str[339..335] ; Input ; Info ; Stuck at GND ;
; conf_str[327..326] ; Input ; Info ; Stuck at GND ;
; conf_str[324..319] ; Input ; Info ; Stuck at GND ;
; conf_str[317..314] ; Input ; Info ; Stuck at GND ;
; conf_str[305..303] ; Input ; Info ; Stuck at GND ;
; conf_str[292..290] ; Input ; Info ; Stuck at GND ;
; conf_str[279..278] ; Input ; Info ; Stuck at GND ;
; conf_str[273..270] ; Input ; Info ; Stuck at GND ;
; conf_str[268..262] ; Input ; Info ; Stuck at GND ;
; conf_str[259..258] ; Input ; Info ; Stuck at GND ;
; conf_str[253..252] ; Input ; Info ; Stuck at GND ;
; conf_str[242..239] ; Input ; Info ; Stuck at GND ;
; conf_str[232..230] ; Input ; Info ; Stuck at GND ;
; conf_str[225..222] ; Input ; Info ; Stuck at GND ;
; conf_str[220..214] ; Input ; Info ; Stuck at GND ;
; conf_str[208..207] ; Input ; Info ; Stuck at GND ;
; conf_str[205..204] ; Input ; Info ; Stuck at GND ;
; conf_str[194..191] ; Input ; Info ; Stuck at GND ;
; conf_str[184..182] ; Input ; Info ; Stuck at GND ;
; conf_str[169..166] ; Input ; Info ; Stuck at GND ;
; conf_str[159..158] ; Input ; Info ; Stuck at GND ;
; conf_str[153..151] ; Input ; Info ; Stuck at GND ;
; conf_str[147..146] ; Input ; Info ; Stuck at GND ;
; conf_str[144..143] ; Input ; Info ; Stuck at GND ;
; conf_str[140..139] ; Input ; Info ; Stuck at GND ;
; conf_str[131..130] ; Input ; Info ; Stuck at GND ;
; conf_str[124..123] ; Input ; Info ; Stuck at GND ;
; conf_str[113..110] ; Input ; Info ; Stuck at GND ;
; conf_str[96..94] ; Input ; Info ; Stuck at GND ;
; conf_str[89..87] ; Input ; Info ; Stuck at GND ;
; conf_str[80..78] ; Input ; Info ; Stuck at GND ;
; conf_str[75..70] ; Input ; Info ; Stuck at GND ;
; conf_str[64..62] ; Input ; Info ; Stuck at GND ;
; conf_str[59..58] ; Input ; Info ; Stuck at GND ;
; conf_str[56..54] ; Input ; Info ; Stuck at GND ;
; conf_str[48..46] ; Input ; Info ; Stuck at GND ;
; conf_str[43..41] ; Input ; Info ; Stuck at GND ;
; conf_str[39..38] ; Input ; Info ; Stuck at GND ;
; conf_str[34..30] ; Input ; Info ; Stuck at GND ;
; conf_str[27..22] ; Input ; Info ; Stuck at GND ;
; conf_str[16..14] ; Input ; Info ; Stuck at GND ;
; conf_str[11..10] ; Input ; Info ; Stuck at GND ;
; conf_str[8..6] ; Input ; Info ; Stuck at GND ;
; conf_str[1..0] ; Input ; Info ; Stuck at GND ;
; conf_str[503] ; Input ; Info ; Stuck at GND ;
; conf_str[502] ; Input ; Info ; Stuck at VCC ;
; conf_str[501] ; Input ; Info ; Stuck at GND ;
; conf_str[500] ; Input ; Info ; Stuck at VCC ;
; conf_str[495] ; Input ; Info ; Stuck at GND ;
; conf_str[492] ; Input ; Info ; Stuck at GND ;
; conf_str[491] ; Input ; Info ; Stuck at VCC ;
; conf_str[480] ; Input ; Info ; Stuck at VCC ;
; conf_str[479] ; Input ; Info ; Stuck at GND ;
; conf_str[473] ; Input ; Info ; Stuck at VCC ;
; conf_str[461] ; Input ; Info ; Stuck at VCC ;
; conf_str[454] ; Input ; Info ; Stuck at VCC ;
; conf_str[449] ; Input ; Info ; Stuck at GND ;
; conf_str[448] ; Input ; Info ; Stuck at VCC ;
; conf_str[447] ; Input ; Info ; Stuck at GND ;
; conf_str[446] ; Input ; Info ; Stuck at VCC ;
; conf_str[445] ; Input ; Info ; Stuck at GND ;
; conf_str[442] ; Input ; Info ; Stuck at GND ;
; conf_str[441] ; Input ; Info ; Stuck at VCC ;
; conf_str[422] ; Input ; Info ; Stuck at VCC ;
; conf_str[419] ; Input ; Info ; Stuck at VCC ;
; conf_str[418] ; Input ; Info ; Stuck at GND ;
; conf_str[410] ; Input ; Info ; Stuck at GND ;
; conf_str[407] ; Input ; Info ; Stuck at GND ;
; conf_str[406] ; Input ; Info ; Stuck at VCC ;
; conf_str[401] ; Input ; Info ; Stuck at GND ;
; conf_str[400] ; Input ; Info ; Stuck at VCC ;
; conf_str[399] ; Input ; Info ; Stuck at GND ;
; conf_str[398] ; Input ; Info ; Stuck at VCC ;
; conf_str[397] ; Input ; Info ; Stuck at GND ;
; conf_str[394] ; Input ; Info ; Stuck at GND ;
; conf_str[393] ; Input ; Info ; Stuck at VCC ;
; conf_str[390] ; Input ; Info ; Stuck at VCC ;
; conf_str[378] ; Input ; Info ; Stuck at GND ;
; conf_str[375] ; Input ; Info ; Stuck at GND ;
; conf_str[374] ; Input ; Info ; Stuck at VCC ;
; conf_str[361] ; Input ; Info ; Stuck at VCC ;
; conf_str[357] ; Input ; Info ; Stuck at VCC ;
; conf_str[356] ; Input ; Info ; Stuck at GND ;
; conf_str[350] ; Input ; Info ; Stuck at VCC ;
; conf_str[343] ; Input ; Info ; Stuck at GND ;
; conf_str[342] ; Input ; Info ; Stuck at VCC ;
; conf_str[341] ; Input ; Info ; Stuck at GND ;
; conf_str[340] ; Input ; Info ; Stuck at VCC ;
; conf_str[334] ; Input ; Info ; Stuck at VCC ;
; conf_str[333] ; Input ; Info ; Stuck at GND ;
; conf_str[332] ; Input ; Info ; Stuck at VCC ;
; conf_str[331] ; Input ; Info ; Stuck at GND ;
; conf_str[330] ; Input ; Info ; Stuck at VCC ;
; conf_str[329] ; Input ; Info ; Stuck at GND ;
; conf_str[328] ; Input ; Info ; Stuck at VCC ;
; conf_str[325] ; Input ; Info ; Stuck at VCC ;
; conf_str[318] ; Input ; Info ; Stuck at VCC ;
; conf_str[311] ; Input ; Info ; Stuck at GND ;
; conf_str[308] ; Input ; Info ; Stuck at GND ;
; conf_str[300] ; Input ; Info ; Stuck at GND ;
; conf_str[295] ; Input ; Info ; Stuck at GND ;
; conf_str[287] ; Input ; Info ; Stuck at GND ;
; conf_str[284] ; Input ; Info ; Stuck at GND ;
; conf_str[283] ; Input ; Info ; Stuck at VCC ;
; conf_str[282] ; Input ; Info ; Stuck at GND ;
; conf_str[277] ; Input ; Info ; Stuck at VCC ;
; conf_str[276] ; Input ; Info ; Stuck at GND ;
; conf_str[269] ; Input ; Info ; Stuck at VCC ;
; conf_str[255] ; Input ; Info ; Stuck at GND ;
; conf_str[254] ; Input ; Info ; Stuck at VCC ;
; conf_str[249] ; Input ; Info ; Stuck at GND ;
; conf_str[248] ; Input ; Info ; Stuck at VCC ;
; conf_str[247] ; Input ; Info ; Stuck at GND ;
; conf_str[244] ; Input ; Info ; Stuck at GND ;
; conf_str[243] ; Input ; Info ; Stuck at VCC ;
; conf_str[234] ; Input ; Info ; Stuck at GND ;
; conf_str[233] ; Input ; Info ; Stuck at VCC ;
; conf_str[229] ; Input ; Info ; Stuck at VCC ;
; conf_str[228] ; Input ; Info ; Stuck at GND ;
; conf_str[221] ; Input ; Info ; Stuck at VCC ;
; conf_str[211] ; Input ; Info ; Stuck at GND ;
; conf_str[206] ; Input ; Info ; Stuck at VCC ;
; conf_str[201] ; Input ; Info ; Stuck at GND ;
; conf_str[200] ; Input ; Info ; Stuck at VCC ;
; conf_str[199] ; Input ; Info ; Stuck at GND ;
; conf_str[196] ; Input ; Info ; Stuck at GND ;
; conf_str[195] ; Input ; Info ; Stuck at VCC ;
; conf_str[186] ; Input ; Info ; Stuck at GND ;
; conf_str[185] ; Input ; Info ; Stuck at VCC ;
; conf_str[178] ; Input ; Info ; Stuck at GND ;
; conf_str[175] ; Input ; Info ; Stuck at GND ;
; conf_str[174] ; Input ; Info ; Stuck at VCC ;
; conf_str[173] ; Input ; Info ; Stuck at GND ;
; conf_str[172] ; Input ; Info ; Stuck at VCC ;
; conf_str[171] ; Input ; Info ; Stuck at GND ;
; conf_str[170] ; Input ; Info ; Stuck at VCC ;
; conf_str[163] ; Input ; Info ; Stuck at GND ;
; conf_str[162] ; Input ; Info ; Stuck at VCC ;
; conf_str[161] ; Input ; Info ; Stuck at GND ;
; conf_str[160] ; Input ; Info ; Stuck at VCC ;
; conf_str[157] ; Input ; Info ; Stuck at VCC ;
; conf_str[156] ; Input ; Info ; Stuck at GND ;
; conf_str[150] ; Input ; Info ; Stuck at VCC ;
; conf_str[149] ; Input ; Info ; Stuck at GND ;
; conf_str[148] ; Input ; Info ; Stuck at VCC ;
; conf_str[145] ; Input ; Info ; Stuck at VCC ;
; conf_str[138] ; Input ; Info ; Stuck at VCC ;
; conf_str[137] ; Input ; Info ; Stuck at GND ;
; conf_str[136] ; Input ; Info ; Stuck at VCC ;
; conf_str[135] ; Input ; Info ; Stuck at GND ;
; conf_str[127] ; Input ; Info ; Stuck at GND ;
; conf_str[122] ; Input ; Info ; Stuck at VCC ;
; conf_str[121] ; Input ; Info ; Stuck at GND ;
; conf_str[120] ; Input ; Info ; Stuck at VCC ;
; conf_str[119] ; Input ; Info ; Stuck at GND ;
; conf_str[115] ; Input ; Info ; Stuck at GND ;
; conf_str[114] ; Input ; Info ; Stuck at VCC ;
; conf_str[106] ; Input ; Info ; Stuck at GND ;
; conf_str[103] ; Input ; Info ; Stuck at GND ;
; conf_str[102] ; Input ; Info ; Stuck at VCC ;
; conf_str[101] ; Input ; Info ; Stuck at GND ;
; conf_str[100] ; Input ; Info ; Stuck at VCC ;
; conf_str[99] ; Input ; Info ; Stuck at GND ;
; conf_str[93] ; Input ; Info ; Stuck at VCC ;
; conf_str[92] ; Input ; Info ; Stuck at GND ;
; conf_str[83] ; Input ; Info ; Stuck at GND ;
; conf_str[69] ; Input ; Info ; Stuck at VCC ;
; conf_str[68] ; Input ; Info ; Stuck at GND ;
; conf_str[57] ; Input ; Info ; Stuck at VCC ;
; conf_str[53] ; Input ; Info ; Stuck at VCC ;
; conf_str[52] ; Input ; Info ; Stuck at GND ;
; conf_str[40] ; Input ; Info ; Stuck at VCC ;
; conf_str[19] ; Input ; Info ; Stuck at GND ;
; conf_str[9] ; Input ; Info ; Stuck at VCC ;
; conf_str[3] ; Input ; Info ; Stuck at GND ;
; conf_str[2] ; Input ; Info ; Stuck at VCC ;
; buttons[0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; switches ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; status[31..6] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; status[1] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; joystick_0 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; joystick_1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; joystick_analog_0 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; joystick_analog_1 ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_conf ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; sd_sdhc ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; img_mounted ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; img_size ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_lba ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; sd_rd ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; sd_wr ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; sd_ack ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_ack_conf ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_buff_addr ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_buff_dout ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; sd_buff_din ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; sd_buff_wr ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ps2_mouse_clk ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ps2_mouse_data ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_force_erase ; Input ; Warning ; Declared by entity but not connected by instance. If a default value exists, it will be used. Otherwise, the port will be connected to GND. ;
; ioctl_download ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_erasing ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_index ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_wr ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_addr ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
; ioctl_dout ; Output ; Warning ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
+--------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
+----------------------------------------------------+
; Port Connectivity Checks: "pll:pll" ;
+--------+-------+----------+------------------------+
; Port ; Type ; Severity ; Details ;
+--------+-------+----------+------------------------+
; areset ; Input ; Info ; Explicitly unconnected ;
+--------+-------+----------+------------------------+
+-------------------------------+
; Elapsed Time Per Partition ;
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top ; 00:00:14 ;
+----------------+--------------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit Analysis & Synthesis
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Sun Jun 24 13:29:55 2018
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off mz80k_mist -c mz80k_mist
Info (11104): Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead.
Info (12021): Found 1 design units, including 1 entities, in source file rtl/mz80k_mist.sv
Info (12023): Found entity 1: mz80k_mist
Info (12021): Found 1 design units, including 1 entities, in source file rtl/mz80k_top.v
Info (12023): Found entity 1: mz80k_top
Info (12021): Found 1 design units, including 1 entities, in source file rtl/vga.v
Info (12023): Found entity 1: vga
Info (12021): Found 1 design units, including 1 entities, in source file rtl/i8253.v
Info (12023): Found entity 1: i8253
Info (12021): Found 2 design units, including 2 entities, in source file rtl/ps2.v
Info (12023): Found entity 1: ps2
Info (12023): Found entity 2: ps2_recieve
Info (12021): Found 15 design units, including 15 entities, in source file rtl/fz80.v
Info (12023): Found entity 1: fz80
Info (12023): Found entity 2: seq
Info (12023): Found entity 3: asu
Info (12023): Found entity 4: alu
Info (12023): Found entity 5: reg_a
Info (12023): Found entity 6: reg_f
Info (12023): Found entity 7: reg_simple
Info (12023): Found entity 8: reg_simplec
Info (12023): Found entity 9: reg_dual2
Info (12023): Found entity 10: reg_2
Info (12023): Found entity 11: reg_2s
Info (12023): Found entity 12: reg_quad3
Info (12023): Found entity 13: reg_pch
Info (12023): Found entity 14: reg_pcl
Info (12023): Found entity 15: reg_r
Info (12021): Found 1 design units, including 1 entities, in source file rtl/sound.v
Info (12023): Found entity 1: sound
Info (12021): Found 1 design units, including 1 entities, in source file rtl/video_mixer.sv
Info (12023): Found entity 1: video_mixer
Info (12021): Found 1 design units, including 1 entities, in source file rtl/sigma_delta_dac.v
Info (12023): Found entity 1: sigma_delta_dac
Info (12021): Found 1 design units, including 1 entities, in source file rtl/scandoubler.v
Info (12023): Found entity 1: scandoubler
Info (12021): Found 1 design units, including 1 entities, in source file rtl/osd.v
Info (12023): Found entity 1: osd
Info (12021): Found 1 design units, including 1 entities, in source file rtl/mist_io.v
Info (12023): Found entity 1: mist_io
Info (12021): Found 7 design units, including 7 entities, in source file rtl/hq2x.sv
Info (12023): Found entity 1: hq2x_in
Info (12023): Found entity 2: hq2x_out
Info (12023): Found entity 3: hq2x_buf
Info (12023): Found entity 4: DiffCheck
Info (12023): Found entity 5: InnerBlend
Info (12023): Found entity 6: Blend
Info (12023): Found entity 7: Hq2x
Info (12021): Found 1 design units, including 1 entities, in source file rtl/keyboard.sv
Info (12023): Found entity 1: keyboard
Info (12021): Found 1 design units, including 1 entities, in source file rtl/pll.v
Info (12023): Found entity 1: pll
Info (12021): Found 1 design units, including 1 entities, in source file rtl/cg_rom.v
Info (12023): Found entity 1: cg_rom
Info (12021): Found 1 design units, including 1 entities, in source file rtl/ram2.v
Info (12023): Found entity 1: ram2
Info (12021): Found 1 design units, including 1 entities, in source file rtl/monrom.v
Info (12023): Found entity 1: monrom
Info (12127): Elaborating entity "mz80k_mist" for the top level hierarchy
Info (12128): Elaborating entity "pll" for hierarchy "pll:pll"
Info (12128): Elaborating entity "altpll" for hierarchy "pll:pll|altpll:altpll_component"
Info (12130): Elaborated megafunction instantiation "pll:pll|altpll:altpll_component"
Info (12133): Instantiated megafunction "pll:pll|altpll:altpll_component" with the following parameter:
Info (12134): Parameter "bandwidth_type" = "AUTO"
Info (12134): Parameter "clk0_divide_by" = "27"
Info (12134): Parameter "clk0_duty_cycle" = "50"
Info (12134): Parameter "clk0_multiply_by" = "50"
Info (12134): Parameter "clk0_phase_shift" = "0"
Info (12134): Parameter "clk1_divide_by" = "54"
Info (12134): Parameter "clk1_duty_cycle" = "50"
Info (12134): Parameter "clk1_multiply_by" = "25"
Info (12134): Parameter "clk1_phase_shift" = "0"
Info (12134): Parameter "compensate_clock" = "CLK0"
Info (12134): Parameter "inclk0_input_frequency" = "37037"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_hint" = "CBX_MODULE_PREFIX=pll"
Info (12134): Parameter "lpm_type" = "altpll"
Info (12134): Parameter "operation_mode" = "NORMAL"
Info (12134): Parameter "pll_type" = "AUTO"
Info (12134): Parameter "port_activeclock" = "PORT_UNUSED"
Info (12134): Parameter "port_areset" = "PORT_USED"
Info (12134): Parameter "port_clkbad0" = "PORT_UNUSED"
Info (12134): Parameter "port_clkbad1" = "PORT_UNUSED"
Info (12134): Parameter "port_clkloss" = "PORT_UNUSED"
Info (12134): Parameter "port_clkswitch" = "PORT_UNUSED"
Info (12134): Parameter "port_configupdate" = "PORT_UNUSED"
Info (12134): Parameter "port_fbin" = "PORT_UNUSED"
Info (12134): Parameter "port_inclk0" = "PORT_USED"
Info (12134): Parameter "port_inclk1" = "PORT_UNUSED"
Info (12134): Parameter "port_locked" = "PORT_USED"
Info (12134): Parameter "port_pfdena" = "PORT_UNUSED"
Info (12134): Parameter "port_phasecounterselect" = "PORT_UNUSED"
Info (12134): Parameter "port_phasedone" = "PORT_UNUSED"
Info (12134): Parameter "port_phasestep" = "PORT_UNUSED"
Info (12134): Parameter "port_phaseupdown" = "PORT_UNUSED"
Info (12134): Parameter "port_pllena" = "PORT_UNUSED"
Info (12134): Parameter "port_scanaclr" = "PORT_UNUSED"
Info (12134): Parameter "port_scanclk" = "PORT_UNUSED"
Info (12134): Parameter "port_scanclkena" = "PORT_UNUSED"
Info (12134): Parameter "port_scandata" = "PORT_UNUSED"
Info (12134): Parameter "port_scandataout" = "PORT_UNUSED"
Info (12134): Parameter "port_scandone" = "PORT_UNUSED"
Info (12134): Parameter "port_scanread" = "PORT_UNUSED"
Info (12134): Parameter "port_scanwrite" = "PORT_UNUSED"
Info (12134): Parameter "port_clk0" = "PORT_USED"
Info (12134): Parameter "port_clk1" = "PORT_USED"
Info (12134): Parameter "port_clk2" = "PORT_UNUSED"
Info (12134): Parameter "port_clk3" = "PORT_UNUSED"
Info (12134): Parameter "port_clk4" = "PORT_UNUSED"
Info (12134): Parameter "port_clk5" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena0" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena1" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena2" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena3" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena4" = "PORT_UNUSED"
Info (12134): Parameter "port_clkena5" = "PORT_UNUSED"
Info (12134): Parameter "port_extclk0" = "PORT_UNUSED"
Info (12134): Parameter "port_extclk1" = "PORT_UNUSED"
Info (12134): Parameter "port_extclk2" = "PORT_UNUSED"
Info (12134): Parameter "port_extclk3" = "PORT_UNUSED"
Info (12134): Parameter "self_reset_on_loss_lock" = "OFF"
Info (12134): Parameter "width_clock" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/pll_altpll.v
Info (12023): Found entity 1: pll_altpll
Info (12128): Elaborating entity "pll_altpll" for hierarchy "pll:pll|altpll:altpll_component|pll_altpll:auto_generated"
Info (12128): Elaborating entity "mist_io" for hierarchy "mist_io:mist_io"
Info (12128): Elaborating entity "video_mixer" for hierarchy "video_mixer:video_mixer"
Info (12128): Elaborating entity "scandoubler" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler"
Info (10264): Verilog HDL Case Statement information at scandoubler.v(114): all case item expressions in this case statement are onehot
Info (10264): Verilog HDL Case Statement information at scandoubler.v(138): all case item expressions in this case statement are onehot
Info (12128): Elaborating entity "Hq2x" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x"
Info (12128): Elaborating entity "DiffCheck" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|DiffCheck:diffcheck0"
Info (12128): Elaborating entity "Blend" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Blend:blender"
Info (12128): Elaborating entity "InnerBlend" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|Blend:blender|InnerBlend:inner_blend1"
Info (12128): Elaborating entity "hq2x_in" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in"
Info (12128): Elaborating entity "hq2x_buf" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0"
Info (12128): Elaborating entity "altsyncram" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component" with the following parameter:
Info (12134): Parameter "address_aclr_b" = "NONE"
Info (12134): Parameter "address_reg_b" = "CLOCK0"
Info (12134): Parameter "clock_enable_input_a" = "BYPASS"
Info (12134): Parameter "clock_enable_input_b" = "BYPASS"
Info (12134): Parameter "clock_enable_output_b" = "BYPASS"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "480"
Info (12134): Parameter "numwords_b" = "480"
Info (12134): Parameter "operation_mode" = "DUAL_PORT"
Info (12134): Parameter "outdata_aclr_b" = "NONE"
Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED"
Info (12134): Parameter "power_up_uninitialized" = "FALSE"
Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
Info (12134): Parameter "widthad_a" = "9"
Info (12134): Parameter "widthad_b" = "9"
Info (12134): Parameter "width_a" = "9"
Info (12134): Parameter "width_b" = "9"
Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c5o1.tdf
Info (12023): Found entity 1: altsyncram_c5o1
Info (12128): Elaborating entity "altsyncram_c5o1" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated"
Info (12128): Elaborating entity "hq2x_out" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out"
Info (12128): Elaborating entity "hq2x_buf" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0"
Info (12128): Elaborating entity "altsyncram" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component" with the following parameter:
Info (12134): Parameter "address_aclr_b" = "NONE"
Info (12134): Parameter "address_reg_b" = "CLOCK0"
Info (12134): Parameter "clock_enable_input_a" = "BYPASS"
Info (12134): Parameter "clock_enable_input_b" = "BYPASS"
Info (12134): Parameter "clock_enable_output_b" = "BYPASS"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "960"
Info (12134): Parameter "numwords_b" = "960"
Info (12134): Parameter "operation_mode" = "DUAL_PORT"
Info (12134): Parameter "outdata_aclr_b" = "NONE"
Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED"
Info (12134): Parameter "power_up_uninitialized" = "FALSE"
Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
Info (12134): Parameter "widthad_a" = "10"
Info (12134): Parameter "widthad_b" = "10"
Info (12134): Parameter "width_a" = "9"
Info (12134): Parameter "width_b" = "9"
Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_28o1.tdf
Info (12023): Found entity 1: altsyncram_28o1
Info (12128): Elaborating entity "altsyncram_28o1" for hierarchy "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated"
Info (12128): Elaborating entity "osd" for hierarchy "video_mixer:video_mixer|osd:osd"
Info (12128): Elaborating entity "sigma_delta_dac" for hierarchy "sigma_delta_dac:sigma_delta_dac"
Info (12128): Elaborating entity "mz80k_top" for hierarchy "mz80k_top:mz80k_top"
Info (12128): Elaborating entity "fz80" for hierarchy "mz80k_top:mz80k_top|fz80:z80"
Info (10264): Verilog HDL Case Statement information at fz80.v(82): all case item expressions in this case statement are onehot
Info (10264): Verilog HDL Case Statement information at fz80.v(154): all case item expressions in this case statement are onehot
Info (12128): Elaborating entity "alu" for hierarchy "mz80k_top:mz80k_top|fz80:z80|alu:alu"
Info (12128): Elaborating entity "asu" for hierarchy "mz80k_top:mz80k_top|fz80:z80|asu:asu"
Info (12128): Elaborating entity "seq" for hierarchy "mz80k_top:mz80k_top|fz80:z80|seq:seq"
Info (12128): Elaborating entity "reg_a" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_a:reg_a"
Info (12128): Elaborating entity "reg_f" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_f:reg_f"
Info (12128): Elaborating entity "reg_dual2" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_dual2:reg_b"
Info (12128): Elaborating entity "reg_quad3" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_quad3:reg_h"
Info (12128): Elaborating entity "reg_2s" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_2s:reg_sph"
Info (12128): Elaborating entity "reg_pch" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_pch:reg_pch"
Info (12128): Elaborating entity "reg_pcl" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_pcl:reg_pcl"
Info (12128): Elaborating entity "reg_2" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_2:reg_adrh"
Info (12128): Elaborating entity "reg_r" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_r:reg_r"
Info (12128): Elaborating entity "reg_simplec" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_simplec:reg_i"
Info (12128): Elaborating entity "reg_simple" for hierarchy "mz80k_top:mz80k_top|fz80:z80|reg_simple:reg_data"
Info (12128): Elaborating entity "i8253" for hierarchy "mz80k_top:mz80k_top|i8253:i8253_1"
Info (12128): Elaborating entity "ps2" for hierarchy "mz80k_top:mz80k_top|ps2:ps2_1"
Warning (10272): Verilog HDL Case Statement warning at ps2.v(159): case item expression covers a value already covered by a previous case item
Warning (10272): Verilog HDL Case Statement warning at ps2.v(167): case item expression covers a value already covered by a previous case item
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl0", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl1", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl2", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl3", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl4", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl5", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl6", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl7", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl8", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at ps2.v(76): inferring latch(es) for variable "key_tbl9", which holds its previous value in one or more paths through the always construct
Info (10041): Inferred latch for "key_tbl9[0]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl9[4]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl9[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl9[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl9[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl8[2]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl8[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl8[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl7[4]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl7[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl7[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl7[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl6[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl6[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl5[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl5[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl4[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl4[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl4[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl3[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl3[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl3[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl2[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl2[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl1[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl1[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl1[7]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl0[5]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl0[6]" at ps2.v(76)
Info (10041): Inferred latch for "key_tbl0[7]" at ps2.v(76)
Info (12128): Elaborating entity "ps2_recieve" for hierarchy "mz80k_top:mz80k_top|ps2:ps2_1|ps2_recieve:ps2_recieve1"
Info (12128): Elaborating entity "vga" for hierarchy "mz80k_top:mz80k_top|vga:vga1"
Info (12128): Elaborating entity "cg_rom" for hierarchy "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom"
Info (12128): Elaborating entity "altsyncram" for hierarchy "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component" with the following parameter:
Info (12134): Parameter "address_aclr_a" = "NONE"
Info (12134): Parameter "clock_enable_input_a" = "NORMAL"
Info (12134): Parameter "clock_enable_output_a" = "NORMAL"
Info (12134): Parameter "init_file" = "./roms/cg.hex"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "2048"
Info (12134): Parameter "operation_mode" = "ROM"
Info (12134): Parameter "outdata_aclr_a" = "NONE"
Info (12134): Parameter "outdata_reg_a" = "CLOCK0"
Info (12134): Parameter "widthad_a" = "11"
Info (12134): Parameter "width_a" = "8"
Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f7a1.tdf
Info (12023): Found entity 1: altsyncram_f7a1
Info (12128): Elaborating entity "altsyncram_f7a1" for hierarchy "mz80k_top:mz80k_top|vga:vga1|cg_rom:cg_rom|altsyncram:altsyncram_component|altsyncram_f7a1:auto_generated"
Info (12128): Elaborating entity "monrom" for hierarchy "mz80k_top:mz80k_top|monrom:mon_rom"
Info (12128): Elaborating entity "altsyncram" for hierarchy "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component" with the following parameter:
Info (12134): Parameter "clock_enable_input_a" = "NORMAL"
Info (12134): Parameter "clock_enable_output_a" = "NORMAL"
Info (12134): Parameter "init_file" = "./roms/Mon.hex"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "32768"
Info (12134): Parameter "operation_mode" = "SINGLE_PORT"
Info (12134): Parameter "outdata_aclr_a" = "NONE"
Info (12134): Parameter "outdata_reg_a" = "CLOCK0"
Info (12134): Parameter "power_up_uninitialized" = "FALSE"
Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ"
Info (12134): Parameter "widthad_a" = "15"
Info (12134): Parameter "width_a" = "8"
Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_vli1.tdf
Info (12023): Found entity 1: altsyncram_vli1
Info (12128): Elaborating entity "altsyncram_vli1" for hierarchy "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/decode_dra.tdf
Info (12023): Found entity 1: decode_dra
Info (12128): Elaborating entity "decode_dra" for hierarchy "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated|decode_dra:decode3"
Info (12021): Found 1 design units, including 1 entities, in source file db/mux_tlb.tdf
Info (12023): Found entity 1: mux_tlb
Info (12128): Elaborating entity "mux_tlb" for hierarchy "mz80k_top:mz80k_top|monrom:mon_rom|altsyncram:altsyncram_component|altsyncram_vli1:auto_generated|mux_tlb:mux2"
Info (12128): Elaborating entity "ram2" for hierarchy "mz80k_top:mz80k_top|ram2:ram2_2"
Info (12128): Elaborating entity "altsyncram" for hierarchy "mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component" with the following parameter:
Info (12134): Parameter "clock_enable_input_a" = "NORMAL"
Info (12134): Parameter "clock_enable_output_a" = "NORMAL"
Info (12134): Parameter "intended_device_family" = "Cyclone III"
Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "2048"
Info (12134): Parameter "operation_mode" = "SINGLE_PORT"
Info (12134): Parameter "outdata_aclr_a" = "NONE"
Info (12134): Parameter "outdata_reg_a" = "CLOCK0"
Info (12134): Parameter "power_up_uninitialized" = "FALSE"
Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ"
Info (12134): Parameter "widthad_a" = "11"
Info (12134): Parameter "width_a" = "8"
Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_atg1.tdf
Info (12023): Found entity 1: altsyncram_atg1
Info (12128): Elaborating entity "altsyncram_atg1" for hierarchy "mz80k_top:mz80k_top|ram2:ram2_2|altsyncram:altsyncram_component|altsyncram_atg1:auto_generated"
Info (12128): Elaborating entity "keyboard" for hierarchy "keyboard:keyboard"
Warning (14284): Synthesized away the following node(s):
Warning (14285): Synthesized away the following RAM node(s):
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf3|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[8]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf2|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[8]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[8]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_out:hq2x_out|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_28o1:auto_generated|q_b[8]"
Warning (14284): Synthesized away the following node(s):
Warning (14285): Synthesized away the following RAM node(s):
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf1|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[8]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[0]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[1]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[2]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[3]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[4]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[5]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[6]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[7]"
Warning (14320): Synthesized away node "video_mixer:video_mixer|scandoubler:scandoubler|Hq2x:Hq2x|hq2x_in:hq2x_in|hq2x_buf:buf0|altsyncram:altsyncram_component|altsyncram_c5o1:auto_generated|q_b[8]"
Warning (19016): Clock multiplexers are found and protected
Warning (19017): Found clock multiplexer mz80k_top:mz80k_top|CLK_CPU
Warning (13046): Tri-state node(s) do not directly drive top-level pin(s)
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[1]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[0]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[0]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[1]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[2]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[3]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[4]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[5]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[6]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|cpu_data_in[7]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[2]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[3]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[4]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[5]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[6]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|vram_data_in[7]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[0]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[1]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[2]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[3]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[4]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[5]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[6]" feeding internal logic into a wire
Warning (13049): Converted tri-state buffer "mz80k_top:mz80k_top|ps2:ps2_1|data[7]" feeding internal logic into a wire
Info (276014): Found 1 instances of uninferred RAM logic
Info (276004): RAM logic "mist_io:mist_io|ps2_kbd_fifo" is uninferred due to inappropriate RAM size
Info (19000): Inferred 1 megafunctions from design logic
Info (276029): Inferred altsyncram megafunction from the following design logic: "video_mixer:video_mixer|osd:osd|osd_buffer_rtl_0"
Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
Info (286033): Parameter WIDTH_A set to 8
Info (286033): Parameter WIDTHAD_A set to 11
Info (286033): Parameter NUMWORDS_A set to 2048
Info (286033): Parameter WIDTH_B set to 8
Info (286033): Parameter WIDTHAD_B set to 11
Info (286033): Parameter NUMWORDS_B set to 2048
Info (286033): Parameter ADDRESS_ACLR_A set to NONE
Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
Info (286033): Parameter ADDRESS_ACLR_B set to NONE
Info (286033): Parameter OUTDATA_ACLR_B set to NONE
Info (286033): Parameter ADDRESS_REG_B set to CLOCK1
Info (286033): Parameter INDATA_ACLR_A set to NONE
Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
Info (12130): Elaborated megafunction instantiation "video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0"
Info (12133): Instantiated megafunction "video_mixer:video_mixer|osd:osd|altsyncram:osd_buffer_rtl_0" with the following parameter:
Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
Info (12134): Parameter "WIDTH_A" = "8"
Info (12134): Parameter "WIDTHAD_A" = "11"
Info (12134): Parameter "NUMWORDS_A" = "2048"
Info (12134): Parameter "WIDTH_B" = "8"
Info (12134): Parameter "WIDTHAD_B" = "11"
Info (12134): Parameter "NUMWORDS_B" = "2048"
Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK1"
Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_dud1.tdf
Info (12023): Found entity 1: altsyncram_dud1
Warning (12241): 12 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info (13000): Registers with preset signals will power-up high
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13024): Output pins are stuck at VCC or GND
Warning (13410): Pin "VGA_VS" is stuck at VCC
Warning (13410): Pin "LED" is stuck at VCC
Info (286030): Timing-Driven Synthesis is running
Info (17049): 472 registers lost all their fanouts during netlist optimizations.
Info (144001): Generated suppressed messages file D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/Output/mz80k_mist.map.smsg
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL
Warning (15899): PLL "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll1" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK[1] is not connected
Warning (21074): Design contains 2 input pin(s) that do not drive logic
Warning (15610): No output dependent on input pin "SPI_SS2"
Warning (15610): No output dependent on input pin "SPI_SS4"
Info (21057): Implemented 3331 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 7 input pins
Info (21059): Implemented 24 output pins
Info (21061): Implemented 3243 logic cells
Info (21064): Implemented 56 RAM segments
Info (21065): Implemented 1 PLLs
Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 105 warnings
Info: Peak virtual memory: 4725 megabytes
Info: Processing ended: Sun Jun 24 13:30:13 2018
Info: Elapsed time: 00:00:18
Info: Total CPU time (on all processors): 00:00:17
+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in D:/Github/Mist_FPGA/Sharp - MZ-80K_MiST/Output/mz80k_mist.map.smsg.
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