mirror of
https://github.com/Gehstock/Mist_FPGA.git
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48 lines
2.1 KiB
Tcl
48 lines
2.1 KiB
Tcl
#************************************************************
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# THIS IS A WIZARD-GENERATED FILE.
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#
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# Version 13.1.4 Build 182 03/12/2014 SJ Full Version
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#
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#************************************************************
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# Copyright (C) 1991-2014 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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# Clock constraints
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create_clock -name "CLOCK_27" -period 37.037 [get_ports {CLOCK_27}]
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create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}]
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# Automatically constrain PLL and other generated clocks
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derive_pll_clocks -create_base_clocks
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# Automatically calculate clock uncertainty to jitter and other effects.
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derive_clock_uncertainty
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# Clock groups
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set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks {pll|altpll_component|auto_generated|pll1|clk[*]}]
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# Some relaxed constrain to the VGA pins. The signals should arrive together, the delay is not really important.
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[1]}] -max 0 [get_ports {VGA_*}]
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set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[1]}] -min -5 [get_ports {VGA_*}]
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set_multicycle_path -to {VGA_*[*]} -setup 4
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set_multicycle_path -to {VGA_*[*]} -hold 3
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set_false_path -to [get_ports {AUDIO_L}]
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set_false_path -to [get_ports {AUDIO_R}]
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set_false_path -to [get_ports {LED}]
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