github.com/Gehstock.Mist_FPGA
1
0
Fork 0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-04-08 13:58:44 +00:00
Code Issues Releases Wiki Activity

Some Changes

Browse Source
This commit is contained in:
Marcel
2019-03-07 20:43:11 +01:00
parent 3645d8e831
commit 1614cfb02f
69 changed files with 2481 additions and 2643 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/Canyon_Bomber.srf Normal file
View File

@@ -0,0 +1 @@
{ "" "" "" "*" { } { } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}

BIN
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/Release/canyon_bomber.rbf
View File

Binary file not shown.

2
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/canyon_bomber.qpf
View File

@@ -27,4 +27,4 @@ DATE = "19:51:47 November 12, 2017"
# Revisions
PROJECT_REVISION = "canyon_bomber"
PROJECT_REVISION = "Canyon_Bomber"

72
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/canyon_bomber.qsf
View File

@@ -18,14 +18,14 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 18:35:49 February 27, 2019
# Date created = 18:24:18 March 06, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# canyon_bomber_assignment_defaults.qdf
# Canyon_Bomber_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
@@ -44,6 +44,28 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:52:16 OCTOBER 10, 20
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/canyon_bomber_mist.sv
set_global_assignment -name VHDL_FILE rtl/canyon_bomber.vhd
set_global_assignment -name VHDL_FILE rtl/whistle.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motor.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/sound.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
# Pin & Location Assignments
# ==========================
@@ -139,6 +161,29 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_27
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_L
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_R
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS
# start DESIGN_PARTITION(Top)
# ---------------------------
@@ -154,27 +199,4 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# end ENTITY(canyon_bomber_mist)
# ------------------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/canyon_bomber_mist.sv
set_global_assignment -name VHDL_FILE rtl/canyon_bomber.vhd
set_global_assignment -name VHDL_FILE rtl/whistle.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motor.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/sound.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

4
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/build_id.sv
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "190304"
`define BUILD_TIME "221722"
`define BUILD_DATE "190307"
`define BUILD_TIME "154546"

5
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/canyon_bomber.vhd
View File

@@ -138,7 +138,6 @@ port map(
vreset => vreset
);
Background: entity work.playfield
port map(
clk6 => clk_6,
@@ -156,7 +155,6 @@ port map(
WhitePF_n => WhitePF_n,
BlackPF_n => BlackPF_n
);
Motion_Objects: entity work.motion
port map(
@@ -174,7 +172,6 @@ port map(
Ship2_n => Ship2_n
);
CPU: entity work.cpu_mem
port map(
Clk12 => clk_12,
@@ -208,7 +205,6 @@ port map(
DBus => DBus,
Display => Display
);
Sound: entity work.audio
port map(
@@ -228,7 +224,6 @@ port map(
P2_audio => Audio2_O
);
-- Video mixing
Video(0) <= ( BlackPF_n and Ship1_n and Shell1_n and CompBlank_n_s);
Video(1) <= not(WhitePF_n and Ship2_n and Shell2_n);

105
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/canyon_bomber_mist.sv
View File

@@ -23,23 +23,13 @@ module canyon_bomber_mist(
localparam CONF_STR = {
"Cany.Bomb.;;",
"O1,Self_Test,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.20.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [11:0] kbjoy;
wire [7:0] joystick_0, joystick_1;
wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [6:0] audio1, audio2;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
assign LED = 1;
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6;
wire locked;
@@ -51,11 +41,20 @@ pll pll(
.locked(locked)
);
assign LED = 1;
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [11:0] kbjoy;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
wire [6:0] audio1, audio2;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
wire m_fire = ~(kbjoy[4] | joystick_0[4] | joystick_1[4]);
wire m_start = ~(kbjoy[5] | kbjoy[6]);
wire m_coin = ~(kbjoy[7]);
canyon_bomber canyon_bomber(
@@ -68,12 +67,12 @@ canyon_bomber canyon_bomber(
.VSync_O(vs),
.Audio1_O(audio1),
.Audio2_O(audio2),
.Coin1_I(m_coin),
.Coin1_I(~btn_coin),
.Coin2_I(1'b1),
.Start1_I(m_start),
.Start2_I(1'b1),
.Fire1_I(m_fire),
.Fire2_I(1'b1),
.Start1_I(~btn_one_player),
.Start2_I(~btn_two_players),
.Fire1_I(~(btn_fire2 | joystick_0[4])),
.Fire2_I(~joystick_1[4]),
.Slam_I(1'b1),
.Test_I(~status[1]),
.Lamp1_O(),
@@ -86,22 +85,17 @@ dac dacl(
.DACin({audio1,audio2,2'b0}),
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({RGB[7:2]}),
.G({RGB[7:2]}),
.B({RGB[7:2]}),
.R(blankn ? {RGB[7:2]} : 0),
.G(blankn ? {RGB[7:2]} : 0),
.B(blankn ? {RGB[7:2]} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
@@ -109,9 +103,8 @@ video_mixer(
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
@@ -130,22 +123,44 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
keyboard keyboard(
.clk(clk_24),
.reset(0),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire1 <= pressed; // ctrl
'h11: btn_fire1 <= pressed; // alt
'h29: btn_fire2 <= pressed; // Space
endcase
end
end
endmodule

84
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/keyboard.sv
View File

@@ -1,84 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[11:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h75: joystick[3] <= ~release_btn; // arrow up
'h72: joystick[2] <= ~release_btn; // arrow down
'h6B: joystick[1] <= ~release_btn; // arrow left
'h74: joystick[0] <= ~release_btn; // arrow right
//player2
'h1D: joystick[11] <= ~release_btn; // W
'h1B: joystick[10] <= ~release_btn; // S
'h1C: joystick[9] <= ~release_btn; // A
'h23: joystick[8] <= ~release_btn; // D
'h29: joystick[4] <= ~release_btn; // Space
'h05: joystick[5] <= ~release_btn; // F1
'h06: joystick[6] <= ~release_btn; // F2
'h76: joystick[7] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

373
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/mist_io.sv
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg [23:0] ioctl_addr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -415,31 +449,28 @@ end
/////////////////////////////// DOWNLOADING ///////////////////////////////
reg [7:0] data_w;
reg [23:0] addr_w;
reg [24:0] addr_w;
reg rclk = 0;
localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
reg [7:0] cmd;
reg [4:0] cnt;
reg [23:0] addr;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

16
Arcade_MiST/Atari BW Raster Hardware/Canyon_Bomber_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -236,7 +236,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

BIN
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/Release/dominos.rbf
View File

Binary file not shown.

26
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/dominos.qsf
View File

@@ -18,7 +18,7 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 19:27:32 February 27, 2019
# Date created = 16:02:31 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -63,7 +63,6 @@ set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VHDL_FILE rtl/oscillator.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
@@ -161,6 +160,29 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_27
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_L
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_R
# start DESIGN_PARTITION(Top)
# ---------------------------

3
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/dominos.srf Normal file
View File

@@ -0,0 +1,3 @@
{ "" "" "" "*" { } { } 0 113007 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 113015 "" 0 0 "Quartus II" 0 -1 0 ""}

4
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/rtl/build_id.sv
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "190304"
`define BUILD_TIME "214137"
`define BUILD_DATE "190307"
`define BUILD_TIME "160242"

129
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/rtl/dominos_mist.sv
View File

@@ -23,22 +23,13 @@ module dominos_mist(
localparam CONF_STR = {
"Dominos;;",
"O1,Self_Test,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.20.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [11:0] kbjoy;
wire [7:0] joy0;
wire [7:0] joy1;
wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [6:0] audio;
wire [7:0] RGB;
assign LED = 1;
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6;
wire locked;
@@ -51,10 +42,18 @@ pll pll
.locked(locked)
);
assign LED = 1;
wire m_start1 = ~(kbjoy[5] | joy0[4]);
wire m_start2 = ~(kbjoy[6] | joy1[4]);
wire m_coin = ~kbjoy[7];
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
wire [6:0] audio;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
dominos dominos (
.clk_12(clk_12),
@@ -65,20 +64,18 @@ dominos dominos (
.Hb(hb),
.RGB(RGB),
.Audio(audio),
.Coin1_I(m_coin),
.Coin2_I(m_coin),
.Start1_I(m_start1),
.Start2_I(m_start2),
.Up1(~(kbjoy[3] | joy0[3])),
.Down1(~(kbjoy[2] | joy0[2])),
.Left1(~(kbjoy[1] | joy0[1])),
.Right1(~(kbjoy[0] | joy0[0])),
.Up2(~(kbjoy[11] | joy1[3])),
.Down2(~(kbjoy[10] | joy1[2])),
.Left2(~(kbjoy[9] | joy1[1])),
.Right2(~(kbjoy[8] | joy1[0])),
.Coin1_I(~btn_coin),
.Coin2_I(1'b1),
.Start1_I(~btn_one_player),
.Start2_I(~btn_two_players),
.Up1(~(btn_up | joystick_0[3])),
.Down1(~(btn_down | joystick_0[2])),
.Left1(~(btn_left | joystick_0[1])),
.Right1(~(btn_right | joystick_0[0])),
.Up2(~(joystick_1[3])),
.Down2(~(joystick_1[2])),
.Left2(~(joystick_1[1])),
.Right2(~(joystick_1[0])),
.Test_I(~status[1]),
.Lamp1_O(),
.Lamp2_O()
@@ -91,24 +88,16 @@ dac dac (
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
wire hb, vb;
wire blankn = ~(hb | vb);
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({RGB[7:2]}),
.G({RGB[7:2]}),
.B({RGB[7:2]}),
.R(blankn ? {RGB[7:2]} : 0),
.G(blankn ? {RGB[7:2]} : 0),
.B(blankn ? {RGB[7:2]} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
@@ -116,14 +105,13 @@ video_mixer(
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
@@ -137,22 +125,43 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joy0 ),
.joystick_1 (joy1 ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
keyboard keyboard(
.clk(clk_24),
.reset(0),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
endmodule
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire1 <= pressed; // ctrl
'h11: btn_fire1 <= pressed; // alt
'h29: btn_fire2 <= pressed; // Space
endcase
end
end
endmodule

84
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/rtl/keyboard.sv
View File

@@ -1,84 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[11:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h75: joystick[3] <= ~release_btn; // arrow up
'h72: joystick[2] <= ~release_btn; // arrow down
'h6B: joystick[1] <= ~release_btn; // arrow left
'h74: joystick[0] <= ~release_btn; // arrow right
//player2
'h1D: joystick[11] <= ~release_btn; // W
'h1B: joystick[10] <= ~release_btn; // S
'h1C: joystick[9] <= ~release_btn; // A
'h23: joystick[8] <= ~release_btn; // D
'h29: joystick[4] <= ~release_btn; // Space
'h05: joystick[5] <= ~release_btn; // F1
'h06: joystick[6] <= ~release_btn; // F2
'h76: joystick[7] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

373
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/rtl/mist_io.sv
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg [23:0] ioctl_addr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -415,31 +449,28 @@ end
/////////////////////////////// DOWNLOADING ///////////////////////////////
reg [7:0] data_w;
reg [23:0] addr_w;
reg [24:0] addr_w;
reg rclk = 0;
localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
reg [7:0] cmd;
reg [4:0] cnt;
reg [23:0] addr;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

16
Arcade_MiST/Atari BW Raster Hardware/Dominos_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -236,7 +236,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

BIN
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/Release/sprint2.rbf
View File

Binary file not shown.

81
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/rtl/keyboard.sv
View File

@@ -1,81 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[9:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h75: joystick[3] <= ~release_btn; // arrow up
'h72: joystick[2] <= ~release_btn; // arrow down
'h6B: joystick[1] <= ~release_btn; // arrow left
'h74: joystick[0] <= ~release_btn; // arrow right
'h29: joystick[4] <= ~release_btn; // Space
'h11: joystick[8] <= ~release_btn; // L. ALT
'h14: joystick[9] <= ~release_btn; // L. Control
'h05: joystick[5] <= ~release_btn; // F1
'h06: joystick[6] <= ~release_btn; // F2
'h76: joystick[7] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

373
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/rtl/mist_io.sv
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg [23:0] ioctl_addr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -415,31 +449,28 @@ end
/////////////////////////////// DOWNLOADING ///////////////////////////////
reg [7:0] data_w;
reg [23:0] addr_w;
reg [24:0] addr_w;
reg rclk = 0;
localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
reg [7:0] cmd;
reg [4:0] cnt;
reg [23:0] addr;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

266
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/rtl/sprint2_mist.sv
View File

@@ -22,25 +22,15 @@ localparam CONF_STR = {
"Sprint2;;",
"O1,Test Mode,Off,On;",
"T2,Next Track;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.10.",`BUILD_DATE
"V,v1.20.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [9:0] kbjoy;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [6:0] audio1, audio2;
wire [7:0] RGB;
assign LED = 1;
wire clk_24, clk_12, clk_6;
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6;
wire locked;
pll pll(
.inclk0(CLOCK_27),
@@ -50,20 +40,148 @@ pll pll(
.locked(locked)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [9:0] kbjoy;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
wire [6:0] audio1, audio2;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
wire m_left1 = (kbjoy[1] | joystick_1[1]);
wire m_right1 = (kbjoy[0] | joystick_1[0]);
sprint2 sprint2(
.clk_12(clk_12),
.Reset_n(~(status[0] | status[6] | buttons[1])),
.Hs(hs),
.Vs(vs),
.Vb(vb),
.Hb(hb),
.RGB(RGB),
.Audio1_O(audio1),
.Audio2_O(audio2),
.Coin1_I(m_coin),
.Coin2_I(1'b1),
.Start1_I(m_start1),
.Start2_I(m_start2),
.Trak_Sel_I(~status[2]),
.Gas1_I(m_fire1),
.Gas2_I(m_fire2),
.Gear1_1_I(~gear11),
.Gear1_2_I(~gear21),
.Gear2_1_I(~gear12),
.Gear2_2_I(~gear22),
.Gear3_1_I(~gear13),
.Gear3_2_I(~gear23),
.Test_I(~status[1]),
.Steer_1A_I(steer1[1]),
.Steer_1B_I(steer1[0]),
.Steer_2A_I(steer2[1]),
.Steer_2B_I(steer2[0]),
.Lamp1_O(),
.Lamp2_O()
);
dac dac(
.CLK(clk_24),
.RESET(0),
.DACin({audio1,audio2,2'b00}),
.DACout(AUDIO_L)
);
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(blankn ? {RGB[7:2]} : 0),
.G(blankn ? {RGB[7:2]} : 0),
.B(blankn ? {RGB[7:2]} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
.SPI_SS2 (SPI_SS2 ),
.SPI_DO (SPI_DO ),
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_fire3 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire3 <= pressed; // ctrl
'h11: btn_fire2 <= pressed; // alt
'h29: btn_fire1 <= pressed; // Space
endcase
end
end
wire m_left1 = (btn_left | joystick_1[1]);
wire m_right1 = (btn_right | joystick_1[0]);
wire m_left2 = (joystick_0[1]);
wire m_right2 = (joystick_0[0]);
wire m_fire1 = ~(kbjoy[4] | joystick_1[4]);
wire m_fire1 = ~(btn_fire1 | joystick_1[4]);
wire m_fire2 = ~(joystick_0[4]);
wire m_start1 = ~(kbjoy[5]);
wire m_start2 = ~(kbjoy[6]);
wire m_coin = ~(kbjoy[7]);
wire m_gearup1 = (kbjoy[8] | joystick_1[5]);
wire m_geardown1 = (kbjoy[9] | joystick_1[6]);
wire m_start1 = ~(btn_one_player);
wire m_start2 = ~(btn_two_players);
wire m_coin = ~(btn_coin);
wire m_gearup1 = (btn_fire2 | joystick_1[5]);
wire m_geardown1 = (btn_fire3 | joystick_1[6]);
wire m_gearup2 = (joystick_0[5]);
wire m_geardown2 = (joystick_0[6]);
@@ -105,104 +223,4 @@ gearshift gearshiftp2(
.gear3(gear23)
);
sprint2 sprint2(
.clk_12(clk_12),
.Reset_n(~(status[0] | status[6] | buttons[1])),
.Hs(hs),
.Vs(vs),
.Vb(vb),
.Hb(hb),
.RGB(RGB),
.Audio1_O(audio1),
.Audio2_O(audio2),
.Coin1_I(m_coin),
.Coin2_I(1'b1),
.Start1_I(m_start1),
.Start2_I(m_start2),
.Trak_Sel_I(~status[2]),
.Gas1_I(m_fire1),
.Gas2_I(m_fire2),
.Gear1_1_I(~gear11),
.Gear1_2_I(~gear21),
.Gear2_1_I(~gear12),
.Gear2_2_I(~gear22),
.Gear3_1_I(~gear13),
.Gear3_2_I(~gear23),
.Test_I(~status[1]),
.Steer_1A_I(steer1[1]),
.Steer_1B_I(steer1[0]),
.Steer_2A_I(steer2[1]),
.Steer_2B_I(steer2[0]),
.Lamp1_O(),
.Lamp2_O()
);
dac dac(
.CLK(clk_24),
.RESET(0),
.DACin({audio1,audio2,2'b00}),
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
wire hb, vb;
//wire blankn = ~(hb | vb);
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({RGB[7:2]}),
.G({RGB[7:2]}),
.B({RGB[7:2]}),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
.SPI_SS2 (SPI_SS2 ),
.SPI_DO (SPI_DO ),
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
keyboard keyboard(
.clk(clk_24),
.reset(0),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
endmodule
endmodule

19
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -60,7 +60,7 @@ module video_mixer
// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
input ypbpr_full,
input [1:0] rotate, //[0] - rotate [1] - left or right
// color
input [DWIDTH:0] R,
input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
.B_in(b_out),
.HSync(hs),
.VSync(vs),
.rotate(rotate),
.R_out(red),
.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

170
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/sprint2.qsf
View File

@@ -18,14 +18,14 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 15:18:38 May 31, 2018
# Date created = 16:19:23 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# sprint1_assignment_defaults.qdf
# sprint2_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
@@ -43,6 +43,70 @@ set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:52:16 OCTOBER 10, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sprint2_mist.sv
set_global_assignment -name VHDL_FILE rtl/sprint2.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/gearshift.sv
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/collision.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/Inputs.vhd
set_global_assignment -name VHDL_FILE rtl/sprint2_sound.vhd
set_global_assignment -name VHDL_FILE rtl/screech.vhd
set_global_assignment -name VHDL_FILE rtl/EngineSound.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
set_location_assignment PIN_143 -to VGA_R[4]
set_location_assignment PIN_142 -to VGA_R[3]
set_location_assignment PIN_141 -to VGA_R[2]
set_location_assignment PIN_137 -to VGA_R[1]
set_location_assignment PIN_135 -to VGA_R[0]
set_location_assignment PIN_133 -to VGA_B[5]
set_location_assignment PIN_132 -to VGA_B[4]
set_location_assignment PIN_125 -to VGA_B[3]
set_location_assignment PIN_121 -to VGA_B[2]
set_location_assignment PIN_120 -to VGA_B[1]
set_location_assignment PIN_115 -to VGA_B[0]
set_location_assignment PIN_114 -to VGA_G[5]
set_location_assignment PIN_113 -to VGA_G[4]
set_location_assignment PIN_112 -to VGA_G[3]
set_location_assignment PIN_111 -to VGA_G[2]
set_location_assignment PIN_110 -to VGA_G[1]
set_location_assignment PIN_106 -to VGA_G[0]
set_location_assignment PIN_136 -to VGA_VS
set_location_assignment PIN_119 -to VGA_HS
set_location_assignment PIN_65 -to AUDIO_L
set_location_assignment PIN_80 -to AUDIO_R
set_location_assignment PIN_105 -to SPI_DO
set_location_assignment PIN_88 -to SPI_DI
set_location_assignment PIN_126 -to SPI_SCK
set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_13 -to CONF_DATA0
# Classic Timing Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
# Analysis & Synthesis Assignments
# ================================
@@ -76,6 +140,11 @@ set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
@@ -83,94 +152,31 @@ set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# ---------------------
# start ENTITY(sprint1)
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
set_location_assignment PIN_143 -to VGA_R[4]
set_location_assignment PIN_142 -to VGA_R[3]
set_location_assignment PIN_141 -to VGA_R[2]
set_location_assignment PIN_137 -to VGA_R[1]
set_location_assignment PIN_135 -to VGA_R[0]
set_location_assignment PIN_133 -to VGA_B[5]
set_location_assignment PIN_132 -to VGA_B[4]
set_location_assignment PIN_125 -to VGA_B[3]
set_location_assignment PIN_121 -to VGA_B[2]
set_location_assignment PIN_120 -to VGA_B[1]
set_location_assignment PIN_115 -to VGA_B[0]
set_location_assignment PIN_114 -to VGA_G[5]
set_location_assignment PIN_113 -to VGA_G[4]
set_location_assignment PIN_112 -to VGA_G[3]
set_location_assignment PIN_111 -to VGA_G[2]
set_location_assignment PIN_110 -to VGA_G[1]
set_location_assignment PIN_106 -to VGA_G[0]
set_location_assignment PIN_136 -to VGA_VS
set_location_assignment PIN_119 -to VGA_HS
set_location_assignment PIN_65 -to AUDIO_L
set_location_assignment PIN_80 -to AUDIO_R
set_location_assignment PIN_105 -to SPI_DO
set_location_assignment PIN_88 -to SPI_DI
set_location_assignment PIN_126 -to SPI_SCK
set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_13 -to CONF_DATA0
# end ENTITY(sprint1)
# -------------------
# --------------------------
# start ENTITY(sprint1_mist)
# start ENTITY(sprint2_mist)
# Fitter Assignments
# ==================
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CONF_DATA0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SCK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_27
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(sprint1_mist)
# ------------------------
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CONF_DATA0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SCK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_SS3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_27
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sprint2_mist.sv
set_global_assignment -name VHDL_FILE rtl/sprint2.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/gearshift.sv
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/collision.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/Inputs.vhd
set_global_assignment -name VHDL_FILE rtl/sprint2_sound.vhd
set_global_assignment -name VHDL_FILE rtl/screech.vhd
set_global_assignment -name VHDL_FILE rtl/EngineSound.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end ENTITY(sprint2_mist)
# ------------------------

4
Arcade_MiST/Atari BW Raster Hardware/Sprint2_MiST/sprint2.srf Normal file
View File

@@ -0,0 +1,4 @@
{ "" "" "" "Byte addressed memory initialization file \"6398-01k6.hex\" was read in the word-addressed format" { } { } 0 113007 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 113015 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 113007 "" 0 0 "Quartus II" 0 -1 0 ""}

BIN
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/Release/sprint1.rbf
View File

Binary file not shown.

84
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/rtl/keyboard.sv
View File

@@ -1,84 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[11:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h75: joystick[3] <= ~release_btn; // arrow up
'h72: joystick[2] <= ~release_btn; // arrow down
'h6B: joystick[1] <= ~release_btn; // arrow left
'h74: joystick[0] <= ~release_btn; // arrow right
'h29: joystick[4] <= ~release_btn; // Space
'h05: joystick[5] <= ~release_btn; // F1
'h06: joystick[6] <= ~release_btn; // F2
'h76: joystick[7] <= ~release_btn; // Escape
'h16: joystick[8] <= ~release_btn; // 1
'h1E: joystick[9] <= ~release_btn; // 2
'h11: joystick[10] <= ~release_btn; // L. Alt
'h14: joystick[11] <= ~release_btn; // L. Control
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

373
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/rtl/mist_io.sv
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg [23:0] ioctl_addr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -415,31 +449,28 @@ end
/////////////////////////////// DOWNLOADING ///////////////////////////////
reg [7:0] data_w;
reg [23:0] addr_w;
reg [24:0] addr_w;
reg rclk = 0;
localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
reg [7:0] cmd;
reg [4:0] cnt;
reg [23:0] addr;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

149
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/rtl/sprint1_mist.sv
View File

@@ -21,26 +21,16 @@ module sprint1_mist(
localparam CONF_STR = {
"Sprint1;;",
"O1,Test Mode,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.10.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [11:0] kbjoy;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [6:0] audio;
wire [7:0] RGB;
assign LED = 1;
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6;
wire locked;
pll pll(
.inclk0(CLOCK_27),
.c0(clk_24),//24.192
@@ -49,24 +39,18 @@ pll pll(
.locked(locked)
);
wire [1:0] steer;
joy2quad steer1(
.CLK(clk_24),
.clkdiv('d22500),
.right(m_right),
.left(m_left),
.steer(steer)
);
wire gear1,gear2,gear3;
gearshift gearshift1(
.CLK(clk_12),
.gearup(m_gearup),
.geardown(m_geardown),
.gear1(gear1),
.gear2(gear2),
.gear3(gear3)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
wire [6:0] audio;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
sprint1 sprint1(
.clk_12(clk_12),
@@ -77,10 +61,10 @@ sprint1 sprint1(
.Vb(vb),
.Hb(hb),
.Audio(audio),
.Coin1_I(m_coin),
.Coin1_I(~btn_coin),
.Coin2_I(1'b1),
.Start_I(m_start1),
.Gas_I(m_fire),
.Start_I(~btn_one_player),
.Gas_I(~(btn_fire1 | joystick_0[4] | joystick_1[4])),
.Gear1_I(gear1),
.Gear2_I(gear2),
.Gear3_I(gear3),
@@ -96,25 +80,17 @@ dac dac (
.DACin(audio),
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
wire hb, vb;
//wire blankn = ~(hb | vb);
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(RGB[7:2]),
.G(RGB[7:2]),
.B(RGB[7:2]),
.R(blankn ? {RGB[7:2]} : 0),
.G(blankn ? {RGB[7:2]} : 0),
.B(blankn ? {RGB[7:2]} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
@@ -122,23 +98,14 @@ video_mixer(
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
wire m_left = (kbjoy[1] | joystick_0[1] | joystick_1[1]);
wire m_right = (kbjoy[0] | joystick_0[0] | joystick_1[0]);
wire m_fire = ~(kbjoy[4] | joystick_0[4] | joystick_1[4]);
wire m_start1 = ~(kbjoy[5]);
wire m_coin = ~(kbjoy[7]);
wire m_gearup = (kbjoy[10] | joystick_0[5] | joystick_1[5]);
wire m_geardown = (kbjoy[11] | joystick_0[6] | joystick_1[6]);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
@@ -151,21 +118,63 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_fire3 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
keyboard keyboard(
.clk(clk_24),
.reset(0),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire3 <= pressed; // ctrl
'h11: btn_fire2 <= pressed; // alt
'h29: btn_fire1 <= pressed; // Space
endcase
end
end
wire [1:0] steer;
joy2quad steer1(
.CLK(clk_24),
.clkdiv('d22500),
.right(btn_right | joystick_0[0] | joystick_1[0]),
.left(btn_left | joystick_0[1] | joystick_1[1]),
.steer(steer)
);
wire gear1,gear2,gear3;
gearshift gearshift1(
.CLK(clk_12),
.gearup(btn_fire3 | joystick_0[5] | joystick_1[5]),
.geardown(btn_fire2 | joystick_0[6] | joystick_1[6]),
.gear1(gear1),
.gear2(gear2),
.gear3(gear3)
);

21
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -97,11 +97,6 @@ wire [DWIDTH:0] G_sd;
wire [DWIDTH:0] B_sd;
wire hs_sd, vs_sd;
//reg Rd,Gd,Bd;
//always @(posedge ce_pix) begin
// {Rd,Gd,Bd} <= {R,G,B};
//end
scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
(
.*,
@@ -118,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -134,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -241,7 +236,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

165
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/sprint1.qsf
View File

@@ -18,7 +18,7 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 15:18:38 May 31, 2018
# Date created = 16:39:28 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -43,48 +43,36 @@ set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:52:16 OCTOBER 10, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sprint1_mist.sv
set_global_assignment -name VHDL_FILE rtl/sprint1.vhd
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/sprint1_sound.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/collision.vhd
set_global_assignment -name VHDL_FILE rtl/screech.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/EngineSound.vhd
set_global_assignment -name VHDL_FILE rtl/Inputs.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/gearshift.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/build_id.sv
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name TOP_LEVEL_ENTITY sprint1_mist
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# ---------------------
# start ENTITY(sprint1)
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
@@ -118,8 +106,55 @@ set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_90 -to SPI_SS4
set_location_assignment PIN_13 -to CONF_DATA0
# end ENTITY(sprint1)
# -------------------
# Classic Timing Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name TOP_LEVEL_ENTITY sprint1_mist
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# --------------------------
# start ENTITY(sprint1_mist)
@@ -129,45 +164,13 @@ set_location_assignment PIN_13 -to CONF_DATA0
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(sprint1_mist)
# ------------------------
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/sprint1_mist.sv
set_global_assignment -name VHDL_FILE rtl/sprint1.vhd
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/sprint1_sound.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/collision.vhd
set_global_assignment -name VHDL_FILE rtl/screech.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/EngineSound.vhd
set_global_assignment -name VHDL_FILE rtl/Inputs.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/gearshift.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/build_id.sv
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# ------------------------

4
Arcade_MiST/Atari BW Raster Hardware/SprintOne_MiST/sprint1.srf Normal file
View File

@@ -0,0 +1,4 @@
{ "" "" "" "*" { } { } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 113007 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 113015 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10541 "" 0 0 "Quartus II" 0 -1 0 ""}

BIN
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/Release/SuperBreakout.rbf
View File

Binary file not shown.

7
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/SuperBreakout.qsf
View File

@@ -18,7 +18,7 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 14:46:37 March 03, 2019
# Date created = 17:20:52 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -58,7 +58,6 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
@@ -166,10 +165,10 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(super_breakout_mist)
# -------------------------------
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# -------------------------------

4
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/build_id.sv
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "190303"
`define BUILD_TIME "164042"
`define BUILD_DATE "190307"
`define BUILD_TIME "171907"

2
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/dac.sv
View File

@@ -3,7 +3,7 @@
//
// MSBI is the highest bit number. NOT amount of bits!
//
module dac #(parameter MSBI=8, parameter INV=1'b1)
module dac #(parameter MSBI=7, parameter INV=1'b1)
(
output reg DACout, //Average Output feeding analog lowpass
input [MSBI:0] DACin, //DAC input (excess 2**MSBI)

79
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/keyboard.sv
View File

@@ -1,79 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[7:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h75: joystick[3] <= ~release_btn; // arrow up
'h72: joystick[2] <= ~release_btn; // arrow down
'h6B: joystick[1] <= ~release_btn; // arrow left
'h74: joystick[0] <= ~release_btn; // arrow right
'h29: joystick[4] <= ~release_btn; // Space
'h05: joystick[5] <= ~release_btn; // F1
'h06: joystick[6] <= ~release_btn; // F2
'h76: joystick[7] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

373
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/mist_io.sv
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg [23:0] ioctl_addr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -415,31 +449,28 @@ end
/////////////////////////////// DOWNLOADING ///////////////////////////////
reg [7:0] data_w;
reg [23:0] addr_w;
reg [24:0] addr_w;
reg rclk = 0;
localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
reg [7:0] cmd;
reg [4:0] cnt;
reg [23:0] addr;
reg [24:0] addr;
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

20
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/super_breakout.vhd
View File

@@ -41,7 +41,7 @@ port(
Serve_LED_O : out std_logic; -- Serve button LED (Active low)
Counter_O : out std_logic; -- Coin counter output (Active high)
Audio_O : out std_logic_vector(7 downto 0); -- PWM audio, low pass filter is desirable but not really necessary for the simple SFX in this game
Video_O : out std_logic; -- Video output, sum this through a 470R resistor to composite video
Video_O : out std_logic;
HS : out std_logic;
VS : out std_logic;
HB : out std_logic;
@@ -125,14 +125,6 @@ begin
SW2 <= "00101011";
-- Video mixer
Video_O <= not(Playfield_n and Ball1_n and Ball2_n and Ball3_n);
CompSync_O <= CompSync_n_s;
HS <= Hsync;
VS <= Vsync;
HB <= Hblank;
VB <= Vblank;
Reset_h <= (not Reset_n); -- Some components need an active-high reset
Vblank_O <= Vblank; -- Resets ramp in analog paddle circuit (if used)
@@ -249,6 +241,14 @@ port map(
Counter => Counter_O,
Adr => Adr,
Inputs => Inputs
);
);
-- Video mixer
Video_O <= not(Playfield_n and Ball1_n and Ball2_n and Ball3_n);
CompSync_O <= CompSync_n_s;
HS <= Hsync;
VS <= Vsync;
HB <= Hblank;
VB <= Vblank;
end rtl;

209
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/super_breakout_mist.sv
View File

@@ -22,10 +22,12 @@ localparam CONF_STR = {
"S. Breakout;;",
"O1,Test Mode,Off,On;",
"O2,Rotate Controls,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.20.",`BUILD_DATE
};
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6;
wire locked;
@@ -36,23 +38,85 @@ pll pll(
.c2(clk_6),//6.048
.locked(locked)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [9:0] kbjoy;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoubler_disable;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [10:0] ps2_key;
wire [7:0] audio;
wire Video_O;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
wire hb, vb;
wire blankn = ~(hb | vb);
wire video;
super_breakout super_breakout(
.clk_12(clk_12),
.Reset_n(~(status[0] | status[6] | buttons[1])),
.HS(hs),
.VS(vs),
.VB(vb),
.HB(hb),
.Video_O(Video_O),
.Audio_O(audio),
.Coin1_I(~btn_coin),
.Coin2_I(1'b1),
.Start1_I(~btn_one_player),
.Start2_I(1'b1),
.Select1_I(),
.Select2_I(),
.Enc_A(steer[1]),
.Enc_B(steer[0]),
.Pot_Comp1_I(),
.Slam_I(1'b1),
.Serve_I(~(btn_fire2 | joystick_0[4] | joystick_1[4])),
.Test_I(~status[1]),
.Lamp1_O(),
.Lamp2_O(),
.Serve_LED_O(LED),
.Counter_O()
);
dac #(
.MSBI(7))
dac(
.CLK(clk_24),
.RESET(1'b0),
.DACin(audio),
.DACout(AUDIO_L)
);
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(blankn ? {6{Video_O}} : 0),
.G(blankn ? {6{Video_O}} : 0),
.B(blankn ? {6{Video_O}} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.rotate({1'b0,status[2]}),//(left/right,on/off)
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(0)
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
@@ -63,72 +127,47 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({6{video}}),
.G({6{video}}),
.B({6{video}}),
// .R(blankn ? {video,video,video,video,video,video} : "000000"),
// .G(blankn ? {video,video,video,video,video,video} : "000000"),
// .B(blankn ? {video,video,video,video,video,video} : "000000"),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.rotate({1'b0,status[2]}),//(left/right,on/off)
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
.mono(1)
);
keyboard keyboard(
.clk(clk_24),
.reset(),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
dac dac(
.CLK(clk_24),
.RESET(1'b0),
.DACin(audio),
.DACout(AUDIO_L)
);
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
assign AUDIO_R = AUDIO_L;
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire1 <= pressed; // ctrl
'h11: btn_fire1 <= pressed; // alt
'h29: btn_fire2 <= pressed; // Space
endcase
end
end
//wire m_up = (kbjoy[3] | joystick_0[3] | joystick_1[3]);
//wire m_down = (kbjoy[2] | joystick_0[2] | joystick_1[2]);
wire m_left = status[2] ? (kbjoy[1] | joystick_0[1] | joystick_1[1]) : (kbjoy[3] | joystick_0[3] | joystick_1[3]);
wire m_right = status[2] ? (kbjoy[0] | joystick_0[0] | joystick_1[0]) : (kbjoy[2] | joystick_0[2] | joystick_1[2]);
wire m_fire = ~(kbjoy[4] | joystick_0[4] | joystick_1[4]);
wire m_start = ~(kbjoy[5] | kbjoy[6]);
wire m_coin = ~(kbjoy[7]);
wire m_left = ~status[2] ? (btn_up | joystick_0[3] | joystick_1[3]) : (btn_left | joystick_0[1] | joystick_1[1]);
wire m_right = ~status[2] ? (btn_down | joystick_0[2] | joystick_1[2]) : (btn_right | joystick_0[0] | joystick_1[0]);
wire [1:0] steer;
joy2quad steer1(
@@ -139,32 +178,4 @@ joy2quad steer1(
.steer(steer)
);
super_breakout super_breakout(
.clk_12(clk_12),
.Reset_n(~(status[0] | status[6] | buttons[1])),
.CompSync_O(),
.HS(hs),
.VS(vs),
.VB(vb),
.HB(hb),
.Video_O(video),
.Audio_O(audio),
.Coin1_I(m_coin),
.Coin2_I(1'b1),
.Start1_I(m_start),
.Start2_I(1'b1),
.Select1_I(),
.Select2_I(),
.Enc_A(steer[1]),
.Enc_B(steer[0]),
.Pot_Comp1_I(),
.Slam_I(1'b1),
.Serve_I(m_fire),
.Test_I(~status[1]),
.Lamp1_O(),
.Lamp2_O(),
.Serve_LED_O(LED),
.Counter_O()
);
endmodule
endmodule

17
Arcade_MiST/Atari BW Raster Hardware/SuperBreakout_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -61,6 +61,7 @@ module video_mixer
// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
input ypbpr_full,
input [1:0] rotate, //[0] - rotate [1] - left or right
// color
input [DWIDTH:0] R,
input [DWIDTH:0] G,
@@ -113,9 +114,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +130,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -237,7 +238,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

51
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/Centipede.qsf
View File

@@ -1,6 +1,6 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Copyright (C) 1991-2014 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
@@ -17,8 +17,8 @@
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
# Date created = 14:04:08 November 24, 2018
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 19:28:53 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -46,6 +46,28 @@ set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Centipede.sv
set_global_assignment -name VERILOG_FILE rtl/centipede.v
set_global_assignment -name VERILOG_FILE rtl/pf_ram.v
set_global_assignment -name VERILOG_FILE rtl/p6502.v
set_global_assignment -name VERILOG_FILE rtl/bc6502.v
set_global_assignment -name VHDL_FILE rtl/t65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65.vhd
set_global_assignment -name VERILOG_FILE rtl/addsub.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
set_global_assignment -name VHDL_FILE rtl/pll.vhd
set_global_assignment -name VERILOG_FILE rtl/osd.v
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/dac.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Pokey/POKEY.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Pokey/matoro.sv
# Pin & Location Assignments
# ==========================
@@ -145,27 +167,4 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# end ENTITY(Centipede)
# ---------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Centipede.sv
set_global_assignment -name VERILOG_FILE rtl/centipede.v
set_global_assignment -name VERILOG_FILE rtl/pf_ram.v
set_global_assignment -name VERILOG_FILE rtl/p6502.v
set_global_assignment -name VERILOG_FILE rtl/bc6502.v
set_global_assignment -name VHDL_FILE rtl/t65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/t65/T65.vhd
set_global_assignment -name VERILOG_FILE rtl/addsub.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
set_global_assignment -name VHDL_FILE rtl/pll.vhd
set_global_assignment -name VERILOG_FILE rtl/osd.v
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/dac.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Pokey/POKEY.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/Pokey/matoro.sv
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

2
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/Centipede.srf Normal file
View File

@@ -0,0 +1,2 @@
{ "" "" "" "*" { } { } 0 10230 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 10036 "" 0 0 "Quartus II" 0 -1 0 ""}

4
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/README.txt
View File

@@ -4,7 +4,7 @@
-- 24 November 2018
--
--
-- Only controls adn OSD are rotated on VGA output.
-- Only controls and OSD are rotated on Video output.
--
--
-- Keyboard inputs :
@@ -14,5 +14,3 @@
-- ARROW KEYS : Movements
---------------------------------------------------------------------------------
WIP

BIN
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/Release/Centipede.rbf
View File

Binary file not shown.

132
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/Centipede.sv
View File

@@ -44,26 +44,16 @@ localparam CONF_STR = {
"Centipede;;",
"O1,Test,off,on;",
"O2,Rotate Controls,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T7,Reset;",
"V,v1.40.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [9:0] kbjoy;
wire [7:0] joystick_0;
wire [7:0] joystick_1;
wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
assign LED = 1;
assign AUDIO_R = AUDIO_L;
wire clk_24, clk_12, clk_6, clk_100mhz;
wire pll_locked;
pll pll(
.inclk0(CLOCK_27),
.areset(0),
@@ -72,21 +62,20 @@ pll pll(
.c3(clk_6),
.c4(clk_100mhz)
);
wire m_up = ~status[2] ? ~kbjoy[7] & ~joystick_0[0] & ~joystick_1[0] : ~kbjoy[4] & ~joystick_0[3] & ~joystick_1[3];
wire m_down = ~status[2] ? ~kbjoy[6] & ~joystick_0[1] & ~joystick_1[1] : ~kbjoy[5] & ~joystick_0[2] & ~joystick_1[2];
wire m_left = ~status[2] ? ~kbjoy[4] & ~joystick_0[3] & ~joystick_1[3] : ~kbjoy[6] & ~joystick_0[1] & ~joystick_1[1];
wire m_right = ~status[2] ? ~kbjoy[5] & ~joystick_0[2] & ~joystick_1[2] : ~kbjoy[7] & ~joystick_0[0] & ~joystick_1[0];
wire m_start1 = ~kbjoy[1];
wire m_start2 = 1'b1;
wire m_fire1 = ~kbjoy[0] & ~joystick_0[4] & ~joystick_1[4];// & ~joystick_0[4] & ~joystick_1[4];
wire m_fire2 = 1'b1;
wire c_coin = ~kbjoy[3];
wire l_coin, r_coin = 1'b1;
wire m_test = ~status[1];
wire m_slam = 1'b1;//generate Noise
wire m_cocktail = 1'b1;
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire [7:0] joystick_0, joystick_1;
wire scandoublerD;
wire ypbpr;
wire [10:0] ps2_key;
wire [6:0] audio1, audio2;
wire [7:0] RGB;
wire vb, hb;
wire blankn = ~(hb | vb);
wire hs, vs;
wire [3:0] audio;
centipede centipede(
.clk_100mhz(clk_100mhz),
@@ -97,16 +86,14 @@ centipede centipede(
.joystick_i({m_right , m_left, m_down, m_up, m_right , m_left, m_down, m_up}),
.sw1_i(8'h54),
.sw2_i(8'b0),
.rgb_o({ b,g,r}),
.rgb_o(RGB),
.hsync_o(hs),
.vsync_o(vs),
.hblank_o(hblank),
.vblank_o(vblank),
.hblank_o(hb),
.vblank_o(vb),
.audio_o(audio)
);
wire [3:0] audio;
dac #(
.msbi_g(15))
dac (
@@ -116,12 +103,7 @@ dac (
.dac_o(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
wire [2:0] r, g, b;
wire hblank, vblank;
wire blankn = ~(hblank | vblank);
video_mixer video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
@@ -129,9 +111,9 @@ video_mixer video_mixer(
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R(blankn?{r,r}:0),
.G(blankn?{g,g}:0),
.B(blankn?{b,b}:0),
.R(blankn ? {RGB[2:0],RGB[2:0]} : 0),
.G(blankn ? {RGB[5:3],RGB[2:0]} : 0),
.B(blankn ? {RGB[7:6],RGB[7:6],RGB[7:6]} : 0),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
@@ -140,9 +122,8 @@ video_mixer video_mixer(
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.rotate({1'b0,status[2]}),//(left/right,on/off)
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 2'b11, status[4:3] == 2'b10, status[4:3] == 2'b01}),
// .hq2x(status[4:3]==1),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
@@ -150,7 +131,7 @@ video_mixer video_mixer(
);
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
@@ -161,21 +142,60 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
keyboard keyboard(
.clk(clk_24),
.reset(),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
wire m_up = status[2] ? ~btn_up & ~joystick_0[3] & ~joystick_1[3] : ~btn_right & ~joystick_0[0] & ~joystick_1[0];
wire m_down = status[2] ? ~btn_down & ~joystick_0[2] & ~joystick_1[2] : ~btn_left & ~joystick_0[1] & ~joystick_1[1];
wire m_left = status[2] ? ~btn_left & ~joystick_0[1] & ~joystick_1[1] : ~btn_up & ~joystick_0[3] & ~joystick_1[3];
wire m_right = status[2] ? ~btn_right & ~joystick_0[0] & ~joystick_1[0] : ~btn_down & ~joystick_0[2] & ~joystick_1[2];
wire m_start1 = ~btn_one_player;
wire m_start2 = 1'b1;
wire m_fire1 = ~btn_fire1 & ~joystick_0[4] & ~joystick_1[4];
wire m_fire2 = 1'b1;
wire c_coin = ~btn_coin;
wire l_coin, r_coin = 1'b1;
wire m_test = ~status[1];
wire m_slam = 1'b1;//generate Noise
wire m_cocktail = 1'b1;
reg btn_one_player = 0;
reg btn_two_players = 0;
reg btn_left = 0;
reg btn_right = 0;
reg btn_down = 0;
reg btn_up = 0;
reg btn_fire1 = 0;
reg btn_fire2 = 0;
reg btn_fire3 = 0;
reg btn_coin = 0;
wire pressed = ps2_key[9];
wire [7:0] code = ps2_key[7:0];
always @(posedge clk_24) begin
reg old_state;
old_state <= ps2_key[10];
if(old_state != ps2_key[10]) begin
case(code)
'h75: btn_up <= pressed; // up
'h72: btn_down <= pressed; // down
'h6B: btn_left <= pressed; // left
'h74: btn_right <= pressed; // right
'h76: btn_coin <= pressed; // ESC
'h05: btn_one_player <= pressed; // F1
'h06: btn_two_players <= pressed; // F2
'h14: btn_fire3 <= pressed; // ctrl
'h11: btn_fire2 <= pressed; // alt
'h29: btn_fire1 <= pressed; // Space
endcase
end
end
endmodule

4
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/build_id.v
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "190305"
`define BUILD_TIME "183037"
`define BUILD_DATE "190307"
`define BUILD_TIME "194017"

6
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/centipede.v
View File

@@ -807,7 +807,7 @@ sprom #(
always @(posedge ea_ctrl_clk)
hs_ctrl <= db_out[3:0];
/*
spram #(
.addr_width_g(6),
.data_width_g(8))
@@ -817,8 +817,8 @@ hs_ram(
.wren(~hs_ctrl[1] & hs_ctrl[2]),
.data(hs_data),
.q(hs_out)
);
); */
assign hs_out = 8'b0;
always @(posedge hs_addr_clk)
hs_data <= db_out[7:0];

78
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/keyboard.v
View File

@@ -1,78 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[7:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h16: joystick[1] <= ~release_btn; // 1
'h1E: joystick[2] <= ~release_btn; // 2
'h75: joystick[4] <= ~release_btn; // arrow up
'h72: joystick[5] <= ~release_btn; // arrow down
'h6B: joystick[6] <= ~release_btn; // arrow left
'h74: joystick[7] <= ~release_btn; // arrow right
'h29: joystick[0] <= ~release_btn; // Space
'h76: joystick[3] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

367
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/mist_io.v
View File

@@ -5,6 +5,7 @@
// http://code.google.com/p/mist-board/
//
// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
// Copyright (c) 2015-2017 Sorgelig
//
// This source file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output SPI_DO,
input SPI_DI,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
output reg [7:0] joystick_0,
output reg [7:0] joystick_1,
// output reg [31:0] joystick_2,
// output reg [31:0] joystick_3,
// output reg [31:0] joystick_4,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
// SD config
input sd_conf,
input sd_sdhc,
output img_mounted, // signaling that new image has been mounted
output [1:0] img_mounted, // signaling that new image has been mounted
output reg [31:0] img_size, // size of image in bytes
// SD block level access
input [31:0] sd_lba,
input sd_rd,
input sd_wr,
input [1:0] sd_rd,
input [1:0] sd_wr,
output reg sd_ack,
output reg sd_ack_conf,
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg ps2_kbd_data,
output ps2_mouse_clk,
output reg ps2_mouse_data,
input ps2_caps_led,
// ps2 alternative interface.
// [8] - extended, [9] - pressed, [10] - toggles with every press/release
output reg [10:0] ps2_key = 0,
// [24] - toggles with every event
output reg [24:0] ps2_mouse = 0,
// ARM -> FPGA download
input ioctl_ce,
output reg ioctl_download = 0, // signal indicating an active download
output reg [7:0] ioctl_index, // menu index used to upload the file
output ioctl_wr,
output reg ioctl_wr = 0,
output reg [24:0] ioctl_addr,
output reg [7:0] ioctl_dout
);
reg [7:0] b_data;
reg [6:0] sbuf;
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg [7:0] but_sw;
reg [2:0] stick_idx;
reg mount_strobe = 0;
reg [1:0] mount_strobe = 0;
assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
wire [7:0] spi_dout = { sbuf, SPI_DI};
// this variant of user_io is for 8 bit cores (type == a4) only
wire [7:0] core_type = 8'ha4;
// command byte read by the io controller
wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
wire drive_sel = sd_rd[1] | sd_wr[1];
wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
reg [7:0] cmd;
reg [2:0] bit_cnt; // counts bits 0-7 0-7 ...
reg [9:0] byte_cnt; // counts bytes
reg spi_do;
assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
reg [7:0] spi_data_out;
// drive MISO only when transmitting core id
always@(negedge SPI_SCK) begin
if(!CONF_DATA0) begin
// first byte returned is always core type, further bytes are
// command dependent
if(byte_cnt == 0) begin
spi_do <= core_type[~bit_cnt];
// SPI transmitter
always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
end else begin
case(cmd)
// reading config string
8'h14: begin
// returning a byte from string
if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
else spi_do <= 0;
end
// reading sd card status
8'h16: begin
if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
else spi_do <= 0;
end
// reading sd card write data
8'h18:
spi_do <= b_data[~bit_cnt];
// reading keyboard LED status
8'h1f:
spi_do <= kbd_led[~bit_cnt];
default:
spi_do <= 0;
endcase
end
end
end
reg b_wr2,b_wr3;
always @(negedge clk_sys) begin
b_wr3 <= b_wr2;
sd_buff_wr <= b_wr3;
end
reg [7:0] spi_data_in;
reg spi_data_ready = 0;
// SPI receiver
always@(posedge SPI_SCK or posedge CONF_DATA0) begin
reg [6:0] sbuf;
reg [31:0] sd_lba_r;
reg drive_sel_r;
if(CONF_DATA0) begin
b_wr2 <= 0;
bit_cnt <= 0;
byte_cnt <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
end else begin
b_wr2 <= 0;
sbuf <= spi_dout[6:0];
spi_data_out <= core_type;
end
else
begin
bit_cnt <= bit_cnt + 1'd1;
if(bit_cnt == 5) begin
if (byte_cnt == 0) sd_buff_addr <= 0;
if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
end
sbuf <= {sbuf[5:0], SPI_DI};
// finished reading command byte
if(bit_cnt == 7) begin
if(!byte_cnt) cmd <= {sbuf, SPI_DI};
spi_data_in <= {sbuf, SPI_DI};
spi_data_ready <= ~spi_data_ready;
if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
if(byte_cnt == 0) begin
cmd <= spi_dout;
if(spi_dout == 8'h19) begin
sd_ack_conf <= 1;
sd_buff_addr <= 0;
end
if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
sd_ack <= 1;
sd_buff_addr <= 0;
end
if(spi_dout == 8'h18) b_data <= sd_buff_din;
mount_strobe <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_dout;
8'h02: joystick_0 <= spi_dout;
8'h03: joystick_1 <= spi_dout;
spi_data_out <= 0;
case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
// reading config string
8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
// store incoming ps2 mouse bytes
8'h04: begin
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// reading sd card status
8'h16: if(byte_cnt == 0) begin
spi_data_out <= sd_cmd;
sd_lba_r <= sd_lba;
drive_sel_r <= drive_sel;
end else if (byte_cnt == 1) begin
spi_data_out <= drive_sel_r;
end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
// store incoming ps2 keyboard bytes
8'h05: begin
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_dout;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_dout;
b_wr2 <= 1;
end
// reading sd card write data
8'h18: spi_data_out <= sd_buff_din;
endcase
end
end
end
8'h18: b_data <= sd_buff_din;
reg [31:0] ps2_key_raw = 0;
wire pressed = (ps2_key_raw[15:8] != 8'hf0);
wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
else if(byte_cnt == 2) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
end else if(byte_cnt == 3) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
end
end
// transfer to clk_sys domain
always@(posedge clk_sys) begin
reg old_ss1, old_ss2;
reg old_ready1, old_ready2;
reg [2:0] b_wr;
reg got_ps2 = 0;
// notify image selection
8'h1c: mount_strobe <= 1;
old_ss1 <= CONF_DATA0;
old_ss2 <= old_ss1;
old_ready1 <= spi_data_ready;
old_ready2 <= old_ready1;
sd_buff_wr <= b_wr[0];
if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
b_wr <= (b_wr<<1);
// send image info
8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
// status, 32bit version
8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
default: ;
endcase
if(old_ss2) begin
got_ps2 <= 0;
sd_ack <= 0;
sd_ack_conf <= 0;
sd_buff_addr <= 0;
if(got_ps2) begin
if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24];
if(cmd == 5) begin
ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause pressed
end
end
end
else
if(old_ready2 ^ old_ready1) begin
if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
if(byte_cnt < 2) begin
if (cmd == 8'h19) sd_ack_conf <= 1;
if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
mount_strobe <= 0;
if(cmd == 5) ps2_key_raw <= 0;
end else begin
case(cmd)
// buttons and switches
8'h01: but_sw <= spi_data_in;
8'h02: joystick_0 <= spi_data_in;
8'h03: joystick_1 <= spi_data_in;
// 8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// 8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
// store incoming ps2 mouse bytes
8'h04: begin
got_ps2 <= 1;
case(byte_cnt)
2: ps2_mouse[7:0] <= spi_data_in;
3: ps2_mouse[15:8] <= spi_data_in;
4: ps2_mouse[23:16] <= spi_data_in;
endcase
ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in;
ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
end
// store incoming ps2 keyboard bytes
8'h05: begin
got_ps2 <= 1;
ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in};
ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in;
ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
end
8'h15: status[7:0] <= spi_data_in;
// send SD config IO -> FPGA
// flag that download begins
// sd card knows data is config if sd_dout_strobe is asserted
// with sd_ack still being inactive (low)
8'h19,
// send sector IO -> FPGA
// flag that download begins
8'h17: begin
sd_buff_dout <= spi_data_in;
b_wr <= 1;
end
// joystick analog
8'h1a: begin
// first byte is joystick index
if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
else if(byte_cnt == 3) begin
// second byte is x axis
if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
end else if(byte_cnt == 4) begin
// third byte is y axis
if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
end
end
// notify image selection
8'h1c: mount_strobe[spi_data_in[0]] <= 1;
// send image info
8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
// status, 32bit version
8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
default: ;
endcase
end
end
end
@@ -422,6 +456,8 @@ localparam UIO_FILE_TX = 8'h53;
localparam UIO_FILE_TX_DAT = 8'h54;
localparam UIO_FILE_INDEX = 8'h55;
reg rdownload = 0;
// data_io has its own SPI interface to the io controller
always@(posedge SPI_SCK, posedge SPI_SS2) begin
reg [6:0] sbuf;
@@ -431,15 +467,10 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if(SPI_SS2) cnt <= 0;
else begin
rclk <= 0;
// don't shift in last bit. It is evaluated directly
// when writing to ram
if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
// increase target address after write
if(rclk) addr <= addr + 1'd1;
// count 0-7 8-15 8-15 ...
if(cnt < 15) cnt <= cnt + 1'd1;
else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
// prepare
if(SPI_DI) begin
addr <= 0;
ioctl_download <= 1;
case(ioctl_index[4:0])
1: addr <= 25'h200000; // TRD buffer at 2MB
2: addr <= 25'h400000; // tape buffer at 4MB
default: addr <= 25'h150000; // boot rom
endcase
rdownload <= 1;
end else begin
addr_w <= addr;
ioctl_download <= 0;
rdownload <= 0;
end
end
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
addr_w <= addr;
data_w <= {sbuf, SPI_DI};
rclk <= 1;
addr <= addr + 1'd1;
rclk <= ~rclk;
end
// expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
end
end
assign ioctl_wr = |ioctl_wrd;
reg [1:0] ioctl_wrd;
always@(negedge clk_sys) begin
// transfer to ioctl_clk domain.
// ioctl_index is set before ioctl_download, so it's stable already
always@(posedge clk_sys) begin
reg rclkD, rclkD2;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wrd<= {ioctl_wrd[0],1'b0};
if(ioctl_ce) begin
ioctl_download <= rdownload;
if(rclkD & ~rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wrd <= 2'b11;
rclkD <= rclk;
rclkD2 <= rclkD;
ioctl_wr <= 0;
if(rclkD != rclkD2) begin
ioctl_dout <= data_w;
ioctl_addr <= addr_w;
ioctl_wr <= 1;
end
end
end
endmodule
endmodule

16
Arcade_MiST/Atari Centipede Hardware/Centipede_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -237,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

3
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/ComputerSpace_MiST.qpf
View File

@@ -28,5 +28,4 @@ DATE = "14:24:18 February 27, 2019"
# Revisions
PROJECT_REVISION = "ComputerSpace_MiST"
PROJECT_REVISION = "Pacman"
PROJECT_REVISION = "ComputerSpace_MiST"

195
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/ComputerSpace_MiST.qsf
View File

@@ -18,7 +18,7 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 16:11:14 February 27, 2019
# Date created = 20:22:01 March 07, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -46,79 +46,29 @@ set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SDC_FILE ComputerSpace_MiST.sdc
set_global_assignment -name SYSTEMVERILOG_FILE rtl/ComputerSpace_MiST.sv
set_global_assignment -name VHDL_FILE rtl/computer_space_top.vhd
set_global_assignment -name VHDL_FILE rtl/computer_space_logic.vhd
set_global_assignment -name VHDL_FILE rtl/sync_star_board.vhd
set_global_assignment -name VHDL_FILE rtl/motion_board.vhd
set_global_assignment -name VHDL_FILE rtl/scan_counter.vhd
set_global_assignment -name VHDL_FILE rtl/v74161.vhd
set_global_assignment -name VHDL_FILE rtl/v74161_16bit.vhd
set_global_assignment -name VHDL_FILE rtl/memory_board.vhd
set_global_assignment -name VHDL_FILE rtl/saucer_diode_image.vhd
set_global_assignment -name VHDL_FILE rtl/rocket_diode_images.vhd
set_global_assignment -name VHDL_FILE rtl/clocks.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name VHDL_FILE rtl/computer_space_sound.vhd
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VERILOG_FILE rtl/osd.v
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
# Classic Timing Assignments
# Pin & Location Assignments
# ==========================
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name TOP_LEVEL_ENTITY ComputerSpace_MiST
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
# Fitter Assignments
# ==================
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_NCE_PIN OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# --------------------------------
# start ENTITY(ComputerSpace_MiST)
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(ComputerSpace_MiST)
# ------------------------------
# ----------------------------------
# start ENTITY(computer_space_logic)
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
@@ -150,32 +100,85 @@ set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_13 -to CONF_DATA0
# end ENTITY(computer_space_logic)
# --------------------------------
# Classic Timing Assignments
# ==========================
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name TOP_LEVEL_ENTITY ComputerSpace_MiST
# Fitter Assignments
# ==================
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_NCE_PIN OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
# Assembler Assignments
# =====================
set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# --------------------------------
# start ENTITY(computer_space_top)
# start ENTITY(ComputerSpace_MiST)
# end ENTITY(computer_space_top)
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(ComputerSpace_MiST)
# ------------------------------
set_global_assignment -name SYSTEMVERILOG_FILE rtl/ComputerSpace_MiST.sv
set_global_assignment -name VHDL_FILE rtl/computer_space_top.vhd
set_global_assignment -name VHDL_FILE rtl/computer_space_logic.vhd
set_global_assignment -name VHDL_FILE rtl/sync_star_board.vhd
set_global_assignment -name VHDL_FILE rtl/motion_board.vhd
set_global_assignment -name VHDL_FILE rtl/scan_counter.vhd
set_global_assignment -name VHDL_FILE rtl/v74161.vhd
set_global_assignment -name VHDL_FILE rtl/v74161_16bit.vhd
set_global_assignment -name VHDL_FILE rtl/memory_board.vhd
set_global_assignment -name VHDL_FILE rtl/saucer_diode_image.vhd
set_global_assignment -name VHDL_FILE rtl/rocket_diode_images.vhd
set_global_assignment -name VHDL_FILE rtl/clocks.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name VHDL_FILE rtl/computer_space_sound.vhd
set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name VERILOG_FILE rtl/osd.v
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VERILOG_FILE rtl/mist_io.v
set_global_assignment -name VERILOG_FILE rtl/keyboard.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

47
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/ComputerSpace_MiST.sdc Normal file
View File

@@ -0,0 +1,47 @@
#************************************************************
# THIS IS A WIZARD-GENERATED FILE.
#
# Version 13.1.4 Build 182 03/12/2014 SJ Full Version
#
#************************************************************
# Copyright (C) 1991-2014 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# Clock constraints
create_clock -name "CLOCK_27" -period 37.037 [get_ports {CLOCK_27}]
create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}]
# Automatically constrain PLL and other generated clocks
derive_pll_clocks -create_base_clocks
# Automatically calculate clock uncertainty to jitter and other effects.
derive_clock_uncertainty
# Clock groups
set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks {pll|altpll_component|auto_generated|pll1|clk[*]}]
# Some relaxed constrain to the VGA pins. The signals should arrive together, the delay is not really important.
set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[1]}] -max 0 [get_ports {VGA_*}]
set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[1]}] -min -5 [get_ports {VGA_*}]
set_multicycle_path -to {VGA_*[*]} -setup 4
set_multicycle_path -to {VGA_*[*]} -hold 3
set_false_path -to [get_ports {AUDIO_L}]
set_false_path -to [get_ports {AUDIO_R}]
set_false_path -to [get_ports {LED}]

BIN
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/Release/ComputerSpace_MiST.rbf
View File

Binary file not shown.

60
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/ComputerSpace_MiST.sv
View File

@@ -22,18 +22,18 @@ localparam CONF_STR = {
"C.SPACE;;",
// "O1,Self_Test,Off,On;",
"O2,Color,No,Yes;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"O34,Scanlines,Off,25%,50%,75%;",
"T6,Reset;",
"V,v1.00.",`BUILD_DATE
"V,v1.20.",`BUILD_DATE
};
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
wire scandoubler_disable;
wire scandoublerD;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [6:0] audio;
wire [15:0] audio;
wire [3:0] video;
wire hs, vs, blank;
assign LED = 1;
@@ -41,25 +41,21 @@ wire clk_sys, clk_25, clk_6p25, clk_5;
pll pll(
.inclk0(CLOCK_27),
.c0(clk_sys),//50
.c1(clk_25),
.c2(clk_6p25),
.c3(clk_5)
.c0(clk_sys),//50 for game/sound generator?
.c1(clk_25), //4x pixel clock
.c3(clk_5) //5,842 MHz pixel/game clock
);
video_mixer #(
.LINE_LENGTH(254),
.HALF_DEPTH(0))
video_mixer(
video_mixer video_mixer(
.clk_sys(clk_25),
.ce_pix(clk_6p25),
.ce_pix_actual(clk_6p25),
.ce_pix(clk_5),
.ce_pix_actual(clk_5),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({r,r[1:0]}),
.G({g,g[1:0]}),
.B({b,b[1:0]}),
.R(blank ? 0 : {r,r[1:0]}),
.G(blank ? 0 : {g,g[1:0]}),
.B(blank ? 0 : {b,b[1:0]}),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
@@ -67,9 +63,8 @@ video_mixer(
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.scandoublerD(scandoublerD),
.scanlines(scandoublerD ? 2'b00 : status[4:3]),
.ypbpr(ypbpr),
.ypbpr_full(1),
.line_start(0),
@@ -79,7 +74,7 @@ video_mixer(
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_25 ),
.clk_sys (clk_sys ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
@@ -88,13 +83,22 @@ mist_io(
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.scandoublerD (scandoublerD ),
.ypbpr (ypbpr ),
.ps2_key (ps2_key ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
dac #(
.MSBI(15))
dac(
.DACout(AUDIO_L),
.DACin(audio),
.CLK(clk_sys),
.RESET(0)
);
wire [64:0] ps2_key;
wire [15:0] joystick_0, joystick_1;
@@ -142,13 +146,15 @@ computer_space_top computerspace(
.vsync(vs),
.blank(blank),
.video(video),
.audio(AUDIO_L)
.audio(audio)
);
assign AUDIO_R = AUDIO_L;
wire [5:0] rs,gs,bs, ro,go,bo, rc,gc,bc, rm,gm,bm;
wire [3:0] r,g,b;
wire [3:0] r, g, b;
assign r = blank ? 0 : (rm[5:4] ? 4'b1111 : rm[3:0]) ^ {4{inv}};
assign g = blank ? 0 : (gm[5:4] ? 4'b1111 : gm[3:0]) ^ {4{inv}};
assign b = blank ? 0 : (bm[5:4] ? 4'b1111 : bm[3:0]) ^ {4{inv}};
assign {rs,gs,bs} = ~video[0] ? 18'd0 : status[2] ? {6'b0111,6'b0111,6'b0111} : {6'b0111,6'b0111,6'b0111};
assign {rc,gc,bc} = ~video[1] ? 18'd0 : status[2] ? {6'b0000,6'b1111,6'b1111} : {6'b0111,6'b0111,6'b0111};
assign {ro,go,bo} = ~video[2] ? 18'd0 : status[2] ? {6'b1111,6'b1111,6'b0000} : {6'b1111,6'b1111,6'b1111};
@@ -157,10 +163,6 @@ assign rm = rs + ro + rc;
assign gm = gs + go + gc;
assign bm = bs + bo + bc;
assign r = (rm[5:4] ? 4'b1111 : rm[3:0]) ^ {4{inv}};
assign g = (gm[5:4] ? 4'b1111 : gm[3:0]) ^ {4{inv}};
assign b = (bm[5:4] ? 4'b1111 : bm[3:0]) ^ {4{inv}};
reg inv;
always @(posedge clk_5) begin
reg old_vs, cur_inv;

4
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/build_id.v
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "190304"
`define BUILD_TIME "172043"
`define BUILD_DATE "190307"
`define BUILD_TIME "202304"

33
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/dac.sv Normal file
View File

@@ -0,0 +1,33 @@
//
// PWM DAC
//
// MSBI is the highest bit number. NOT amount of bits!
//
module dac #(parameter MSBI=6, parameter INV=1'b1)
(
output reg DACout, //Average Output feeding analog lowpass
input [MSBI:0] DACin, //DAC input (excess 2**MSBI)
input CLK,
input RESET
);
reg [MSBI+2:0] DeltaAdder; //Output of Delta Adder
reg [MSBI+2:0] SigmaAdder; //Output of Sigma Adder
reg [MSBI+2:0] SigmaLatch; //Latches output of Sigma Adder
reg [MSBI+2:0] DeltaB; //B input of Delta Adder
always @(*) DeltaB = {SigmaLatch[MSBI+2], SigmaLatch[MSBI+2]} << (MSBI+1);
always @(*) DeltaAdder = DACin + DeltaB;
always @(*) SigmaAdder = DeltaAdder + SigmaLatch;
always @(posedge CLK or posedge RESET) begin
if(RESET) begin
SigmaLatch <= 1'b1 << (MSBI+1);
DACout <= INV;
end else begin
SigmaLatch <= SigmaAdder;
DACout <= SigmaLatch[MSBI+2] ^ INV;
end
end
endmodule

48
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/dac.vhd
View File

@@ -1,48 +0,0 @@
-------------------------------------------------------------------------------
--
-- Delta-Sigma DAC
--
-- Refer to Xilinx Application Note XAPP154.
--
-- This DAC requires an external RC low-pass filter:
--
-- dac_o 0---XXXXX---+---0 analog audio
-- 3k3 |
-- === 4n7
-- |
-- GND
--
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity dac is
generic (
C_bits : integer := 10
);
port (
clk_i : in std_logic;
res_n_i : in std_logic;
dac_i : in std_logic_vector(C_bits-1 downto 0);
dac_o : out std_logic
);
end dac;
architecture rtl of dac is
signal sig_in: unsigned(C_bits downto 0);
begin
seq: process(clk_i, res_n_i)
begin
if res_n_i = '0' then
sig_in <= to_unsigned(2**C_bits, sig_in'length);
dac_o <= '0';
elsif rising_edge(clk_i) then
-- not dac_i(C_bits-1) effectively adds 0x8..0 to dac_i
--sig_in <= sig_in + unsigned(sig_in(C_bits) & (not dac_i(C_bits-1)) & dac_i(C_bits-2 downto 0));
sig_in <= sig_in + unsigned(sig_in(C_bits) & dac_i);
dac_o <= sig_in(C_bits);
end if;
end process seq;
end rtl;

82
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/keyboard.v
View File

@@ -1,82 +0,0 @@
module keyboard
(
input clk,
input reset,
input ps2_kbd_clk,
input ps2_kbd_data,
output reg[9:0] joystick
);
reg [11:0] shift_reg = 12'hFFF;
wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
wire [7:0] kcode = kdata[9:2];
reg release_btn = 0;
reg [7:0] code;
reg input_strobe = 0;
always @(negedge clk) begin
reg old_reset = 0;
old_reset <= reset;
if(~old_reset & reset)begin
joystick <= 0;
end
if(input_strobe) begin
case(code)
'h16: joystick[1] <= ~release_btn; // 1
'h1E: joystick[2] <= ~release_btn; // 2
'h75: joystick[4] <= ~release_btn; // arrow up
'h72: joystick[5] <= ~release_btn; // arrow down
'h6B: joystick[6] <= ~release_btn; // arrow left
'h74: joystick[7] <= ~release_btn; // arrow right
'h29: joystick[0] <= ~release_btn; // Space
'h11: joystick[8] <= ~release_btn; // Left Alt
'h0d: joystick[9] <= ~release_btn; // Tab
'h76: joystick[3] <= ~release_btn; // Escape
endcase
end
end
always @(posedge clk) begin
reg [3:0] prev_clk = 0;
reg old_reset = 0;
reg action = 0;
old_reset <= reset;
input_strobe <= 0;
if(~old_reset & reset)begin
prev_clk <= 0;
shift_reg <= 12'hFFF;
end else begin
prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
if(prev_clk == 1) begin
if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
shift_reg <= 12'hFFF;
if (kcode == 8'he0) ;
// Extended key code follows
else if (kcode == 8'hf0)
// Release code follows
action <= 1;
else begin
// Cancel extended/release flags for next time
action <= 0;
release_btn <= action;
code <= kcode;
input_strobe <= 1;
end
end else begin
shift_reg <= kdata;
end
end
end
end
endmodule

4
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/mist_io.v
View File

@@ -54,7 +54,7 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
output reg [15:0] joystick_analog_1,
output [1:0] buttons,
output [1:0] switches,
output scandoubler_disable,
output scandoublerD,
output ypbpr,
output reg [31:0] status,
@@ -109,7 +109,7 @@ assign img_mounted = mount_strobe;
assign buttons = but_sw[1:0];
assign switches = but_sw[3:2];
assign scandoubler_disable = but_sw[4];
assign scandoublerD = but_sw[4];
assign ypbpr = but_sw[5];
// this variant of user_io is for 8 bit cores (type == a4) only

39
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/osd.v
View File

@@ -11,13 +11,15 @@ module osd (
input SPI_SS3,
input SPI_DI,
input [1:0] rotate, //[0] - rotate [1] - left or right
// VGA signals coming from core
input [5:0] R_in,
input [5:0] G_in,
input [5:0] B_in,
input HSync,
input VSync,
// VGA signals going to video connector
output [5:0] R_out,
output [5:0] G_out,
@@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
if(cnt == 7) begin
cmd <= {sbuf[6:0], SPI_DI};
// lower three command bits are line address
bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
@@ -91,7 +93,7 @@ reg [9:0] vs_low, vs_high;
wire vs_pol = vs_high < vs_low;
wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
wire doublescan = (dsp_height>350);
wire doublescan = (dsp_height>350);
reg ce_pix;
always @(negedge clk_sys) begin
@@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
hsD2 <= hsD;
// falling edge of HSync
if(!hsD && hsD2) begin
if(!hsD && hsD2) begin
h_cnt <= 0;
hs_high <= h_cnt;
end
// rising edge of HSync
else if(hsD && !hsD2) begin
else if(hsD && !hsD2) begin
h_cnt <= 0;
hs_low <= h_cnt;
v_cnt <= v_cnt + 1'd1;
@@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
vsD2 <= vsD;
// falling edge of VSync
if(!vsD && vsD2) begin
if(!vsD && vsD2) begin
v_cnt <= 0;
vs_high <= v_cnt;
end
// rising edge of VSync
else if(vsD && !vsD2) begin
else if(vsD && !vsD2) begin
v_cnt <= 0;
vs_low <= v_cnt;
end
@@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
wire [9:0] h_osd_end = h_osd_start + OSD_WIDTH;
wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
wire [9:0] v_osd_end = v_osd_start + (OSD_HEIGHT<<doublescan);
wire [9:0] osd_hcnt = h_cnt - h_osd_start + 1'd1; // one pixel offset for osd_byte register
wire [9:0] osd_hcnt = h_cnt - h_osd_start;
wire [9:0] osd_vcnt = v_cnt - v_osd_start;
wire [9:0] osd_hcnt_next = osd_hcnt + 2'd1; // one pixel offset for osd pixel
wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2; // two pixel offset for osd byte address register
wire osd_de = osd_enable &&
wire osd_de = osd_enable &&
(HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
(VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
reg [7:0] osd_byte;
always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
reg [10:0] osd_buffer_addr;
wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
reg osd_pixel;
wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
always @(posedge clk_sys) begin
if(ce_pix) begin
osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
(doublescan ? osd_vcnt[7:0] : {osd_vcnt[6:0], 1'b0})} :
{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
osd_pixel <= rotate[0] ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
end
end
assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};

72
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/pll.v
View File

@@ -40,30 +40,26 @@ module pll (
inclk0,
c0,
c1,
c2,
c3);
input inclk0;
output c0;
output c1;
output c2;
output c3;
wire [4:0] sub_wire0;
wire [0:0] sub_wire7 = 1'h0;
wire [2:2] sub_wire4 = sub_wire0[2:2];
wire [0:0] sub_wire6 = 1'h0;
wire [0:0] sub_wire3 = sub_wire0[0:0];
wire [3:3] sub_wire2 = sub_wire0[3:3];
wire [1:1] sub_wire1 = sub_wire0[1:1];
wire c1 = sub_wire1;
wire c3 = sub_wire2;
wire c0 = sub_wire3;
wire c2 = sub_wire4;
wire sub_wire5 = inclk0;
wire [1:0] sub_wire6 = {sub_wire7, sub_wire5};
wire sub_wire4 = inclk0;
wire [1:0] sub_wire5 = {sub_wire6, sub_wire4};
altpll altpll_component (
.inclk (sub_wire6),
.inclk (sub_wire5),
.clk (sub_wire0),
.activeclock (),
.areset (1'b0),
@@ -106,17 +102,13 @@ module pll (
altpll_component.clk0_duty_cycle = 50,
altpll_component.clk0_multiply_by = 50,
altpll_component.clk0_phase_shift = "0",
altpll_component.clk1_divide_by = 27,
altpll_component.clk1_divide_by = 188,
altpll_component.clk1_duty_cycle = 50,
altpll_component.clk1_multiply_by = 20,
altpll_component.clk1_multiply_by = 163,
altpll_component.clk1_phase_shift = "0",
altpll_component.clk2_divide_by = 108,
altpll_component.clk2_duty_cycle = 50,
altpll_component.clk2_multiply_by = 25,
altpll_component.clk2_phase_shift = "0",
altpll_component.clk3_divide_by = 27,
altpll_component.clk3_divide_by = 752,
altpll_component.clk3_duty_cycle = 50,
altpll_component.clk3_multiply_by = 5,
altpll_component.clk3_multiply_by = 163,
altpll_component.clk3_phase_shift = "0",
altpll_component.compensate_clock = "CLK0",
altpll_component.inclk0_input_frequency = 37037,
@@ -152,7 +144,7 @@ module pll (
altpll_component.port_scanwrite = "PORT_UNUSED",
altpll_component.port_clk0 = "PORT_USED",
altpll_component.port_clk1 = "PORT_USED",
altpll_component.port_clk2 = "PORT_USED",
altpll_component.port_clk2 = "PORT_UNUSED",
altpll_component.port_clk3 = "PORT_USED",
altpll_component.port_clk4 = "PORT_UNUSED",
altpll_component.port_clk5 = "PORT_UNUSED",
@@ -191,17 +183,14 @@ endmodule
// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "27"
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "27"
// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "108"
// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "27"
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "752"
// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "752"
// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "50.000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "20.000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "6.250000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "5.000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "23.409575"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "5.852394"
// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -223,40 +212,32 @@ endmodule
// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING "ps"
// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
// Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
// Retrieval info: PRIVATE: MIRROR_CLK3 STRING "0"
// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "50"
// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "25"
// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "25"
// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "5"
// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "652"
// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "163"
// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "50.00000000"
// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "20.00000000"
// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "6.25000000"
// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "5.00000000"
// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "5.84200000"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING "0"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING "MHz"
// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING "deg"
// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
@@ -281,18 +262,15 @@ endmodule
// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
// Retrieval info: PRIVATE: STICKY_CLK3 STRING "1"
// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
// Retrieval info: PRIVATE: USE_CLK2 STRING "1"
// Retrieval info: PRIVATE: USE_CLK3 STRING "1"
// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
// Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
// Retrieval info: PRIVATE: USE_CLKENA3 STRING "0"
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
@@ -302,17 +280,13 @@ endmodule
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "27"
// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "188"
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "20"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "163"
// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "108"
// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "25"
// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "27"
// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "752"
// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "5"
// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "163"
// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
@@ -347,7 +321,7 @@ endmodule
// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_USED"
// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
@@ -365,14 +339,12 @@ endmodule
// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC "c3"
// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE

9
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/scan_counter.vhd
View File

@@ -165,6 +165,7 @@ if rising_edge (game_clk) then
hblank <= '1';
if vcount = 239 then vblank <= '1'; end if;
if vcount = 252 then vsync <= '1'; end if;
if vcount < 254 then -- Increase vertical count
vcount <= vcount + 1;
@@ -178,6 +179,7 @@ if rising_edge (game_clk) then
else
vcount <= 1;
vblank <= '0';
vsync <= '0';
ver_scan_q <= "00000001";
f1_15 <= '0';
star_enable <= '0';
@@ -202,12 +204,7 @@ f1_12 <= ver_scan_q(6);
-----------------------------------------------------------------------------
-- Clear signal to star generator --
-----------------------------------------------------------------------------
b2_6 <= not f1_15;
-----------------------------------------------------------------------------
-- CREATING THE SYNC SIGNAL --
-----------------------------------------------------------------------------
vsync <= vblank;
b2_6 <= not f1_15;
-----------------------------------------------------------------------------
-- COUNT ENABLE & BLANK --

19
Arcade_MiST/Atari Discrete Logic/ComputerSpace_MiST/rtl/video_mixer.sv
View File

@@ -50,7 +50,7 @@ module video_mixer
input [1:0] scanlines,
// 0 = HVSync 31KHz, 1 = CSync 15KHz
input scandoubler_disable,
input scandoublerD,
// High quality 2x scaling
input hq2x,
@@ -60,7 +60,7 @@ module video_mixer
// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
input ypbpr_full,
input [1:0] rotate, //[0] - rotate [1] - left or right
// color
input [DWIDTH:0] R,
input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
.b_out(B_sd)
);
wire [DWIDTH:0] rt = (scandoubler_disable ? R : R_sd);
wire [DWIDTH:0] gt = (scandoubler_disable ? G : G_sd);
wire [DWIDTH:0] bt = (scandoubler_disable ? B : B_sd);
wire [DWIDTH:0] rt = (scandoublerD ? R : R_sd);
wire [DWIDTH:0] gt = (scandoublerD ? G : G_sd);
wire [DWIDTH:0] bt = (scandoublerD ? B : B_sd);
generate
if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
end
endgenerate
wire hs = (scandoubler_disable ? HSync : hs_sd);
wire vs = (scandoubler_disable ? VSync : vs_sd);
wire hs = (scandoublerD ? HSync : hs_sd);
wire vs = (scandoublerD ? VSync : vs_sd);
reg scanline = 0;
always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
.B_in(b_out),
.HSync(hs),
.VSync(vs),
.rotate(rotate),
.R_out(red),
.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
assign VGA_R = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) : red;
assign VGA_G = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] : y[7:2]) : green;
assign VGA_B = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) : blue;
assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
endmodule

112
Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.qsf
View File

@@ -1,6 +1,6 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Copyright (C) 1991-2014 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
@@ -17,8 +17,8 @@
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
# Date created = 13:17:08 December 19, 2017
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 18:52:55 March 05, 2019
#
# -------------------------------------------------------------------------- #
#
@@ -45,52 +45,6 @@ set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY Output
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:src/build_id.tcl"
set_global_assignment -name VHDL_FILE src/t80/Z80.vhd
set_global_assignment -name VHDL_FILE src/t80/T80se.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_Reg.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_Pack.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_MCode.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_ALU.vhd
set_global_assignment -name VHDL_FILE src/t80/T80.vhd
set_global_assignment -name VHDL_FILE src/YM2149_linmix_sep.vhd
set_global_assignment -name VHDL_FILE src/video_controller_pkg.vhd
set_global_assignment -name VHDL_FILE src/video_controller.vhd
set_global_assignment -name VHDL_FILE src/tilemapctl.vhd
set_global_assignment -name VHDL_FILE src/sprom.vhd
set_global_assignment -name VHDL_FILE src/spritereg.vhd
set_global_assignment -name VHDL_FILE src/spritectl.vhd
set_global_assignment -name VHDL_FILE src/sprite_pkg_body.vhd
set_global_assignment -name VHDL_FILE src/sprite_pkg.vhd
set_global_assignment -name VHDL_FILE src/spram.vhd
set_global_assignment -name VHDL_FILE src/platform_variant_pkg.vhd
set_global_assignment -name VHDL_FILE src/platform.vhd
set_global_assignment -name VHDL_FILE src/pace_pkg.vhd
set_global_assignment -name VHDL_FILE src/pace.vhd
set_global_assignment -name VHDL_FILE src/Inputs.VHD
set_global_assignment -name VHDL_FILE src/input_mapper.vhd
set_global_assignment -name VHDL_FILE src/Graphics.VHD
set_global_assignment -name VHDL_FILE src/dprom_2r.vhd
set_global_assignment -name VHDL_FILE src/dpram.vhd
set_global_assignment -name VHDL_FILE src/clk_div.vhd
set_global_assignment -name VHDL_FILE src/bitmap3_ctl.vhd
set_global_assignment -name VHDL_FILE src/bitmap2_ctl.vhd
set_global_assignment -name VHDL_FILE src/bitmap1_ctl.vhd
set_global_assignment -name VHDL_FILE src/i82c55.vhd
set_global_assignment -name VERILOG_FILE src/keyboard.v
set_global_assignment -name VHDL_FILE src/moon_patrol_sound_board.vhd
set_global_assignment -name VHDL_FILE src/cpu68.vhd
set_global_assignment -name VHDL_FILE src/moon_patrol_sound_prog.vhd
set_global_assignment -name VHDL_FILE src/dac.vhd
set_global_assignment -name VHDL_FILE src/video_controller_pkg_body.vhd
set_global_assignment -name VHDL_FILE src/video_mixer.vhd
set_global_assignment -name VHDL_FILE src/mpatrol.vhd
set_global_assignment -name SYSTEMVERILOG_FILE src/hq2x.sv
set_global_assignment -name VERILOG_FILE src/scandoubler.v
set_global_assignment -name SYSTEMVERILOG_FILE src/video_mist.sv
set_global_assignment -name VERILOG_FILE src/osd.v
set_global_assignment -name VERILOG_FILE src/mist_io.v
set_global_assignment -name VHDL_FILE src/sprite_array.vhd
set_global_assignment -name VHDL_FILE src/Clock.vhd
# Pin & Location Assignments
# ==========================
@@ -202,7 +156,7 @@ set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
# Assembler Assignments
# =====================
@@ -229,13 +183,65 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(mpatrol)
# -------------------
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VHDL_FILE src/mpatrol.vhd
set_global_assignment -name VHDL_FILE src/platform_variant_pkg.vhd
set_global_assignment -name VHDL_FILE src/spritereg.vhd
set_global_assignment -name VHDL_FILE src/spritectl.vhd
set_global_assignment -name VHDL_FILE src/sprite_pkg_body.vhd
set_global_assignment -name VHDL_FILE src/sprite_pkg.vhd
set_global_assignment -name VHDL_FILE src/video_controller_pkg_body.vhd
set_global_assignment -name VHDL_FILE src/video_controller_pkg.vhd
set_global_assignment -name VHDL_FILE src/video_controller.vhd
set_global_assignment -name VHDL_FILE src/moon_patrol_sound_board.vhd
set_global_assignment -name VHDL_FILE src/moon_patrol_sound_prog.vhd
set_global_assignment -name VHDL_FILE src/cpu68.vhd
set_global_assignment -name VHDL_FILE src/tilemapctl.vhd
set_global_assignment -name VHDL_FILE src/t80/Z80.vhd
set_global_assignment -name VHDL_FILE src/t80/T80se.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_Reg.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_Pack.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_MCode.vhd
set_global_assignment -name VHDL_FILE src/t80/T80_ALU.vhd
set_global_assignment -name VHDL_FILE src/t80/T80.vhd
set_global_assignment -name VHDL_FILE src/video_mixer.vhd
set_global_assignment -name VHDL_FILE src/dac.vhd
set_global_assignment -name VHDL_FILE src/YM2149_linmix_sep.vhd
set_global_assignment -name VHDL_FILE src/sprom.vhd
set_global_assignment -name VHDL_FILE src/spram.vhd
set_global_assignment -name VHDL_FILE src/platform.vhd
set_global_assignment -name VHDL_FILE src/pace_pkg.vhd
set_global_assignment -name VHDL_FILE src/pace.vhd
set_global_assignment -name VHDL_FILE src/Inputs.VHD
set_global_assignment -name VHDL_FILE src/input_mapper.vhd
set_global_assignment -name VHDL_FILE src/Graphics.VHD
set_global_assignment -name VHDL_FILE src/dprom_2r.vhd
set_global_assignment -name VHDL_FILE src/dpram.vhd
set_global_assignment -name VHDL_FILE src/clk_div.vhd
set_global_assignment -name VHDL_FILE src/bitmap3_ctl.vhd
set_global_assignment -name VHDL_FILE src/bitmap2_ctl.vhd
set_global_assignment -name VHDL_FILE src/bitmap1_ctl.vhd
set_global_assignment -name VHDL_FILE src/i82c55.vhd
set_global_assignment -name VERILOG_FILE src/keyboard.v
set_global_assignment -name SYSTEMVERILOG_FILE src/hq2x.sv
set_global_assignment -name VERILOG_FILE src/scandoubler.v
set_global_assignment -name SYSTEMVERILOG_FILE src/video_mist.sv
set_global_assignment -name VERILOG_FILE src/osd.v
set_global_assignment -name VERILOG_FILE src/mist_io.v
set_global_assignment -name VHDL_FILE src/sprite_array.vhd
set_global_assignment -name VHDL_FILE src/Clock.vhd
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

12
Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.ppf Normal file
View File

@@ -0,0 +1,12 @@
<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE pinplan>
<pinplan intended_family="Cyclone III" variation_name="Clock" megafunction_name="ALTPLL" specifies="all_ports">
<global>
<pin name="inclk0" direction="input" scope="external" source="clock" />
<pin name="c0" direction="output" scope="external" source="clock" />
<pin name="c1" direction="output" scope="external" source="clock" />
<pin name="c2" direction="output" scope="external" source="clock" />
<pin name="c3" direction="output" scope="external" source="clock" />
</global>
</pinplan>

4
Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.vhd
View File

@@ -14,11 +14,11 @@
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 13.1.0 Build 162 10/23/2013 SJ Web Edition
-- 13.1.4 Build 182 03/12/2014 SJ Web Edition
-- ************************************************************
--Copyright (C) 1991-2013 Altera Corporation
--Copyright (C) 1991-2014 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing

4
Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/build_id.v
View File

@@ -1,2 +1,2 @@
`define BUILD_DATE "171219"
`define BUILD_TIME "161924"
`define BUILD_DATE "190305"
`define BUILD_TIME "212703"