Uploaded_9_29_2025
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@ -22,6 +22,9 @@
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// Revision 2.0 11/6/22
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// Changed overflow flag calculation into rtl instead of microcode
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//
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// Revision 3.0 9/29/2025
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// For DIV overflow AX and DX are restored to initial values
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//
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//
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//------------------------------------------------------------------------
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//
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@ -126,9 +129,11 @@ wire eu_jump_boolean;
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reg [12:0] eu_rom_address;
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reg [51:0] eu_calling_address;
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reg [15:0] eu_register_ax;
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reg [15:0] initial_ax;
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reg [15:0] eu_register_bx;
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reg [15:0] eu_register_cx;
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reg [15:0] eu_register_dx;
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reg [15:0] initial_dx;
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reg [15:0] eu_register_sp;
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reg [15:0] eu_register_bp;
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reg [15:0] eu_register_si;
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@ -175,7 +180,7 @@ wire [15:0] sbb_total;
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//
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//------------------------------------------------------------------------
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eu_rom EU_4Kx32 (
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EU4Kx32 EU_4Kx32_i (
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.clka (CORE_CLK_INT),
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.addra (eu_rom_address[11:0]),
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@ -249,12 +254,15 @@ assign eu_operand1 = (eu_opcode_op1_sel==4'h0) ? BIU_REGISTER_ES :
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// JUMP condition codes
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assign eu_jump_boolean = (eu_opcode_jump_cond==4'h0) ? 1'b1 : // unconditional jump
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assign eu_jump_boolean = ( (eu_rom_address == 'h0E76) && (eu_register_ax[15:7]!='h0)) ? 1'b1 :
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( (eu_rom_address == 'h0F02) && ( (eu_register_dx!='h0) || (eu_register_ax[15]!='h0) )) ? 1'b1 :
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(eu_opcode_jump_cond==4'h0) ? 1'b1 : // unconditional jump
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(eu_opcode_jump_cond==4'h1 && eu_alu_last_result!=16'h0) ? 1'b1 :
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(eu_opcode_jump_cond==4'h2 && eu_alu_last_result==16'h0) ? 1'b1 :
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1'b0 ;
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// Consolidated system signals
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assign system_signals[13] = eu_add_carry8;
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@ -567,8 +575,14 @@ else
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// Debounce the overflow flag override when microcode returns to the main loop
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// Store initial values of AX and DX
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//
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if (eu_rom_address == 16'h0011) eu_overflow_override <= 1'b0;
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if (eu_rom_address == 'h0011)
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begin
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eu_overflow_override <= 1'b0;
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initial_ax <= eu_register_ax;
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initial_dx <= eu_register_dx;
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end
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@ -607,7 +621,15 @@ else
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default : ;
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endcase
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end
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// Restore initial values of AX and DX upon entering overflow DIV0 microcode
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//
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if (eu_rom_address == 'h0F11)
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begin
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eu_register_ax <= initial_ax;
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eu_register_dx <= initial_dx;
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end
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// JUMP Opcode
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if (eu_stall_pipeline==1'b0 && eu_opcode_type==3'h1 && eu_jump_boolean==1'b1)
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@ -22,6 +22,9 @@
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// Revision 2.0 11/6/22
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// Changed overflow flag calculation into rtl instead of microcode
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//
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// Revision 3.0 9/29/2025
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// For DIV overflow AX and DX are restored to initial values
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//
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//
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//------------------------------------------------------------------------
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//
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@ -126,9 +129,11 @@ wire eu_jump_boolean;
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reg [12:0] eu_rom_address;
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reg [51:0] eu_calling_address;
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reg [15:0] eu_register_ax;
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reg [15:0] initial_ax;
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reg [15:0] eu_register_bx;
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reg [15:0] eu_register_cx;
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reg [15:0] eu_register_dx;
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reg [15:0] initial_dx;
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reg [15:0] eu_register_sp;
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reg [15:0] eu_register_bp;
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reg [15:0] eu_register_si;
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@ -249,12 +254,15 @@ assign eu_operand1 = (eu_opcode_op1_sel==4'h0) ? BIU_REGISTER_ES :
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// JUMP condition codes
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assign eu_jump_boolean = (eu_opcode_jump_cond==4'h0) ? 1'b1 : // unconditional jump
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assign eu_jump_boolean = ( (eu_rom_address == 'h0E76) && (eu_register_ax[15:7]!='h0)) ? 1'b1 :
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( (eu_rom_address == 'h0F02) && ( (eu_register_dx!='h0) || (eu_register_ax[15]!='h0) )) ? 1'b1 :
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(eu_opcode_jump_cond==4'h0) ? 1'b1 : // unconditional jump
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(eu_opcode_jump_cond==4'h1 && eu_alu_last_result!=16'h0) ? 1'b1 :
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(eu_opcode_jump_cond==4'h2 && eu_alu_last_result==16'h0) ? 1'b1 :
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1'b0 ;
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// Consolidated system signals
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assign system_signals[13] = eu_add_carry8;
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@ -567,8 +575,14 @@ else
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// Debounce the overflow flag override when microcode returns to the main loop
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// Store initial values of AX and DX
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//
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if (eu_rom_address == 16'h0011) eu_overflow_override <= 1'b0;
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if (eu_rom_address == 'h0011)
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begin
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eu_overflow_override <= 1'b0;
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initial_ax <= eu_register_ax;
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initial_dx <= eu_register_dx;
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end
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@ -607,7 +621,15 @@ else
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default : ;
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endcase
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end
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// Restore initial values of AX and DX upon entering overflow DIV0 microcode
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//
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if (eu_rom_address == 'h0F11)
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begin
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eu_register_ax <= initial_ax;
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eu_register_dx <= initial_dx;
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end
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// JUMP Opcode
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if (eu_stall_pipeline==1'b0 && eu_opcode_type==3'h1 && eu_jump_boolean==1'b1)
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